Dario Nieuwenhuis
35a76c364a
embassy/time: make optional via Cargo feature
2021-07-12 03:45:48 +02:00
Dario Nieuwenhuis
ecc151d4e2
stm32/adc: simplify delay handling
2021-07-05 03:18:23 +02:00
Rukai
25d4b2ea26
fix stm32 warnings
2021-07-05 01:54:29 +02:00
Thales Fragoso
c2f595b26a
F0: Fix missing apb2 clock
2021-07-03 02:12:22 -03:00
Bob McWhirter
f5ce807e25
Let's adjust i2c the correct way, removing the correct APBesque frequency, not the i2c periph speed.
2021-07-02 13:54:07 -04:00
Bob McWhirter
9f5d35d891
Remove the frequency argument for i2c, move to using RccPeripheral.
2021-07-01 13:53:57 -04:00
Bob McWhirter
8f94123ca4
argh, intellij.
2021-07-01 11:37:01 -04:00
Bob McWhirter
0920c0cb1d
Make UART pins Rx/Tx/etc in addition to USART.
2021-07-01 11:30:54 -04:00
Bob McWhirter
54ada5bae1
Stub in the DMA bits that aren't yet there.
2021-07-01 11:30:54 -04:00
Bob McWhirter
bf3bc92525
Re-enable because intellij.
2021-07-01 11:30:54 -04:00
Bob McWhirter
497d3aa153
Add USARTv3 support.
2021-07-01 11:30:54 -04:00
Thales Fragoso
e07dda8707
stm32: Adjust some fences around DMA
...
Also bump stm32-data
2021-06-30 18:58:21 -03:00
Bob McWhirter
f3b9c97763
Change atomics and add a fence.
2021-06-30 10:17:25 -04:00
Bob McWhirter
cf5b7dc943
Because IntelliJ makes life hard.
2021-06-30 10:03:18 -04:00
Bob McWhirter
6a0b0f3162
Enable RCC within the USART itself.
2021-06-30 09:57:27 -04:00
Bob McWhirter
e1736114d4
Remove paste.
2021-06-30 09:44:28 -04:00
Bob McWhirter
07a6686879
Protect DMA-related things with cfg.
2021-06-29 13:00:52 -04:00
Bob McWhirter
6b78d56ceb
Formatting.
2021-06-29 12:48:58 -04:00
Bob McWhirter
c53ab325c1
Wire up DMA with USART v1.
2021-06-29 11:01:57 -04:00
Bob McWhirter
b88fc2847a
Checkpoint with lifetime issues.
2021-06-29 11:01:57 -04:00
Thales Fragoso
c5022b1196
stm32: Make sure Output gpio driver is pushpull
2021-06-27 13:25:35 -03:00
Thales Fragoso
0eaadfc125
stm32: Update gpio examples
2021-06-25 18:16:43 -03:00
Thales Fragoso
a3f0aa02a4
Separate OpenDrain pin to a new type
2021-06-25 17:22:51 -03:00
Thales Fragoso
efb3b3a0a8
stm32: Allow for open drain configuration for output pin
2021-06-24 20:42:43 -03:00
Thales Fragoso
013792b944
Separate exti into v1 and v2
2021-06-24 20:28:06 -03:00
Thales Fragoso
1c33a3b94c
#[cfg] exti
2021-06-24 19:41:04 -03:00
Thales Fragoso
210104e6dc
Remove unused gpio_af from codegen
2021-06-24 19:23:51 -03:00
Thales Fragoso
409884be2a
Add F0 RCC
2021-06-24 19:21:56 -03:00
Thales Fragoso
797534d1a6
Update features to include F0
2021-06-22 14:41:42 -03:00
Dario Nieuwenhuis
5a4e3ceb88
Update stm32-data (adds DBGMCU to all chips)
2021-06-21 01:38:59 +02:00
Thales Fragoso
098ce6e740
stm32h7: Add ethernet example
2021-06-16 16:48:35 +02:00
Thales Fragoso
77546825a1
stm32: Make vcell dependency optional
2021-06-16 16:48:35 +02:00
Thales Fragoso
598201bff3
eth-v2: Make embassy-net optional
2021-06-16 16:48:35 +02:00
Thales Fragoso
6cecc6d4b5
eth-v2: Get hclk frequency from clock singleton
2021-06-16 16:48:35 +02:00
Thales Fragoso
f7e1f262af
eth-v2: Enable source address filtering
2021-06-16 16:48:35 +02:00
Thales Fragoso
ffc19a54d6
eth-v2: Fix bug in Rx descriptors and add docs art
2021-06-16 16:48:35 +02:00
Thales Fragoso
6daa55a897
eth-v2: Fix setting the registers for the descriptors
...
Also, the interrupts are set to 1 to clear, the manual could have helped
with that one...
2021-06-16 16:48:35 +02:00
Thales Fragoso
0b42e12604
eth-v2: Fix off by one bug
2021-06-16 16:48:35 +02:00
Thales Fragoso
54ad2a41f1
eth-v2: Work around missing AF for REF_CLK
2021-06-16 16:48:35 +02:00
Thales Fragoso
0c837f07c0
eth-v2: Enable clocks in new
2021-06-16 16:48:35 +02:00
Thales Fragoso
e039c7c42c
eth-v2: Remove Instance trait
2021-06-16 16:48:35 +02:00
Thales Fragoso
05a239faf6
eth-v2: Implement embassy-net's Device Trait and fix Drop
2021-06-16 16:48:35 +02:00
Thales Fragoso
4cffa200bd
eth: Add lan8742a PHY
2021-06-16 16:48:35 +02:00
Thales Fragoso
46e1bae9e3
eth-v2: Start Ethernet peripheral implementation
2021-06-16 16:48:35 +02:00
Ulf Lilleengen
56c5218292
Prescaler 1 means divide by 3 on WL55
2021-06-16 16:21:16 +02:00
Ulf Lilleengen
383beb37b3
Rename from wl55 to wl5x and enable debug wfe
2021-06-16 16:07:21 +02:00
Ulf Lilleengen
b6a8703698
Add support for generating PAC for dual cores
...
* Chips that have multiple cores will be exposed as chipname_corename,
i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
and pick the first and only core from the list
* Add support for stm32wl55 chip family
2021-06-16 15:12:07 +02:00
Ulf Lilleengen
8ae4f47d3d
Fix compile
2021-06-15 16:44:00 +02:00
Ulf Lilleengen
49fad2de8a
Use correct frequencies for timers
2021-06-15 16:07:23 +02:00
Ulf Lilleengen
4b406dd107
Remove default rcc impl
2021-06-14 20:24:51 +02:00
Bob McWhirter
d58fb11b2e
ADCv3 and example.
2021-06-14 13:20:42 -04:00
Ulf Lilleengen
531093f281
Derive SPI v1 and v3 clocks automatically
2021-06-14 11:58:16 +02:00
Ulf Lilleengen
5e1b0a5398
Add wb55 clocks
2021-06-14 11:41:02 +02:00
Ulf Lilleengen
ee9f67fa01
Add common types
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
a2da2a6db2
Remove unused l0 code
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
95532726b2
Add minimal RCC impls for L4 and F4
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
a13e07625f
Add ... c1?
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
0b52731897
Add clocks for h7
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
2c63393c9e
Add Clock type per RCC family
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
952f525af5
Provide a way for a peripheral to query its clock frequency
...
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
2021-06-14 11:33:11 +02:00
Dominik Boehi
9edb6e41ce
Make gen.py work without CSafeLoader
2021-06-12 18:28:21 +02:00
Dominik Boehi
0eab96f573
Initial support and example for STM32WB55
2021-06-12 07:06:36 +02:00
Ulf Lilleengen
0a9022d59f
Enable timer clock in RCC on timer start
...
* Moves the tim2-specific code into macro which always uses TIM2
* For peripherals without clock specified, attempt to locate enable and
reset registers in the RCC block matching the peripheral name. This
could be useful for peripherals where deducing the clock name might
not be feasible, but it remains to be tested with more chip families
to see if it is sufficiently accurate.
2021-06-10 09:37:30 +02:00
Ulf Lilleengen
1bb7123156
Add examples for STM32L0
2021-06-09 23:09:48 +02:00
Ulf Lilleengen
f3d1ac6623
Enable clock for RNG
2021-06-09 13:54:53 +02:00
Ulf Lilleengen
939ea3bbd0
Reduce generics noise
2021-06-08 17:20:29 +02:00
Ulf Lilleengen
ed29d82071
Use critical_section
2021-06-08 17:20:29 +02:00
Ulf Lilleengen
212bda0940
Enable clock for SPI v1 and v3
2021-06-08 17:20:29 +02:00
Ulf Lilleengen
a57482fddd
Cargo fmt
2021-06-08 17:20:29 +02:00
Ulf Lilleengen
ee3b82b743
Auto generate SPI v2 clock enable
...
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral.
Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI.
2021-06-08 17:20:29 +02:00
Ulf Lilleengen
a63388874a
Update after name fix
2021-06-07 14:06:54 +02:00
Ulf Lilleengen
f24c38f2a4
Fix
2021-06-07 13:51:06 +02:00
Ulf Lilleengen
1cd2c55b7c
Fix stm32l0 build
2021-06-07 12:19:09 +02:00
Ulf Lilleengen
f5e2fb9a5a
Update to new api
2021-06-07 12:03:31 +02:00
Dario Nieuwenhuis
0ffa78aca1
Use macrotables from build.rs
2021-06-07 05:12:10 +02:00
Dario Nieuwenhuis
3be49d3e79
fmt: Add dunmy use to avoid "unused variable" errors when no log is enabled.
2021-06-07 03:21:37 +02:00
Dario Nieuwenhuis
ef1ebefec0
fmt: use absolute paths
2021-06-07 03:15:05 +02:00
Dario Nieuwenhuis
e7dc5c0939
fmt: make all macros macro_rules so scoping is consistent.
2021-06-07 00:16:39 +02:00
Rukai
010b2b9497
Fix stm32 warnings
2021-06-06 00:46:20 +10:00
Bob McWhirter
b4dca64e20
Move most of DMA out of gen.py.
2021-06-03 14:53:48 -04:00
Bob McWhirter
240616aa72
General clean-up and removal of dead code.
2021-06-03 14:25:17 -04:00
Bob McWhirter
d75bf143eb
Remove the exti_interrupts table.
2021-06-03 14:18:58 -04:00
Bob McWhirter
2c722ec0ee
Migrate sdmmc to macro tables.
2021-06-03 13:50:48 -04:00
Bob McWhirter
fe47f781be
Migrate exti_irq stuff to macro tables.
2021-06-03 13:35:27 -04:00
Bob McWhirter
75dc0fd542
Migrate TIM[2-5] to macro tables.
2021-06-03 13:23:21 -04:00
Bob McWhirter
c00a85f9a9
Refactor SPI signal pin macro.
2021-06-03 13:12:38 -04:00
Bob McWhirter
3dd497c1e6
Refactor some I2c signal pin macro.
2021-06-03 13:12:38 -04:00
Bob McWhirter
00892c7362
Migrate USART to macro tables.
2021-06-03 13:12:38 -04:00
Bob McWhirter
6958091b50
Move DAC, I2C, SPI and RNG to macro-tables.
2021-06-03 13:12:38 -04:00
Dario Nieuwenhuis
c7c6b0b464
Merge pull request #211 from bobmcwhirter/dac_v2
...
DAC v2 basics.
2021-06-02 16:16:27 +02:00
Ulf Lilleengen
c3a521066d
Add utility to enable debug
2021-06-02 15:23:10 +02:00
Ulf Lilleengen
4863d5e01e
Add a way to enable more features of the STM32L0 RCC
...
Add ability to enable the hsi48 clock. Code modified from the STM32L0XX
hal
2021-06-02 14:28:33 +02:00
Bob McWhirter
0c54c1afd1
DAC v2 basics.
2021-06-01 12:08:30 -04:00
Ulf Lilleengen
1a9a619033
Implement togglable output pin for Output
2021-05-31 09:33:33 +02:00
Dario Nieuwenhuis
553432a8e8
stm32: remove unused stuff from gen.py
2021-05-31 03:58:03 +02:00
Dario Nieuwenhuis
b2d8d23f4c
more fix
2021-05-31 03:25:10 +02:00
Dario Nieuwenhuis
d24b67512f
More fixes
2021-05-31 03:21:44 +02:00
Dario Nieuwenhuis
c4f8f1655e
Delete unused submodule
2021-05-31 02:59:06 +02:00
Dario Nieuwenhuis
60f12c78dd
Add resolver=2
2021-05-31 02:43:59 +02:00
Dario Nieuwenhuis
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
