Commit Graph

340 Commits

Author SHA1 Message Date
Ulf Lilleengen
42a8f1671d Bump versions preparing for -macros and -executor release 2023-04-27 11:54:22 +02:00
Dario Nieuwenhuis
d91c37dae3 rp: remove pio Cargo feature.
We shouldn't have Cargo features if their only purpose is reduce cold build time a bit.
2023-04-26 22:39:24 +02:00
bors[bot]
0dea7b02d6
Merge #1387
1387: rp: add PWM api r=Dirbaio a=pennae

add PWM api ~~including interrupts and async support.~~

depends on https://github.com/embassy-rs/rp-pac/pull/1

**TODO**:

- [x] example
- [x] test
- [x] move divmode to typelevel
- [x] deduplicate `new_*` functions

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-23 20:50:57 +00:00
pennae
a4866ad278 rp: add PWM api 2023-04-23 22:49:15 +02:00
Peter Krull
b283f213d9 embassy-rs : @pennae Fix division intrinsics naming clash with rp2040-hal 2023-04-23 19:05:32 +02:00
Peter Krull
ba47fe9c41 embassy-rp : Added feature flag to otherwise unused definitions 2023-04-23 16:37:44 +02:00
Peter Krull
8285263fc2 embassy-rp : Added intrinsic feature flag to global_asm macro 2023-04-23 15:59:56 +02:00
Peter Krull
cc5bca8e83 Added feature flag to embassy-rp intrinsics to avoid conflicts with rp2040-hal 2023-04-23 15:50:46 +02:00
pennae
837cdacd16 rp: optimize rom-func-cache for runtime
storing a full function pointer initialized to a resolver trampoline
lets us avoid the runtime cost of checking whether we need to do the
initialization.
2023-04-20 00:07:18 +02:00
pennae
fdd6e08ed6 rp: hook up softfloat rom intrinsics
rp-hal has done this very well already, so we'll just copy their entire
impl again. only div.rs needed some massaging because our sio access
works a little differently, everything else worked as is.
2023-04-19 23:04:47 +02:00
bors[bot]
38c5b97df0
Merge #1378
1378: Add ability to invert UART pins, take 2 r=Dirbaio a=jakewins

Same PR as before, except this now works :) 

There was a minor hiccup in the UartRx code where the rx pin got passed as the tx argument, so the invert settings didn't get applied. With this fix, my local setup at least is happily reading inverted uart data.

Co-authored-by: Jacob Davis-Hansson <jake@davis-hansson.com>
2023-04-18 15:48:47 +00:00
Jacob Davis-Hansson
21ea98810a Pass rx pin to right init arg 2023-04-18 17:44:19 +02:00
bors[bot]
99dcbf00c4
Merge #1372
1372: rp: add division intrinsics r=Dirbaio a=pennae

rp2040-hal adds division intrinsics using the hardware divider unit in the SIO, as does the pico-sdk itself. using the hardware is faster than the compiler_rt implementations, and more compact too.

since embassy does not expose the hardware divider in any way (yet?) we could go even further an remove the state-saving code rp2040-hal needs, but that doesn't seem to be worth it.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-16 23:23:47 +00:00
Dario Nieuwenhuis
a258e15c23 rp: switch to released rp-pac v1.0 2023-04-16 23:59:26 +02:00
pennae
7a682ec02a rp: add division intrinsics
rp2040-hal adds division intrinsics using the hardware divider unit in
the SIO, as does the pico-sdk itself. using the hardware is faster than
the compiler_rt implementations, and more compact too.
2023-04-16 19:45:18 +02:00
Jacob Davis-Hansson
81f10e136a outover instead of inover 2023-04-15 15:13:44 +02:00
Dario Nieuwenhuis
f681b9d4e5 Remove the _todo_embedded_hal_serial impls. EH will probably not have these serial traits. 2023-04-15 00:58:58 +02:00
Jacob Davis-Hansson
b9fc2a6b33 Add ability to invert UART pins
This is useful in some cases where the surrounding circuit
for some reason inverts the UART signal, for instance if you're talking
to a device via an optocoupler.
2023-04-14 21:08:24 +02:00
Dario Nieuwenhuis
577f060d24 Release embassy-sync v0.2.0 2023-04-13 23:40:49 +02:00
Brooks J Rady
1fbb8f0b32 feat(rp): add Wait impl to OutputOpenDrain
A while ago `OutputOpenDrain` was made to implement `InputPin`,
something that allowed drivers for various one-wire protocols to be
written, but it's been lacking a `Wait` implementation — something
that's needed to write async versions of these drivers.

This commit also adds `get_level()` to `OutputOpenDrain`, since
`is_high()` and `is_low()` were already implemented, but `get_level()`
itself was missing.
2023-04-09 09:15:57 +01:00
Dario Nieuwenhuis
be37eee13d Update embedded-hal crates. 2023-04-06 22:41:50 +02:00
bors[bot]
08f911d25e
Merge #1318
1318: rp: Allow zero len reads for buffered uart r=Dirbaio a=timokroeger

Prevents the read methods from getting stuck forever.

cc `@MathiasKoch` can you test if this fixes the problem you described in the chat?

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-04-02 18:33:36 +00:00
Timo Kröger
7ef6a3cfb2 rp: Allow zero len writes for buffered uart
Prevents the write methods from getting stuck forever.
2023-04-02 14:36:32 +02:00
Timo Kröger
f78aa4f936 rp: Allow zero len reads for buffered uart
Prevents the read methods from getting stuck forever.
2023-04-01 14:31:24 +02:00
Thierry Fleury
0e13fe9925 Fix set_baudrate on RP-PICO 2023-04-01 11:44:49 +02:00
bors[bot]
9c7b9b7848
Merge #1288
1288: fix(rp): spi transfer r=elpiel a=elpiel

Fixes #1181 

Co-authored-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-26 15:55:58 +00:00
Lachezar Lechev
7be63b3468
fix: spi transfer bug and additions to test
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-26 18:14:17 +03:00
Lachezar Lechev
9939d43800
fix: PR comment
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-24 12:14:23 +02:00
Mathias
88483b5abe Fix return type for EH-nb traits 2023-03-23 14:26:37 +01:00
Mathias
04f90e3a9d Add embedded-io blocking Read + Write for BufferedUart 2023-03-23 14:18:19 +01:00
Lachezar Lechev
7a4db1da26
fix(rp): spi transfer
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-20 16:34:30 +02:00
Mathias
89a371d10c Add HIL test for into_buffered uart on embassy-rp 2023-03-14 12:46:58 +01:00
Mathias
bce1ce7dcb Allow upgrading a blocking uart to a BufferedUart, and implement blocking serial traits for BufferedUart 2023-03-14 10:36:30 +01:00
Caleb Jamison
7bdb3abad7 Swap debug! for trace! in rp gpio
When using gpio pin changes for things like peripheral interrupts these
debug! calls flood defmt, making it difficult to find what you're
actually looking for.
2023-03-02 13:59:52 -05:00
Lachezar Lechev
5cb0c8cc01
fix: rp - disable Pull-down/up resistors for ADC read
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-02-28 09:22:38 +02:00
Andres Hurtado Lopez
2331d58aa6 RP-PICO UART adding set_baudrate: missing to run rust-fmt 2023-02-26 21:23:51 -05:00
Andres Hurtado Lopez
482ba835c4 RP-PICO UART adding set_baudrate: Changing static call from specific type to a Self (requires adding lifetime specifier) 2023-02-26 19:20:08 -05:00
Andres Hurtado Lopez
7172dfd083 RP-PICO UART adding set_baudrate: refactoring of methods 2023-02-26 19:14:25 -05:00
Andres Hurtado Lopez
8fb380b180 RP-PICO UART adding set_baudrate 2023-02-26 18:40:23 -05:00
Grant Miller
7be4337de9 Add #[must_use] to all futures 2023-02-24 13:01:41 -06:00
sekoia
e641db1f75 Fix a typo in "PioPeripheral" 2023-02-15 14:10:07 +01:00
Slushee
dfc58ad3a2
Add copy to Level enum in embassy-rp gpio module 2023-02-13 17:29:35 +00:00
Slushee
1626a4a74b
Add clone to embassy_rp::gpio::Level 2023-02-13 17:12:50 +00:00
Dario Nieuwenhuis
ca10fe7135 usb: docs 2023-01-31 22:27:19 +01:00
nitroxis
1e60c60afd rp: allow isochronous USB endpoints to be up to 1023 in size 2023-01-27 07:24:49 +01:00
Matt Johnston
83af513424 rp gpio: make pin_bank() inline
This allows set_high() etc to be inlined, toggling pins
should be much faster.
2023-01-19 13:36:40 +08:00
bors[bot]
b6c8505697
Merge #1142
1142: More rp2040 BufferedUart fixes r=Dirbaio a=timokroeger

* Refactor init code
* Make it possible to drop RX without breaking TX (or vice versa)
* Correctly handle RX buffer full scenario

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-01-14 00:07:02 +00:00
chemicstry
ce842fe28c Refactor embassy-usb address handling to allow reordering of status resoponse 2023-01-11 17:47:12 +01:00
Timo Kröger
539f97da53 rp: Fix formatting string to please CI 2023-01-05 22:00:44 +01:00
Timo Kröger
1096a9746c rp: Improve BufferedUart interrupt handling
* Only clear interrupt flags that have fired (so that we do not lose any error flags)
* Enable RX interrupt when a read is requested, disable it when the RX buffer is full
* Rework TX interrupt handling: its "edge" triggered by a FIFO threshold
2023-01-05 18:45:58 +01:00
Pedro Ferreira
6d4c6e0481 rp2040: add {tx,rx}-only constructors to UART 2023-01-04 21:11:19 +01:00
Timo Kröger
840a75674b rp: Disable RX interrupts when ring buffer is full
When data is in the RX fifo the RX timeout interrupt goes high again even after clearing it.
The result is a deadlock because execution is stuck in the interrupt handler. No other code
can run to clear the receive buffer.
Enable and disable RX interrupts based on the buffer fill level.
Use the same approach for the TX code path.
2023-01-04 16:53:43 +01:00
Timo Kröger
a24037edf9 rp: Fix BufferedUart drop code
Only unregister the interrupt handler when both parts are inactive
2023-01-04 15:59:03 +01:00
Timo Kröger
68c186309f rp: Common init function for BufferedUart
BufferedUart, BufferedUartRx and BufferedUartTX can all use the same init code.
2023-01-04 15:58:26 +01:00
Timo Kröger
e4f457646f rp: Fill and empty FIFOs in buffered uart interrupt
Fixes an issue where only the first byte was transmitted.
Should improve throughput aswell.
2022-12-27 11:28:52 +01:00
Dario Nieuwenhuis
41d6316984 rp: switch to released 0.2.1 pio crate. 2022-12-26 22:30:22 +01:00
bors[bot]
c29657f95a
Merge #1128
1128: Add missing SPI pins r=Dirbaio a=pferreir

The SPI definitions lack the pins which are not accessible on the pico (but are so e.g. on the stamp).

Co-authored-by: Pedro Ferreira <pedro@dete.st>
2022-12-25 23:52:33 +00:00
Pedro Ferreira
f2fb9a2ca6 Add missing SPI pins 2022-12-25 23:49:04 +00:00
kalkyl
e090ab1915 Remove lifetime, use pac fields 2022-12-24 03:22:51 +01:00
kalkyl
eaad0cc1dc embassy-rp: Add Watchdog 2022-12-24 02:51:06 +01:00
bors[bot]
67a6e5accf
Merge #1122
1122: embassy-rp: Add split() to BufferedUart r=kalkyl a=kalkyl



Co-authored-by: kalkyl <henrik.alser@me.com>
2022-12-23 22:16:58 +00:00
Dario Nieuwenhuis
10c9cc31b1 Remove unnecessary use of atomic-polyfill.
Only use it when CAS is actually needed.
2022-12-23 20:46:49 +01:00
kalkyl
aa92ce6dc7 embassy-rp: Add split() to BufferedUart 2022-12-22 23:03:05 +01:00
kalkyl
c4d8f3579e Update usage in docs 2022-12-13 14:15:04 +01:00
kalkyl
731eb3c6e3 fmt 2022-12-13 13:55:23 +01:00
Henrik Alsér
3d68c0400b
Merge branch 'master' into multicore 2022-12-13 13:51:48 +01:00
kalkyl
13d9d8fde1 Refactor after review 2022-12-13 13:49:51 +01:00
kalkyl
aea28c8aa0 Add usage in to docs 2022-12-13 09:45:11 +01:00
kalkyl
eb1d2e1295 Pause CORE1 execution during flash operations 2022-12-13 04:02:28 +01:00
kalkyl
96d6c7243b Cleanup 2022-12-10 13:43:29 +01:00
kalkyl
d8821cfd41 Feature gate critical-section-impl 2022-12-10 12:57:45 +01:00
kalkyl
1ee58492fb embassy-rp: Add multicore support 2022-12-10 08:26:35 +01:00
Simon Berg
488e322478 Clear unused pulls in set_pull. 2022-12-09 20:30:17 +01:00
Simon Berg
cd59046e6c Added RelocateProgram class for adjusting PIO-programs for different origins. 2022-12-09 20:18:41 +01:00
Simon Berg
35db6e639b PIO support for RPi Pico 2022-12-09 20:18:41 +01:00
Dario Nieuwenhuis
7cbc3aefe6 rp: implement input for OutputOpenDrain 2022-12-06 19:54:39 +01:00
Ulf Lilleengen
bb89a2341c
feat: embassy-boot for rp2040
Add embassy-boot support for RP2040, with examples for the Raspberry Pi
Pico.

Co-authored-by: Mathias Koch <mk@blackbird.online>
2022-12-02 11:28:33 +01:00
Gabriel Smith
71df28e269 rp: Add an RngCore impl based on ROSC.RANDOMBIT
This has the potential to not be random, but it should not be an issue
if default clock settings are used.
2022-11-30 14:06:05 -05:00
Gabriel Smith
4d84b5469e Drive-by documentation link fixes 2022-11-27 16:32:18 -05:00
Gabriel Smith
3ca14ba4e9 usb-driver: Remove unncessary lifetime 2022-11-27 16:28:24 -05:00
Dario Nieuwenhuis
7b838d0336 rp/uart: use lockfree ringbuffer.
This gets rid of another PeripheralMutex usage.
2022-11-25 22:30:47 +01:00
Dario Nieuwenhuis
1e2fb0459d Switch to async-fn-in-trait 2022-11-25 21:02:06 +01:00
Henrik Alsér
908eef2775 Change interrupt modify into write 2022-11-22 02:03:34 +01:00
Henrik Alsér
9f870a5edf Cleanup 2022-11-15 16:31:19 +01:00
Henrik Alsér
eb149a0bd4 embassy-rp: Add basic ADC module 2022-11-15 16:12:07 +01:00
Mathias
c871fe0848 Rebase on master 2022-10-27 07:12:34 +02:00
Mathias
3c6c382465 Remove random delay from example, and move flash functions to allow using without embedded-storage in scope 2022-10-27 07:10:35 +02:00
bors[bot]
e5097a8866
Merge #959
959: Generic, executor-agnostic queue implementation r=ivmarkov a=ivmarkov

Hopefully relatively well documented.

Implementation relies on a fixed-size `SortedLinkedList` from `heapless`. (By default, for up to 128 timer schedules, but we can lower this number to - say - 64.)

As discussed earlier, on queue overflow, the `WakerRegistration` approach is utilized, whereas the waker that is ordered first in the queue is awoken to make room for the incoming one (which might be the waker that would be awoken after all!). Wakers are compared with `Waker::will_wake`, so the queue should actually not fill up that easily, if at all.

I've left provisions for the user to manually instantiate the queue using a dedicated macro - `generic_queue!` so that users willing to adjust the queue size, or users (like me) who have to use the queue in a complex "on-top-of-RTOS-but-the-timer-driver-calling-back-from-ISR" scenario can customize the mutex that protects the queue.

The one thing I'm not completely happy with is the need to call `{ embassy_time::queue::initialize() }` early on before any futures using embassy-time are polled, which is currently on the shoulders of the user. I'm open to any ideas where we can get rid of this and do it on the first call to `_embassy_time_schedule_wake`, without introducing very complex combinations of critical sections, atomics and whatnot.




Co-authored-by: ivmarkov <ivan.markov@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-10-26 19:14:12 +00:00
Dario Nieuwenhuis
eeb072d9cb Update Rust nightly. 2022-10-26 16:47:29 +02:00
Mathias
1669e39565 Buffer data to be written to flash in ram if it does not already reside in ram 2022-10-26 15:02:39 +02:00
Mathias
80e58426fc Add flash example & flash HIL test 2022-10-26 12:24:04 +02:00
Mathias
ad0eb3f4bd Implement flash padding to 256 under assumption that all QSPI NOR flashes are MultiwriteNorFlashes 2022-10-24 12:17:22 +02:00
Mathias
8d809c96ec Merge branch 'master' of https://github.com/embassy-rs/embassy into embassy-rp/flash 2022-10-24 12:14:26 +02:00
ivmarkov
f78c706b89 Address review feedback 2022-10-24 11:10:59 +03:00
ivmarkov
4d5550070f Change time Driver contract to never fire the alarm synchronously 2022-10-24 09:17:43 +03:00
bors[bot]
495ca6108c
Merge #1020
1020: Fix mistaken EP_IN_WAKERS r=Dirbaio a=mkj

I'm not totally certain, but this looks like a typo?

Co-authored-by: Matt Johnston <matt@ucc.asn.au>
2022-10-21 20:43:14 +00:00
Matt Johnston
866a42f3ae rp usb: wait for accept() completion
This ensures that the current response has finished being sent
before the subsequent set_address() happens. Otherwise connecting
a device is intermittent, can fail depending on timing.
2022-10-21 22:02:13 +08:00
Matt Johnston
f45d34ce7c Fix mistaken EP_IN_WAKERS 2022-10-20 23:46:02 +08:00
Jeremy Fitzhardinge
02a3cdb507 Associate state with the instance rather than having a separate array 2022-10-17 21:50:40 -07:00
Jeremy Fitzhardinge
e4c2b2aa9a rp i2c: have separate wakers for each i2c unit
If they both share one waker, there's the possibility that some wakeups
could get lost.
2022-10-16 18:00:23 -07:00