Ulf Lilleengen
cbff0398bb
Add IRQ-driven buffered USART implementation for STM32 v2 usart ( #356 )
...
* Add IRQ-driven buffered USART implementation for STM32 v2 usart
* Implementation based on nRF UARTE, but simplified to not use DMA to
avoid complex interaction between DMA and USART.
* Implementation of AsyncBufRead and AsyncWrite traits
* Some unit tests to ring buffer
* Update polyfill version
* Update sub module to get usart IRQ fix
2021-08-16 17:16:49 +02:00
Dario Nieuwenhuis
b1d631d639
stm32/time: add Cargo features to choose tim2/tim3
2021-08-05 19:14:09 +02:00
Bob McWhirter
63b32b39e1
Use an em bikeshed instead of an underscore bikeshed.
2021-08-02 13:29:06 -04:00
Bob McWhirter
5f9447abb4
Put the implicit memory.x behind a memory_x
feature on embassy-stm32.
2021-08-02 13:21:30 -04:00
Dario Nieuwenhuis
7bfb763e09
Rename embassy-extras to embassy-hal-common
2021-07-29 13:44:51 +02:00
Dario Nieuwenhuis
f916fe5476
all hals: reexport PAC if unstable-pac
feature is set.
2021-07-14 22:19:04 +02:00
Dario Nieuwenhuis
35a76c364a
embassy/time: make optional via Cargo feature
2021-07-12 03:45:48 +02:00
Thales Fragoso
797534d1a6
Update features to include F0
2021-06-22 14:41:42 -03:00
Thales Fragoso
098ce6e740
stm32h7: Add ethernet example
2021-06-16 16:48:35 +02:00
Thales Fragoso
77546825a1
stm32: Make vcell dependency optional
2021-06-16 16:48:35 +02:00
Thales Fragoso
598201bff3
eth-v2: Make embassy-net optional
2021-06-16 16:48:35 +02:00
Thales Fragoso
46e1bae9e3
eth-v2: Start Ethernet peripheral implementation
2021-06-16 16:48:35 +02:00
Ulf Lilleengen
b6a8703698
Add support for generating PAC for dual cores
...
* Chips that have multiple cores will be exposed as chipname_corename,
i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
and pick the first and only core from the list
* Add support for stm32wl55 chip family
2021-06-16 15:12:07 +02:00
Dominik Boehi
0eab96f573
Initial support and example for STM32WB55
2021-06-12 07:06:36 +02:00
Dario Nieuwenhuis
0ffa78aca1
Use macrotables from build.rs
2021-06-07 05:12:10 +02:00
Ulf Lilleengen
1a9a619033
Implement togglable output pin for Output
2021-05-31 09:33:33 +02:00
Dario Nieuwenhuis
60f12c78dd
Add resolver=2
2021-05-31 02:43:59 +02:00
Dario Nieuwenhuis
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
Bob McWhirter
a9ec941dca
i2c v1
2021-05-25 14:47:07 -04:00
Ulf Lilleengen
1c10e746b6
Re-adds embassy macros for stm32
...
* Hook RCC config into chip config and use chip-specific RCC init
function
* RTC/clock setup is ignored for now
2021-05-25 13:30:42 +02:00
Thales Fragoso
9c5d4d9f8a
STM32 Clock: Use atomic-polyfill
2021-05-23 17:22:07 -03:00
Thales Fragoso
2b1d7fe3ee
Use Mutex and CriticalSection from bare-metal 1.0
2021-05-22 23:53:50 -03:00
Thales Fragoso
5e49a9932f
Update generated files
2021-05-22 22:07:05 -03:00
Thales Fragoso
a0fe9e4645
Add unstable feature to give access to the pac
2021-05-22 15:34:49 -03:00
Thales Fragoso
f9724fa576
Update generated code
2021-05-21 20:20:12 -03:00
Thales Fragoso
82ca5b495e
Update generated code
2021-05-21 20:14:52 -03:00
Thales Fragoso
7e388fcf58
Add pac RCC for H7 (generated)
2021-05-21 20:11:27 -03:00
Dario Nieuwenhuis
0d08e65235
Regen
2021-05-21 19:05:21 +02:00
Bob McWhirter
a4fd1282e9
Generate _spi_v3 items.
2021-05-17 11:34:36 -04:00
Dario Nieuwenhuis
f7858631d8
stm32: fix build, add ci
2021-05-17 03:16:58 +02:00
Thales Fragoso
86063ac2a2
Update generated code
2021-05-14 23:53:12 -03:00
Thales Fragoso
a5d473be0e
Fix RNG interrupt name
2021-05-14 23:47:56 -03:00
Thales Fragoso
2cb66d6032
Update generated code
2021-05-14 23:44:51 -03:00
Thales Fragoso
ad720f83df
Expose data transfer timeout and implement configuration for BusWidth one
2021-05-14 23:43:11 -03:00
Thales Fragoso
359aaa5aeb
Implement embedded-sdmmc traits
2021-05-14 23:43:09 -03:00
Thales Fragoso
0b607ca80a
Initial H7 sdmmc support
2021-05-14 23:40:28 -03:00
Bob McWhirter
9e93a0999f
Add SPIv1, use cfg_attr to pick correct impl.
...
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
2021-05-13 14:28:53 -04:00
Bob McWhirter
0470abb353
Checkpoint.
2021-05-10 15:33:37 -04:00
Dario Nieuwenhuis
ac616a6dcf
Add dma scaffolding
2021-05-10 01:20:04 +02:00
Bob McWhirter
e8537ca9c2
Implement async RNG, including rand_core sync traits.
2021-05-06 14:35:46 -04:00
Dario Nieuwenhuis
f5f98cdeab
Autogenerate features for family, peripherals and peripheral versions
2021-05-06 03:59:16 +02:00
Dario Nieuwenhuis
23ca2f9174
Autogenerate the tailored PAC for each chip
2021-05-06 03:43:46 +02:00
Bob McWhirter
14ce02eecf
Add the leaf features for peripherals.
2021-05-05 11:06:03 -04:00
Bob McWhirter
d8156b43b1
Generate some chip features by peripherals.
2021-05-05 11:01:02 -04:00
Dario Nieuwenhuis
7ef5806168
stm32: codegen interrupts
2021-05-01 03:08:52 +02:00
Bob McWhirter
0713947d67
Stub in RNG impl.
2021-04-26 14:11:46 -04:00
Dario Nieuwenhuis
29b5bae1d1
Codegen PoC
2021-04-20 03:37:49 +02:00
Dario Nieuwenhuis
aa65d5ccaf
it's alive
2021-04-20 02:30:13 +02:00
xoviat
7cb46ac720
stm32: fix usb
2021-04-06 14:23:13 -05:00
xoviat
6416f2fc08
stm32: use crates version
2021-04-06 13:56:22 -05:00
xoviat
009e1896bf
stm32: consolidate crates
2021-03-30 10:05:52 -05:00
xoviat
9e687ade64
Merge branch 'master' of https://github.com/akiles/embassy into proc-macro
2021-03-27 21:31:49 -05:00
xoviat
3242990690
Merge branch 'master' of https://github.com/akiles/embassy into st-usb
2021-03-27 21:24:21 -05:00
xoviat
6ee9e012fc
add embassy::main and implement for stm32f4
2021-03-27 17:27:39 -05:00
xoviat
6f597653af
stm32: consolidate modules
2021-03-26 19:34:52 -05:00
Thales Fragoso
d4f35c1729
Move USB to embassy-extras
2021-03-19 20:49:15 -03:00
xoviat
03ecc91d55
stm32: consolidate functionality into new pkg
2021-03-19 15:26:20 -05:00