Commit Graph

1580 Commits

Author SHA1 Message Date
5322e293bd Merge #461
461: nrf: add initial nrf5340 support r=Dirbaio a=Dirbaio

Thanks to `@diondokter's` work on DPPI this was quite easy! :) 

TODO:
- [ ] Add config option to enable 128mhz
- [ ] Add config option to unlock APPROTECT automatically.
- [ ] Add a way to boot net (config option or API?)
- [ ] Support WDT (there's WDT0, WDT1. Needs some refactor)
- [ ] Support NVMC
- [ ] Support TEMP

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-11-07 22:58:27 +00:00
90095adedf Merge #471
471: Update stm32-data r=Dirbaio a=Dirbaio

Updates to include https://github.com/embassy-rs/stm32-data/pull/98 to check I haven't broken anything.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-11-05 18:31:19 +00:00
a8c78a3807 Update stm32-data 2021-11-05 19:30:53 +01:00
5d863ad19f Merge #469
469: Add support for STM32H723 and fix eth example. r=matoushybl a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2021-11-04 15:28:09 +00:00
9b5d9fbfca Fix v2 ethernet pin definitions. Fix ethernet example for H7 nucleos. 2021-11-04 16:25:30 +01:00
26f86d7f36 Merge #470
470: Add TCP listen. r=Dirbaio a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2021-11-04 12:49:41 +00:00
d742d0252e Add TCP listen. 2021-11-04 13:34:13 +01:00
1bf6e646c9 Merge #465
465: Adjust for STM32U5. r=lulf a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
2021-11-02 20:42:41 +00:00
f9c266bc10 Omg. More formatting. 2021-11-02 16:06:49 -04:00
16c88e3094 Need to include a bit of embassy for the NVIC. 2021-11-02 15:58:40 -04:00
9deafa8bab Remove unused imports. 2021-11-02 15:56:04 -04:00
d1272e00bb Prefix unused variable for now. 2021-11-02 15:45:56 -04:00
44056c2e75 Less allowy. 2021-11-02 15:32:20 -04:00
569ecd699d Merge #467
467: docs: fix some `cargo doc` warnings r=lulf a=numero-744

There are still 3 warnings (below)

```
 Documenting embassy v0.1.0 (embassy)
warning: unresolved link to `channel`
   --> src/channel/mpsc.rs:241:22
    |
241 |     /// [`channel`]: channel
    |                      ^^^^^^^ no item named `channel` in scope
    |
    = note: `#[warn(rustdoc::broken_intra_doc_links)]` on by default
    = help: to escape `[` and `]` characters, add '\' before them like `\[` or `\]`

warning: unresolved link to `Task::spawn`
   --> src/executor/raw/mod.rs:105:12
    |
105 | /// with [`Task::spawn()`], which will fail if it is already spawned.
    |            ^^^^^^^^^^^^^ no item named `Task` in scope

warning: public documentation for `spawn` links to private item `Executor::spawn`
   --> src/executor/raw/mod.rs:156:17
    |
156 |     /// cause [`Executor::spawn()`] to return the error.
    |                 ^^^^^^^^^^^^^^^^^ this item is private
    |
    = note: `#[warn(rustdoc::private_intra_doc_links)]` on by default
    = note: this link will resolve properly if you pass `--document-private-items`

warning: `embassy` (lib doc) generated 3 warnings
```

Co-authored-by: Côme ALLART <come.allart@etu.emse.fr>
2021-11-02 19:31:15 +00:00
076c795ebb Even more allowed unused. 2021-11-02 15:28:14 -04:00
6bbf450478 Allow unused macros temporarily until U5 supports DMA. 2021-11-02 15:20:42 -04:00
ee1ea44b60 Add stm32u5 examples to CI run. 2021-11-02 15:11:30 -04:00
eaaaa2460a Formatting, per usual. 2021-11-02 14:53:53 -04:00
3ab1775820 Add STM32U5 example. 2021-11-02 14:43:42 -04:00
11b0a89b6a Merge #466
466: Update versions of critical-section and atomic-polyfill r=lulf a=lulf



Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2021-11-02 18:10:01 +00:00
205a223af3 Update versions of critical-section and atomic-polyfill 2021-11-02 18:52:03 +01:00
3dd39e3d46 docs: fix some cargo doc warnings 2021-11-02 18:49:01 +01:00
705523d0ea Fix formatting. 2021-11-02 12:13:42 -04:00
29ff0317a3 Update stm32-data. 2021-11-02 12:06:32 -04:00
f12b70535b Adjust for STM32U5. 2021-11-02 12:05:24 -04:00
3dcf899bab Merge #462
462: Add the `embassy_traits::i2c::WriteIter` trait r=Dirbaio a=ithinuel

This trait makes the parallel with `embedded_hal::i2c::WriteIter`.

It allows to fetch bytes to write from an Iterator rather than requiring an allocation for an array.

It is provided as an extra Trait to avoid breaking existing implementations of `embassy_traits::i2c::I2c`.

Co-authored-by: Wilfried Chauveau <wilfried.chauveau@ithinuel.me>
2021-10-30 14:35:26 +00:00
2d475b80d9 Add IntoIterator trait bound on Future trait's parameter
The parameter is also renamed from `U` to `V` to avoid confusion with the
type parameter `U` from the `write_iter` function that follows.
2021-10-29 20:37:00 +01:00
4d75035098 Add the embassy_traits::i2c::WriteIter trait
This trait makes the parallel with `embedded_hal::i2c::WriteIter`.

It allows to fetch bytes to write from an Iterator rather than requiring
an allocation for an array.

It is provided as an extra Trait to avoid breaking existing implementations
of `embassy_traits::i2c::I2c`.
2021-10-29 12:34:49 +01:00
663141b4e4 nrf: add initial nrf5340 support 2021-10-28 03:36:25 +02:00
dfccb84fcb Merge #457
457: nrf91: support running in both S and NS mode. r=Dirbaio a=Dirbaio

- Cargo feature `nrf9160` is now `nrf9160-s` or `nrf9160-ns`
- "fake-PAC" renames everything appropriately so there's no need to spam cfg's everywhere.

With `nrf9160-s`  you can now run code without flashing any weird SPM/bootloader. Tested on nrf9160-dk.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-10-27 22:43:35 +00:00
b636acf115 Merge #459
459: Update stm32-data to main r=Dirbaio a=lulf

I'm getting some issue updating to latest embassy rev, trying to sync it with latest stm32-data to see if that helps.

Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2021-10-26 19:47:46 +00:00
a420491184 Update stm32-data to main 2021-10-26 21:45:08 +02:00
9393cd4487 Merge #458
458: Enable the DMAMUX clocks. r=Dirbaio a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
2021-10-26 18:37:54 +00:00
bbff98ed0d Move the use inside the macro call, inside another set of braces in case it percolates up twice. 2021-10-26 14:34:03 -04:00
a72816492a Only attempt to enable the dmamux peri clock if it has an enable bit. 2021-10-26 14:19:03 -04:00
959aecf6ac Enable the DMAMUX clocks. 2021-10-26 14:01:39 -04:00
c995a97f20 nrf91: support running in both S and NS mode. 2021-10-26 17:40:07 +02:00
a6fe031d34 Merge #437
437: Initial support for STM32F767ZI. r=Dirbaio a=matoushybl

This PR adds support for the STM32F767ZI, it adds examples and RCC setup.
It is greatly based on the F4 source code and the f7-hal.

This PR is based on the pending PR in stm32-data: https://github.com/embassy-rs/stm32-data/pull/92

I am looking forward to your feedback on improving it and adding support for more peripherals and devices in the F7 family.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-10-26 15:37:04 +00:00
0fc92866b0 Add missing examples to Cargo.example.toml 2021-10-26 17:33:28 +02:00
cf47676dac Add stm32f7 to CI 2021-10-26 17:33:28 +02:00
015cad84dd Initial support for STM32F767ZI. 2021-10-26 17:33:28 +02:00
7cb34760c4 Merge #427
427: New nrf PPI api (with DPPI support for nRF91 & nRF53) r=Dirbaio a=diondokter

- Added _ppi and _dppi features to distinguish between the new and the old peripheral.
- Removed ConfigurableChannel and added capacity numbers to the channels
- Replaced the PPI api with a new one using the DPPI terminology (publish & subscribe)
- Updated all tasks and event registers for DPPI

My proposal for the new API.
Tested on my nRF52840 and nRF9160.

Biggest changes for nRF52 is that there's no longer a distinction made between fork task and normal task. You now subscribe tasks to a channel and at runtime it is checked whether or not there's still room for another subscription.
Same for events.

There are differences between the PPI and DPPI though:
- With the PPI you have a limited amount of tasks and events per channel, but a task or event can be used on multiple channels at the same time.
- With the DPPI you have an unlimited amount of tasks and events per channel, but every task or event can only be used on 1 channel.
This is all checked at runtime.

Currently you need to track which tasks and events are assigned to a channel in order to unassign them. For the PPI this data is stored centrally in the registers, so it would be easy to create e.g. `clear_all` and `get_subscribed_tasks` functions. But for the DPPI that data is stored decentrally and so would need some manual tracking.

If there are requests for tracking functionality, then it should be able to be made relatively easy. But for now this API is fine I think.

Co-authored-by: Dion Dokter <dion@tweedegolf.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-10-26 15:00:46 +00:00
36d3eda2f9 ppi: simplify driver creation.
Moving `new_*` to the version-specific mod allows doing the correct
register writes right there in `new`, without needing abstractions
like `enable_all`/`disable_all`.
2021-10-26 16:52:51 +02:00
c63d747209 Fewer channel traits, more cfg to make the system work 2021-10-26 14:47:34 +02:00
4d3341dbb9 Fixed examples 2021-10-26 14:47:33 +02:00
6205d6da47 typo 2021-10-26 14:47:33 +02:00
a6c84cb915 - Interconnect is now PPI again
- Scary pointer math is now contained in the tasks and events
- ppi now sets the tasks and events immediately and the struct is now zero-sized
- StaticToOne is renamed to ZeroToOne
- Used DPPI tasks and events now panic when enabled twice
2021-10-26 14:47:31 +02:00
531dfcffb3 fmt 2021-10-26 14:47:13 +02:00
11655af034 Another redo using the feedback.
PPI is now split up into PPI and DPPI under the name 'interconnect'.
The tasks and events are tracked and reset in the drop function.
2021-10-26 14:47:12 +02:00
e6ec81b999 Fixed examples and added defmt format to the new error types 2021-10-26 14:46:39 +02:00