Commit Graph

42 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
a1d45303c3 stm32/test: fix race condition in uart_dma. 2023-05-01 23:20:51 +02:00
Dario Nieuwenhuis
7601779693 stm32/test: cleanup ringbuffer test, exit on success (transferring 100kb) 2023-05-01 23:20:51 +02:00
Dario Nieuwenhuis
1806422763 stm32/test: add real defmt timestamp 2023-05-01 23:20:51 +02:00
Dario Nieuwenhuis
96e8a7ddb9 stm32/uart: feature-gate ringbuffer out when using gpdma, not supported yet. 2023-05-01 22:43:23 +02:00
Rasmus Melchior Jacobsen
fc268df6f5 Support overflow detection for more than one ring-period 2023-05-01 22:42:36 +02:00
Rasmus Melchior Jacobsen
49455792cb Ring-buffered uart rx with one-period overrun detection 2023-05-01 22:42:36 +02:00
xoviat
0d82ebea29 stm32/rtc: fix datetime and add f4 test 2023-04-25 17:35:01 -05:00
Dario Nieuwenhuis
e63a34ba21 stm32/sdmmc: add hil test for f4. 2023-04-17 21:49:34 +02:00
Dario Nieuwenhuis
f5df567619 stm32/test: add C0 hil tests. 2023-04-11 14:16:32 +02:00
Dario Nieuwenhuis
dbfd28130f stm32/test: add h5 hil tests. 2023-04-10 15:25:11 +02:00
Guillaume MICHEL
9cac649fcf stm32: Add support for read_until_idle on UART 2022-10-26 19:06:18 +02:00
Dario Nieuwenhuis
461cce255e tests/stm32: add lpuart test on stm32wb55 2022-08-20 03:42:55 +02:00
Dario Nieuwenhuis
5daa173ce4 Split embassy-time from embassy-executor. 2022-08-18 01:22:30 +02:00
Dario Nieuwenhuis
fc6e1e06b3 Remove HAL initialization from #[embassy::main] macro. 2022-08-17 22:16:46 +02:00
Dario Nieuwenhuis
a0f1b0ee01 Split embassy crate into embassy-executor, embassy-util. 2022-07-29 23:40:36 +02:00
amugniere@gmail.com
e4a36e1d98 rustfmt on previously edited files 2022-07-10 21:08:12 +02:00
amugniere@gmail.com
94c13eb2af forgotten file 2022-07-08 22:34:17 +02:00
amugniere@gmail.com
abba86d1ba Have added doc + minor correction 2022-07-08 22:24:29 +02:00
amugniere@gmail.com
dda528808a Flex/ output open drain test done 2022-07-08 22:16:01 +02:00
amugniere@gmail.com
00df9b507c Flex/ input pull up test done 2022-07-08 22:10:52 +02:00
amugniere@gmail.com
1d91405d4d Flex/ input pull down test done 2022-07-08 22:08:14 +02:00
amugniere@gmail.com
555f18aa95 Flex/ input no pull test done 2022-07-08 22:02:49 +02:00
amugniere@gmail.com
f911ad25c3 Flex/ Test initial output test done 2022-07-08 21:59:09 +02:00
Dario Nieuwenhuis
a8703b7598 Run rustfmt. 2022-06-12 22:22:31 +02:00
Dario Nieuwenhuis
009bb8e4e1 stm32: add stm32u5 GPDMA, SPIv4 support, add HIL tests. 2022-04-27 01:16:14 +02:00
Dario Nieuwenhuis
1dc618f0e4 stm32/spi: fix blocking transfer hanging after async. 2022-03-15 04:13:33 +01:00
Dario Nieuwenhuis
3d6592d22d stm32/spi: check zero-length trasnfers. 2022-03-15 02:14:24 +01:00
Dario Nieuwenhuis
06f35c2517 stm32/spi: more exhaustive test. 2022-03-15 02:14:24 +01:00
Dario Nieuwenhuis
306110f56e stm32/spi: implement async trasnfer_in_place 2022-03-15 00:40:48 +01:00
Grant Miller
fe6d7ef5fe Update tests 2022-03-08 17:35:37 -06:00
Dario Nieuwenhuis
e39fd4a736 stm32: add stm32f103 bluepill to HIL tests. 2022-02-24 00:37:15 +01:00
Ulf Lilleengen
4032fc0655 Support unstable-trait feature for stm32 2022-01-26 22:39:06 +01:00
Dario Nieuwenhuis
889d757ab8 stm32/spi: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
c949519714 stm32/usart: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
58fc64722c stm32/gpio: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
ff5583fc73 stm32/tests: add uart, uart_dma tests. 2021-12-08 05:43:39 +01:00
Dario Nieuwenhuis
e673ba8ea2 stm32/tests: add DMA SPI 2021-12-07 05:15:45 +01:00
Dario Nieuwenhuis
fa36fa2808 stm32/tests: add spi 2021-12-07 05:01:01 +01:00
Dario Nieuwenhuis
a14c4f49c4 stm32/tests: higher clocks for H7 2021-12-07 05:00:35 +01:00
Dario Nieuwenhuis
17c5dc496e stm32/tests: add stm32h755zi, stm32wb55rg 2021-12-07 01:24:26 +01:00
Dario Nieuwenhuis
dde6607aec Add timer test, add g0, g4 tests. 2021-12-07 00:29:41 +01:00
Dario Nieuwenhuis
dd32358d6b stm32: add gpio HIL test 2021-12-06 22:05:41 +01:00