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1683 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
852ca5a1c5 stm32/usart_v1: implement tx 2021-05-17 01:04:51 +02:00
Dario Nieuwenhuis
bfc7f52e6d Remove stm32. 
stm32 developemnt continues in the `stm32-neo` branch for now.
 2021-05-17 00:57:32 +02:00
Thales Fragoso
0f5ba6d4a9 SDMMC: Implement Default for Config and add docs 2021-05-15 21:21:06 -03:00
Thales Fragoso
86063ac2a2 Update generated code 2021-05-14 23:53:12 -03:00
Thales Fragoso
1e5f25aa41 Move parameters to a config struct 2021-05-14 23:47:58 -03:00
Thales Fragoso
a5d473be0e Fix RNG interrupt name 2021-05-14 23:47:56 -03:00
Thales Fragoso
2cb66d6032 Update generated code 2021-05-14 23:44:51 -03:00
Thales Fragoso
ad720f83df Expose data transfer timeout and implement configuration for BusWidth one 2021-05-14 23:43:11 -03:00
Thales Fragoso
359aaa5aeb Implement embedded-sdmmc traits 2021-05-14 23:43:09 -03:00
Thales Fragoso
a130499c9a Get rid of some warnings 2021-05-14 23:42:12 -03:00
Thales Fragoso
c183c352c7 SDMMC: Implement read and write 2021-05-14 23:42:12 -03:00
Thales Fragoso
490152d028 Better interrupt handling 2021-05-14 23:42:09 -03:00
Thales Fragoso
72fb3a7520 Init working :) 2021-05-14 23:40:28 -03:00
Thales Fragoso
0b607ca80a Initial H7 sdmmc support 2021-05-14 23:40:28 -03:00
Dario Nieuwenhuis
180ca48d34 Remove AF_NUM const from pin traits, only use af_num fn 2021-05-15 03:18:15 +02:00
Dario Nieuwenhuis
e63c4bde0b stm32: remove psel_bits 2021-05-15 03:07:59 +02:00
Dario Nieuwenhuis
8bb1bc3507 Move pin configuration to gpio mod 2021-05-15 03:07:59 +02:00
Bob McWhirter
2569d38ab4 Adjust pin-names to FooPin. 
Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
 2021-05-14 10:11:43 -04:00
Bob McWhirter
9e93a0999f Add SPIv1, use cfg_attr to pick correct impl. 
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
 2021-05-13 14:28:53 -04:00
Ulf Lilleengen
3b86e85770 Bump version of critical-section to 0.2.1 2021-05-13 18:17:50 +02:00
Bob McWhirter
07db3ed7c1 Further improvement to SPIv2. 2021-05-12 14:18:42 -04:00
Bob McWhirter
36c16dbef8 Continuing to update clocks (unused now) and SPI 2021-05-12 10:46:18 -04:00
Bob McWhirter
7d52e1b350 Further work on SPI v2 blocking. 2021-05-11 11:25:01 -04:00
Dario Nieuwenhuis
e0809ab0fb Switch to use PrioritX enums. 2021-05-11 01:34:24 +02:00
Dario Nieuwenhuis
7fa0e57172 Use critical_section crate 2021-05-11 01:15:30 +02:00
Bob McWhirter
8a79e2cbbf Draft for partial review. Do not merge. 2021-05-10 16:17:58 -04:00
Bob McWhirter
0470abb353 Checkpoint. 2021-05-10 15:33:37 -04:00
Dario Nieuwenhuis
c4294d97ff Fix DMA 2021-05-10 21:31:59 +02:00
Dario Nieuwenhuis
ac616a6dcf Add dma scaffolding 2021-05-10 01:20:04 +02:00
Dario Nieuwenhuis
9492b8555c rustfmt rng 2021-05-10 01:19:07 +02:00
Bob McWhirter
75fe03a7e6 Further clean-up and adjustments. Follow RM for FIPS. 2021-05-06 16:38:53 -04:00
Bob McWhirter
e8898b48f9 Clean up the impl_rng!() argument. 
use poll_fn instead of impl'ing a Future directly.
Return errors when error conditions exist.
 2021-05-06 14:58:41 -04:00
Bob McWhirter
e8537ca9c2 Implement async RNG, including rand_core sync traits. 2021-05-06 14:35:46 -04:00
Dario Nieuwenhuis
386e4bf0de Remove unused files 2021-05-06 04:01:54 +02:00
Dario Nieuwenhuis
f5f98cdeab Autogenerate features for family, peripherals and peripheral versions 2021-05-06 03:59:16 +02:00
Dario Nieuwenhuis
23ca2f9174 Autogenerate the tailored PAC for each chip 2021-05-06 03:43:46 +02:00
Bob McWhirter
4257512eb2 Limit to pub(crate). 2021-05-05 13:15:07 -04:00
Bob McWhirter
12c510f222 Rework pac re-exporting, canonicalize syscfg path, use it plus SYSCFG_BASE. 2021-05-05 13:12:53 -04:00
Bob McWhirter
14ce02eecf Add the leaf features for peripherals. 2021-05-05 11:06:03 -04:00
Bob McWhirter
d8156b43b1 Generate some chip features by peripherals. 2021-05-05 11:01:02 -04:00
Bob McWhirter
7262c54f81 Move exti to use the const addr. 2021-05-05 10:38:57 -04:00
Bob McWhirter
e248baecd4 Regenerate with SYSCFG and EXTI base addresses. 2021-05-05 10:18:09 -04:00
Bob McWhirter
5495ad453b Bump stm32-data to latest. 2021-05-05 09:58:38 -04:00
Dario Nieuwenhuis
7ef5806168 stm32: codegen interrupts 2021-05-01 03:08:52 +02:00
Bob McWhirter
0713947d67 Stub in RNG impl. 2021-04-26 14:11:46 -04:00
Dario Nieuwenhuis
936efd164d USART codegen 2021-04-25 22:35:51 +02:00
xoviat
cb1b240d8b stm32: fix spi/write 2021-04-24 17:10:51 -05:00
xoviat
1fef2d08fb stm32: use interrupt for spi transmit 2021-04-24 13:07:28 -05:00
Dario Nieuwenhuis
6ba915a308 Codegen GPIO pins 2021-04-23 23:47:34 +02:00
Dario Nieuwenhuis
578d920723
Merge pull request #145 from lulf/generic-config 
Pass config directly to chip specific configure function
 2021-04-23 21:29:13 +02:00
Dario Nieuwenhuis
8fb1fc045f Add stm32f401 peripherals 2021-04-23 19:32:47 +02:00
Dario Nieuwenhuis
8f24daf096 Actually do not build CAN on stm32f401 2021-04-23 19:19:49 +02:00
Dario Nieuwenhuis
c4e4401af4 Do not build CAN on stm32f401 2021-04-23 19:11:38 +02:00
Ulf Lilleengen
9586365b07 Pass config directly to chip specific configure function 
This removes the need to duplicate the configuration for each individual
chip, but will instead pass on the configuration specified in the config
attribute.

Update nrf, stm32, rp macros with passing the config to a per-chip
configure function which assumes the appropriate configuration to be
passed to it.

To demonstrate this feature, the stm32l0xx clock setup and RTC is added which exposes
clock configuration different from stm32f4xx (and has a different set of timers and HAL APIs).
 2021-04-22 09:10:46 +02:00
Dario Nieuwenhuis
29b5bae1d1 Codegen PoC 2021-04-20 03:37:49 +02:00
Dario Nieuwenhuis
ef4d9d243e wip usart 2021-04-20 02:44:55 +02:00
Dario Nieuwenhuis
170536b073 stm32: add exti 2021-04-20 02:44:54 +02:00
Dario Nieuwenhuis
258ba533bd Implement GPIO input 2021-04-20 02:30:14 +02:00
Dario Nieuwenhuis
aa65d5ccaf it's alive 2021-04-20 02:30:13 +02:00
Dario Nieuwenhuis
c15411d1bd Remove Pin from SPI 2021-04-14 17:04:40 +02:00
Dario Nieuwenhuis
8b1ffb2cb7 Remove Pin from GPIO traits 2021-04-14 17:04:40 +02:00
Dario Nieuwenhuis
59ccc45f28 Remove pin from Uart 2021-04-14 17:04:40 +02:00
xoviat
8e040cc5d2
stm32: add draft spi trait (#130) 2021-04-13 16:11:06 -05:00
xoviat
b1822f1438 stm32: add f407 2021-04-13 13:50:59 -05:00
xoviat
7cb46ac720 stm32: fix usb 2021-04-06 14:23:13 -05:00
xoviat
12bd3c5ea5 stm32: fix peripherals 2021-04-06 14:10:47 -05:00
xoviat
47843fcba5 stm32: fix interrupts 2021-04-06 13:58:55 -05:00
xoviat
6416f2fc08 stm32: use crates version 2021-04-06 13:56:22 -05:00
xoviat
6f0fb6cab1 remove qei trait 2021-04-02 13:52:31 -05:00
xoviat
009e1896bf stm32: consolidate crates 2021-03-30 10:05:52 -05:00
xoviat
50ecb7d42b cleanup and consolidate peripherals macro 2021-03-29 08:57:40 -05:00
xoviat
f4791b826a
Merge pull request #109 from xoviat/proc-macro 
add embassy::main
 2021-03-28 17:56:44 -05:00
xoviat
8d014f7955 restrict usb to stm32f4 2021-03-27 21:42:26 -05:00
xoviat
9e687ade64 Merge branch 'master' of https://github.com/akiles/embassy into proc-macro 2021-03-27 21:31:49 -05:00
xoviat
3242990690 Merge branch 'master' of https://github.com/akiles/embassy into st-usb 2021-03-27 21:24:21 -05:00
xoviat
6ee9e012fc add embassy::main and implement for stm32f4 2021-03-27 17:27:39 -05:00
xoviat
6f597653af stm32: consolidate modules 2021-03-26 19:34:52 -05:00
xoviat
b79e9c2927 stm32: fix exti to require SysCfg.constrain() 2021-03-22 13:04:28 -05:00
xoviat
b5f80787fe stm32: remove SDIO interrupt 2021-03-20 18:23:20 -05:00
xoviat
bf39822092 consolidate ExtiPin into stm32 package 2021-03-20 11:07:16 -05:00
Thales Fragoso
d4f35c1729 Move USB to embassy-extras 2021-03-19 20:49:15 -03:00
Thales Fragoso
615bb33dcb USB: Use updated PeripheralMutex 2021-03-19 19:44:30 -03:00
xoviat
03ecc91d55 stm32: consolidate functionality into new pkg 2021-03-19 15:26:20 -05:00