Commit Graph

1323 Commits

Author SHA1 Message Date
218b44652c Rebase on master 2023-02-13 14:55:15 +01:00
363054de98 stm32: doc all chips. 2023-02-13 03:02:12 +01:00
1e36c91bf8 stm32: fix fmc-related build failures on some F4's 2023-02-13 02:22:06 +01:00
d21643c060 fix "prescaler none" which incorrectly set "prescaler divided by 3" 2023-02-12 11:36:57 +01:00
2b6654541d rustfmt 2023-02-09 13:01:44 +02:00
43d018b67f Use rng_v2 cfg instead of chip specific for seed error recover hack 2023-02-09 12:44:20 +02:00
bab4277a86 hack for STM32WL, rcc reset in case of seed error
The STM32WL series has a more complicated rng device that gets stuck
when there is a seed error.
2023-02-08 17:57:37 +02:00
da6b1e8399 Reset rng in case of clock or seed error 2023-02-08 17:52:49 +02:00
4a224efe75 Merge #1200
1200: feat(stm32): Add 16 data bit fmc ctor r=Dirbaio a=rmja

This has been validated with the Is42s16400j sdram on stm32f429.

Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-02-07 22:24:15 +00:00
c4a2c62096 Merge #1199
1199: STM32 SPI: Set clk-pin pull-up/-down to match spi clock polarity r=Dirbaio a=jr-oss

Fixes #1094 

There are some proposed solutions in #1094 

> Keep the DMA transaction open across calls to read/write
        This may be problematic if the user changes bus settings between calls, and also the reference manual says the chip should not be placed into low power mode while SPI is enabled

As already described, this is problematic and against reference manual recommendation

>    Set the CLK (and maybe MOSI) pins as pull-down on setup (or pull-up, depending on config - and this would need to be updated if the user modified the config)
        This is less good than driving the pin to the correct value, but may be better than nothing

That is also my preferred solution. See below citation from reference manual.

>    Document this and require users fix it themselves (add a pull-up/down resistor - or configure the pins as pull-up/pull-down before passing them into SPI setup)

Setting internal pull-up/-down won't work, because `sck.set_as_af()` will change the gpio pull mode to none: https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/gpio.rs#L552-L555

>    Dig around in the reference manual and determine if there is a better way to start/stop a DMA transaction while keeping active control of the clock the whole time

I haven't found a better way

------
From ST reference manual RM0394 (L4) 
(Same note in RM0399 (H7) / RM0038 (L1) / RM0316 /F3)):

    40.4.6
    Communication formats
    ...
    The idle state of SCK must correspond to the polarity selected in the SPIx_CR1 register (by
    pulling up SCK if CPOL=1 or pulling down SCK if CPOL=0).


Co-authored-by: Ralf <jr-oss@gmx.net>
2023-02-07 22:06:25 +00:00
7b11e339bd feat(fmc): Add 16 data bit ctor 2023-02-07 16:06:59 +01:00
1b6aae9dde Also exclude fsmc_v1x3 2023-02-07 15:06:16 +01:00
494a76a0f1 React to updated fsmc versions 2023-02-07 14:14:47 +01:00
218f8e0490 fix(stm32): Align FMC with new versions from stm32-data 2023-02-07 12:17:37 +01:00
c8a7b74bc2 Merge #1192 #1193
1192: stm32/usart: implement stop_bits configuration r=Dirbaio a=pattop



1193: stm32/usart: fix LPUART clock multiplier r=Dirbaio a=pattop

According to RM0351 Rev 9 (L4) and RM0399 Rev 3 (H7):

baud = (256 * clock) / LPUARTDIV


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
2023-02-06 13:39:37 +00:00
e3174d7a99 STM32 SPI: Set clk-pin pull-up/-down to match spi clock polarity
RM0394:

    40.4.6
    Communication formats
    ...
    The idle state of SCK must correspond to the polarity selected in the SPIx_CR1 register (by
    pulling up SCK if CPOL=1 or pulling down SCK if CPOL=0).
2023-02-06 13:23:35 +01:00
fda36fd81b stm32/usart: fix LPUART clock multiplier
According to RM0351 Rev 9 (L4) and RM0399 Rev 3 (H7):

baud = (256 * clock) / LPUARTDIV
2023-02-06 11:22:41 +11:00
64ebb9b7fe stm32/usart: implement stop_bits configuration 2023-02-06 09:44:15 +11:00
0bb6000e5c stm32 gpio implement degrade to AnyPin 2023-02-02 21:42:42 -08:00
ca10fe7135 usb: docs 2023-01-31 22:27:19 +01:00
5e3c33b777 Fix rcc prescaler for wb55 HCLK1
- fix prescaler not divided which incorrectly set prescaler divided by 3
2023-01-21 14:39:25 +01:00
0412d1922c fix embedded-sdmmc integration.
- Rename feature to `embedded-sdmmc`.
- Move embedded-sdmmc fork repo to the embassy-rs org.
- Remove unused features in the fork
- Fix impl in embassy-stm32
- Add to CI so it doesn't break again.
2023-01-21 00:32:34 +01:00
f604153f05 stm32/rcc: print actual freqs on boot. 2023-01-20 16:31:04 +01:00
f0ae1f9133 Merge #1159
1159: stm32 usb otg bug fixes r=Dirbaio a=chemicstry

This fixes a couple of usb otg bugs that surfaced with `usb_ethernet` example from nrf:
- Properly implemented `Endpoint::wait_enabled()`
- Return `EndpointError::Disabled` when neccessary in `Endpoint::write()`


Co-authored-by: chemicstry <chemicstry@gmail.com>
2023-01-18 11:30:44 +00:00
6ab4ecaf83 Stop sampling when exiting the Saadc methods
Prior to this commit, the onDrop function was being dropped immediately and not on exiting the Saadc sampling methods.
2023-01-18 14:51:46 +11:00
b1203bf036 stm32/usb_otg: fix core formatter 2023-01-18 03:06:32 +02:00
f07e59b24a stm32/usb_otg: prevent writes on disabled endpoint 2023-01-18 02:31:28 +02:00
d2f2b451d0 stm32/usb_otg: implement endpoint wait_enabled 2023-01-18 02:29:49 +02:00
2a349afea7 stm32: add stm32c0 support. 2023-01-17 21:28:16 +01:00
aea5a0fd96 Merge #1140
1140: feat(stm32): Let uart implement embedded-io Write trait r=Dirbaio a=rmja



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
2023-01-14 19:45:28 +00:00
16590732f8 Update mod.rs 2023-01-14 07:13:29 +01:00
816b214403 Only implement Write 2023-01-14 07:12:43 +01:00
041531c829 stm32/rcc: fix u5 pll, add hsi48. 2023-01-11 17:57:22 +01:00
0feecd5cde stm32: add USB OTG support.
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-01-11 17:56:47 +01:00
065a0a1ee7 Update stm32-data. 2023-01-11 17:51:30 +01:00
ce842fe28c Refactor embassy-usb address handling to allow reordering of status resoponse 2023-01-11 17:47:12 +01:00
4c4b47f78a feat(stm32): Add embedded-io traits for UartRx and UartTx 2023-01-06 14:24:29 +01:00
5aa59e9737 feat(stm32): Let uart implement embedded-io Read/Write 2023-01-04 12:57:19 +01:00
1f033d509a net: split driver trait to a separate crate. 2022-12-26 04:49:08 +01:00
10c9cc31b1 Remove unnecessary use of atomic-polyfill.
Only use it when CAS is actually needed.
2022-12-23 20:46:49 +01:00
cd9a65ba39 stm32/usb: use separate irq flags.
- Fixes race condition that could cause losing irqs (because `if flags != 0` was clearing all)
- Doesn't need CAS, which is nice for thumbv6.
2022-12-23 20:45:51 +01:00
47a0769fc2 Let repeated clock byte be singular pointer and not array pointer 2022-12-23 15:49:22 +01:00
e9a2c4a9e3 Let start_write_repeated accept pointer instead of slice 2022-12-23 15:40:09 +01:00
662bb5797f fix(stm32): Ensure that gpio speed is VeryHigh for all spi versions
This fixes #1095
2022-12-23 09:34:42 +01:00
2457fcaa35 fix(stm32): Align with updated dma::write_repeated signature 2022-12-23 09:33:34 +01:00
da9ee83756 fix(stm32): Fix write buffer lifetime for repeated writes 2022-12-23 09:32:18 +01:00
5eae295c8a stm32: rename feature net to embassy-net.
The eth code is always built and available, but has no own API (other
than the embassy-net Device impl) to rx/tx packets. We could add this
API in the future, so the feature only means "embassy-net support".
2022-12-13 16:43:25 +01:00
3005ee0178 stm32/eth_v2: update to new embassy-net trait, remove PeripheralMutex. 2022-12-13 16:43:25 +01:00
8f30652109 stm32/eth_v1: update to new embassy-net trait, remove PeripheralMutex. 2022-12-13 16:43:25 +01:00
236d104844 embassy-stm32: add rs485 driver enable to uart 2022-12-09 14:26:09 +01:00