Commit Graph

1927 Commits

Author SHA1 Message Date
Bob McWhirter
f12b70535b Adjust for STM32U5. 2021-11-02 12:05:24 -04:00
Jacob Rosenthal
4647792ad6 seperate start from pwmseq::new 2021-11-01 20:50:18 -07:00
Jacob Rosenthal
49253152cf seperate sequence from duty cycle pwm struct 2021-11-01 20:50:14 -07:00
Jacob Rosenthal
b297e5f7bd led dimming example, dont need to keep all examples, just covering ground to test api 2021-11-01 13:51:40 -07:00
Jacob Rosenthal
74e7f4a227 comments 2021-11-01 13:16:24 -07:00
Jacob Rosenthal
f2cfbe4262 align pwm.set_duty with embedded hal to not be one shot 2021-11-01 13:08:55 -07:00
Jacob Rosenthal
5285179218 generalize new and change pwm example to a servo 2021-11-01 13:08:51 -07:00
Jacob Rosenthal
12b2c5d5f7 better not as a constructor? 2021-11-01 08:54:07 -07:00
Jacob Rosenthal
90be851e4b reduce complexity of loopmode 2021-11-01 08:45:07 -07:00
Jacob Rosenthal
48673e27cd fix max sequence length 2021-11-01 01:20:04 -07:00
Jacob Rosenthal
14dc524b84 documentation 2021-11-01 01:20:01 -07:00
Jacob Rosenthal
7b092f463e clarify infinite 2021-11-01 00:30:42 -07:00
Jacob Rosenthal
72fa1c8482 fix additional to remove stuck light at end 2021-11-01 00:25:08 -07:00
Jacob Rosenthal
d98a1707b9 using write dont need to clear 2021-10-31 23:28:26 -07:00
Jacob Rosenthal
78e382c9aa stop->sequence_stop 2021-10-31 23:13:49 -07:00
Jacob Rosenthal
96df2fdb43 lost comment 2021-10-30 16:23:45 -07:00
Jacob Rosenthal
763e250dfe add ability to configure loop count from 1 to infinite 2021-10-30 16:16:10 -07:00
Jacob Rosenthal
ee8f76537b at least stop on drop 2021-10-30 11:33:28 -07:00
Jacob Rosenthal
6d8198a46a move psel back out of if 2021-10-30 11:33:10 -07:00
bors[bot]
3dcf899bab
Merge #462
462: Add the `embassy_traits::i2c::WriteIter` trait r=Dirbaio a=ithinuel

This trait makes the parallel with `embedded_hal::i2c::WriteIter`.

It allows to fetch bytes to write from an Iterator rather than requiring an allocation for an array.

It is provided as an extra Trait to avoid breaking existing implementations of `embassy_traits::i2c::I2c`.

Co-authored-by: Wilfried Chauveau <wilfried.chauveau@ithinuel.me>
2021-10-30 14:35:26 +00:00
Jacob Rosenthal
ef95441442 a runtime generated sin table example 2021-10-29 17:10:37 -07:00
Jacob Rosenthal
1d1d8a848e simplify api, more interesting example 2021-10-29 16:39:41 -07:00
Jacob Rosenthal
eb0bf1fd7a simple_playback api from nrf sdk 2021-10-29 16:27:26 -07:00
Wilfried Chauveau
2d475b80d9
Add IntoIterator trait bound on Future trait's parameter
The parameter is also renamed from `U` to `V` to avoid confusion with the
type parameter `U` from the `write_iter` function that follows.
2021-10-29 20:37:00 +01:00
Wilfried Chauveau
4d75035098
Add the embassy_traits::i2c::WriteIter trait
This trait makes the parallel with `embedded_hal::i2c::WriteIter`.

It allows to fetch bytes to write from an Iterator rather than requiring
an allocation for an array.

It is provided as an extra Trait to avoid breaking existing implementations
of `embassy_traits::i2c::I2c`.
2021-10-29 12:34:49 +01:00
Dario Nieuwenhuis
663141b4e4 nrf: add initial nrf5340 support 2021-10-28 03:36:25 +02:00
bors[bot]
dfccb84fcb
Merge #457
457: nrf91: support running in both S and NS mode. r=Dirbaio a=Dirbaio

- Cargo feature `nrf9160` is now `nrf9160-s` or `nrf9160-ns`
- "fake-PAC" renames everything appropriately so there's no need to spam cfg's everywhere.

With `nrf9160-s`  you can now run code without flashing any weird SPM/bootloader. Tested on nrf9160-dk.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-10-27 22:43:35 +00:00
bors[bot]
b636acf115
Merge #459
459: Update stm32-data to main r=Dirbaio a=lulf

I'm getting some issue updating to latest embassy rev, trying to sync it with latest stm32-data to see if that helps.

Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2021-10-26 19:47:46 +00:00
Ulf Lilleengen
a420491184 Update stm32-data to main 2021-10-26 21:45:08 +02:00
bors[bot]
9393cd4487
Merge #458
458: Enable the DMAMUX clocks. r=Dirbaio a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
2021-10-26 18:37:54 +00:00
Bob McWhirter
bbff98ed0d Move the use inside the macro call, inside another set of braces in case it percolates up twice. 2021-10-26 14:34:03 -04:00
Bob McWhirter
a72816492a Only attempt to enable the dmamux peri clock if it has an enable bit. 2021-10-26 14:19:03 -04:00
Bob McWhirter
959aecf6ac Enable the DMAMUX clocks. 2021-10-26 14:01:39 -04:00
Dario Nieuwenhuis
c995a97f20 nrf91: support running in both S and NS mode. 2021-10-26 17:40:07 +02:00
bors[bot]
a6fe031d34
Merge #437
437: Initial support for STM32F767ZI. r=Dirbaio a=matoushybl

This PR adds support for the STM32F767ZI, it adds examples and RCC setup.
It is greatly based on the F4 source code and the f7-hal.

This PR is based on the pending PR in stm32-data: https://github.com/embassy-rs/stm32-data/pull/92

I am looking forward to your feedback on improving it and adding support for more peripherals and devices in the F7 family.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-10-26 15:37:04 +00:00
Dario Nieuwenhuis
0fc92866b0 Add missing examples to Cargo.example.toml 2021-10-26 17:33:28 +02:00
Dario Nieuwenhuis
cf47676dac Add stm32f7 to CI 2021-10-26 17:33:28 +02:00
Matous Hybl
015cad84dd Initial support for STM32F767ZI. 2021-10-26 17:33:28 +02:00
bors[bot]
7cb34760c4
Merge #427
427: New nrf PPI api (with DPPI support for nRF91 & nRF53) r=Dirbaio a=diondokter

- Added _ppi and _dppi features to distinguish between the new and the old peripheral.
- Removed ConfigurableChannel and added capacity numbers to the channels
- Replaced the PPI api with a new one using the DPPI terminology (publish & subscribe)
- Updated all tasks and event registers for DPPI

My proposal for the new API.
Tested on my nRF52840 and nRF9160.

Biggest changes for nRF52 is that there's no longer a distinction made between fork task and normal task. You now subscribe tasks to a channel and at runtime it is checked whether or not there's still room for another subscription.
Same for events.

There are differences between the PPI and DPPI though:
- With the PPI you have a limited amount of tasks and events per channel, but a task or event can be used on multiple channels at the same time.
- With the DPPI you have an unlimited amount of tasks and events per channel, but every task or event can only be used on 1 channel.
This is all checked at runtime.

Currently you need to track which tasks and events are assigned to a channel in order to unassign them. For the PPI this data is stored centrally in the registers, so it would be easy to create e.g. `clear_all` and `get_subscribed_tasks` functions. But for the DPPI that data is stored decentrally and so would need some manual tracking.

If there are requests for tracking functionality, then it should be able to be made relatively easy. But for now this API is fine I think.

Co-authored-by: Dion Dokter <dion@tweedegolf.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-10-26 15:00:46 +00:00
Dario Nieuwenhuis
36d3eda2f9 ppi: simplify driver creation.
Moving `new_*` to the version-specific mod allows doing the correct
register writes right there in `new`, without needing abstractions
like `enable_all`/`disable_all`.
2021-10-26 16:52:51 +02:00
Dion Dokter
c63d747209 Fewer channel traits, more cfg to make the system work 2021-10-26 14:47:34 +02:00
Dion Dokter
4d3341dbb9 Fixed examples 2021-10-26 14:47:33 +02:00
Dion Dokter
6205d6da47 typo 2021-10-26 14:47:33 +02:00
Dion Dokter
a6c84cb915 - Interconnect is now PPI again
- Scary pointer math is now contained in the tasks and events
- ppi now sets the tasks and events immediately and the struct is now zero-sized
- StaticToOne is renamed to ZeroToOne
- Used DPPI tasks and events now panic when enabled twice
2021-10-26 14:47:31 +02:00
Dion Dokter
531dfcffb3 fmt 2021-10-26 14:47:13 +02:00
Dion Dokter
11655af034 Another redo using the feedback.
PPI is now split up into PPI and DPPI under the name 'interconnect'.
The tasks and events are tracked and reset in the drop function.
2021-10-26 14:47:12 +02:00
Dion Dokter
e6ec81b999 Fixed examples and added defmt format to the new error types 2021-10-26 14:46:39 +02:00
Dion Dokter
4950682a50 Some extra docs and better naming 2021-10-26 14:46:39 +02:00
Dion Dokter
65628e1f15 - Added _ppi and _dppi to distinguish between the new and the old peripheral.
- Removed ConfigurableChannel and added capacity numbers to the channels
- Replaced the PPI api with a new one using the DPPI terminology (publish & subscribe)
- Updated all tasks and event registers for DPPI
2021-10-26 14:46:39 +02:00
bors[bot]
01e5376b25
Merge #456
456: Fix L4 clock setup for MSI and PLL to allow RNG operation r=Dirbaio a=lulf

Example is tested on STM32L475VG.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2021-10-26 11:59:14 +00:00