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7c78247be3
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66 Commits

Author SHA1 Message Date
Grant Miller
7c78247be3 v2: set frxth and ds in new 2021-12-06 22:36:53 -06:00
Grant Miller
d76bc45e30 Move Spi drop impl to mod 2021-12-06 17:19:55 -06:00
Grant Miller
bd9e730024 Move set_word_size to mod 2021-12-06 16:47:08 -06:00
Grant Miller
a35b7d90bc Add tx_ptr and rx_ptr methods 2021-12-06 16:33:06 -06:00
Grant Miller
a35f337bd6 Move Spi::new and Spi::compute_baud_rate to mod 2021-12-06 15:19:24 -06:00
Grant Miller
75374ce7e8 Fix ssoe in v1 2021-12-06 14:57:53 -06:00
Grant Miller
e1cccc8391 Move Spi to mod (without NoDma defaults) 2021-12-06 14:47:50 -06:00
Grant Miller
aeb69a7665 Track current word size in v2 and v3 also 2021-12-06 14:24:02 -06:00
Grant Miller
d51885c0eb Move WordSize methods to mod 2021-12-06 14:13:25 -06:00
Grant Miller
d426caefbf Move NoPin impls from v1 to mod 2021-12-06 14:02:21 -06:00
Ulf Lilleengen
81ec4c82fd Flush MISO before transfer operation 2021-12-03 09:53:28 +01:00
Matous Hybl
f0cb77443c Fix wrong pin configuration in STM32's SPI v3. 2021-12-01 22:18:14 +01:00
Ulf Lilleengen
cd9a1d547c Ensure SPI DMA write is completed 
Fix a bug where DMA writes were not fully completed and only a single
byte out of two were written.
 2021-11-24 14:59:18 +01:00
Ulf Lilleengen
d2a79a46c5 Configure the correct pin instances 2021-10-21 11:57:00 +02:00
Tobias Pisani
43a7226d8b inline FRE register check for SPI on F1 2021-10-11 23:33:32 +02:00
Tobias Pisani
2cbb8a7ece Add AFType::Input for input configurations. 2021-10-11 22:57:21 +02:00
Tobias Pisani
259e84e68e Make miso/mosi optional when for unidirectional spi 
Only suported on v1 currently
 2021-10-11 22:57:21 +02:00
Tobias Pisani
39880de958 partial alternate function configuration on STM32f1 2021-10-11 22:57:10 +02:00
Tobias Pisani
f9a576d13d feat: Add spi support for STM32F1 variants 2021-10-11 22:39:48 +02:00
Mariusz Ryndzionek
e4b37c40c9 Code review request - moving OutputType to mod sealed 2021-09-24 19:56:48 +02:00
Mariusz Ryndzionek
d371298a27 Small adjustment to 'set_as_af' interface 
Small adjustment to 'set_as_af' interface - v2
 2021-09-24 18:39:07 +02:00
Ulf Lilleengen
9d45018077 Refactor V1 SPI 2021-09-21 14:50:23 +02:00
Ulf Lilleengen
7ad6280e65 Add HAL for SubGhz peripheral for STM32 WL series 
Based on the HAL from stm32wl, the peripheral driver has been
modified to fit into embassy, using the embassy APIs, providing
operation of the radio peripheral.

The initial version does not offer any async APIs, but the example
shows how the radio IRQ can be used to perform async TX of the radio.
 2021-09-02 10:39:56 +02:00
Bob McWhirter
4aa52f1b9e Formatting. 2021-08-24 14:56:45 -04:00
Bob McWhirter
e36ae76e45 Fix blocking-write for SPI. 2021-08-24 14:44:47 -04:00
Dario Nieuwenhuis
7bfb763e09 Rename embassy-extras to embassy-hal-common 2021-07-29 13:44:51 +02:00
Bob McWhirter
83f63890e5 Actually take a &mut of that read slice. 2021-07-23 13:22:39 -04:00
Bob McWhirter
473a83a937 Adjust how we deal with read/write being different length. 
Including some docs about it.
Removing the Rx-enablement for write-only operations.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
f1a3e0e05d As before, EVERY DANG TIME. 
It'll be sweet with intellij-rust-plugin works better.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
b07325b476 Enable DMA for SPIv1 on F4's etc. 2021-07-23 13:22:39 -04:00
Bob McWhirter
8ab82191b7 Every dang time. 2021-07-23 13:22:39 -04:00
Bob McWhirter
a1dac21bdf Make SPIv3 work with DMA. 
Add both DMA and non-DMA example to H7.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
6dbe049468 Add back in the other versions of SPI. 2021-07-23 13:22:39 -04:00
Bob McWhirter
0d2051243e SPIv2 + DMA. 2021-07-23 13:22:39 -04:00
Bob McWhirter
1a03f00b56 Wire up peripheral DMA channels for SPI. 2021-07-23 13:22:39 -04:00
Bob McWhirter
3df2aadc39 Avoid borrowck issue. 2021-07-23 13:22:39 -04:00
Bob McWhirter
dedc2bac42 IntelliJ'd. 2021-07-23 13:22:39 -04:00
Bob McWhirter
4c5a234a3a Add a non-minc write() to DMA which takes a count. 
Use it from "read-only" SPI.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
7bbad4c4e5 More unused allowances. 2021-07-23 13:22:39 -04:00
Bob McWhirter
4bcc3b06c6 Include all versions when handing to CI. 2021-07-23 13:22:39 -04:00
Bob McWhirter
a75110296d Annotate to avoid unused warnings for the moment. 2021-07-23 13:22:39 -04:00
Bob McWhirter
3f379e06b0 Begin reworking SPI to add DMA for stm32. 2021-07-23 13:22:39 -04:00
Bob McWhirter
fe66f0f8f8 Checkpoint. 2021-07-23 13:22:39 -04:00
Ulf Lilleengen
531093f281 Derive SPI v1 and v3 clocks automatically 2021-06-14 11:58:16 +02:00
Ulf Lilleengen
952f525af5 Provide a way for a peripheral to query its clock frequency 
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
939ea3bbd0 Reduce generics noise 2021-06-08 17:20:29 +02:00
Ulf Lilleengen
212bda0940 Enable clock for SPI v1 and v3 2021-06-08 17:20:29 +02:00
Ulf Lilleengen
ee3b82b743 Auto generate SPI v2 clock enable 
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral.

Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI.
 2021-06-08 17:20:29 +02:00
Rukai
010b2b9497 Fix stm32 warnings 2021-06-06 00:46:20 +10:00
Bob McWhirter
c00a85f9a9 Refactor SPI signal pin macro. 2021-06-03 13:12:38 -04:00