Commit Graph

6484 Commits

Author SHA1 Message Date
23ca2f9174 Autogenerate the tailored PAC for each chip 2021-05-06 03:43:46 +02:00
76f737bb0e Merge pull request #158 from derekdreery/blocking_spim
Implement the blocking hal api for SPIM.
2021-05-05 22:52:36 +02:00
212e83aa22 Make changes to Write as well as Transfer 2021-05-05 19:18:57 +01:00
111dad613a Merge pull request #163 from bobmcwhirter/syscfg_pac_const
Rework `pac` re-exporting, canonicalize syscfg path, use it plus SYSC…
2021-05-05 19:50:12 +02:00
58b4909fa0 Merge pull request #157 from derekdreery/flex-pin
Add a pin variant that can change between disconnected/input/output.
2021-05-05 19:49:21 +02:00
9d427a1ba4 Address issues in PR
Also add some documentation.
2021-05-05 18:33:45 +01:00
9de12a0a7a Address issues in PR. 2021-05-05 18:25:14 +01:00
4257512eb2 Limit to pub(crate). 2021-05-05 13:15:07 -04:00
12c510f222 Rework pac re-exporting, canonicalize syscfg path, use it plus SYSCFG_BASE. 2021-05-05 13:12:53 -04:00
8e312e0ba7 Merge pull request #162 from bobmcwhirter/cargo_features
Generate some chip features by peripherals.
2021-05-05 17:11:44 +02:00
14ce02eecf Add the leaf features for peripherals. 2021-05-05 11:06:03 -04:00
d8156b43b1 Generate some chip features by peripherals. 2021-05-05 11:01:02 -04:00
70549be59e Merge pull request #161 from bobmcwhirter/exti_using_const
Move exti to use the const addr.
2021-05-05 16:41:05 +02:00
7262c54f81 Move exti to use the const addr. 2021-05-05 10:38:57 -04:00
c777cf9551 Merge pull request #160 from bobmcwhirter/gen_exti_syscfg
Gen exti syscfg
2021-05-05 16:37:48 +02:00
e248baecd4 Regenerate with SYSCFG and EXTI base addresses. 2021-05-05 10:18:09 -04:00
5495ad453b Bump stm32-data to latest. 2021-05-05 09:58:38 -04:00
1ad18aa09a Implement the blocking hal api for SPIM. 2021-05-05 14:50:28 +01:00
0b3ccca69b Add a pin variant that can change between disconnected/input/output.
I'm in no way attached to the name and encourage better suggestions.
2021-05-05 14:46:51 +01:00
e40346a544 Fix core::panic! not printing in examples (#153)
* fixes panic not showing in examples
removes panic_immediate_abort feature where present, renames config -> config.toml, enables panic-probe defmt printing feature and updates panic-probe to 0.2

* fix unintended changes in build_core and arch

* revert uninteded change
2021-05-02 20:58:01 +02:00
7ef5806168 stm32: codegen interrupts 2021-05-01 03:08:52 +02:00
71cf742621 Add Priority enums to embassy-extras 2021-05-01 03:08:19 +02:00
005528eb8d Merge pull request #151 from bobmcwhirter/rng-impl
Stub in RNG impl.
2021-04-26 20:19:32 +02:00
0713947d67 Stub in RNG impl. 2021-04-26 14:11:46 -04:00
bd35ce35a8 Merge pull request #150 from bobmcwhirter/rng-trait
Add an RNG trait.
2021-04-26 15:49:43 +02:00
dc919c236d Add an RNG trait. 2021-04-26 09:43:19 -04:00
1f2551d7cd Merge pull request #149 from xoviat/spi
stm32: fix spi/write
2021-04-25 22:08:38 -03:00
936efd164d USART codegen 2021-04-25 22:35:51 +02:00
cb1b240d8b stm32: fix spi/write 2021-04-24 17:10:51 -05:00
37eb7e9506 Merge pull request #148 from xoviat/spi
stm32: use interrupt for spi transmit
2021-04-24 13:50:31 -05:00
1fef2d08fb stm32: use interrupt for spi transmit 2021-04-24 13:07:28 -05:00
6ba915a308 Codegen GPIO pins 2021-04-23 23:47:34 +02:00
578d920723 Merge pull request #145 from lulf/generic-config
Pass config directly to chip specific configure function
2021-04-23 21:29:13 +02:00
8fb1fc045f Add stm32f401 peripherals 2021-04-23 19:32:47 +02:00
8f24daf096 Actually do not build CAN on stm32f401 2021-04-23 19:19:49 +02:00
c4e4401af4 Do not build CAN on stm32f401 2021-04-23 19:11:38 +02:00
9586365b07 Pass config directly to chip specific configure function
This removes the need to duplicate the configuration for each individual
chip, but will instead pass on the configuration specified in the config
attribute.

Update nrf, stm32, rp macros with passing the config to a per-chip
configure function which assumes the appropriate configuration to be
passed to it.

To demonstrate this feature, the stm32l0xx clock setup and RTC is added which exposes
clock configuration different from stm32f4xx (and has a different set of timers and HAL APIs).
2021-04-22 09:10:46 +02:00
0d02e64f62 Merge pull request #143 from lulf/nrf-port-any-edge
Add detection of edge transitions for ports
2021-04-20 16:05:50 +02:00
29b5bae1d1 Codegen PoC 2021-04-20 03:37:49 +02:00
ef4d9d243e wip usart 2021-04-20 02:44:55 +02:00
170536b073 stm32: add exti 2021-04-20 02:44:54 +02:00
258ba533bd Implement GPIO input 2021-04-20 02:30:14 +02:00
aa65d5ccaf it's alive 2021-04-20 02:30:13 +02:00
e2ad5e1395 Add detection of edge transitions for ports 2021-04-16 07:58:24 +02:00
97ca54fa66 Rename PeripheralBorrow to Unborrow 2021-04-14 19:59:52 +02:00
bac53e3e55 Merge pull request #141 from embassy-rs/no-pin
Remove Pin
2021-04-14 18:18:00 +02:00
5ee87cf25d Remove Pin from Flash trait 2021-04-14 17:04:40 +02:00
d336a4b38a Remove Pin from Delay trait 2021-04-14 17:04:40 +02:00
f292647066 Remove Pin from I2c 2021-04-14 17:04:40 +02:00
c15411d1bd Remove Pin from SPI 2021-04-14 17:04:40 +02:00