Dario Nieuwenhuis
|
8315cf064e
|
stm32: add stm32wba support.
|
2023-09-16 04:04:45 +02:00 |
|
xoviat
|
c28a6bdd0b
|
stm32: generate adc_common
|
2023-09-15 17:35:53 -05:00 |
|
xoviat
|
9fb14379c3
|
stm32: add lp to l0
|
2023-09-14 18:53:27 -05:00 |
|
xoviat
|
08415e001e
|
stm32/f3: add high res for hrtim and misc.
|
2023-09-10 13:33:17 -05:00 |
|
xoviat
|
11a78fb1e4
|
rcc: more cleanup
|
2023-09-08 18:20:58 -05:00 |
|
xoviat
|
4550452f43
|
rustfmt
|
2023-09-06 17:53:02 -05:00 |
|
xoviat
|
08410432b5
|
stm32: fix rcc merge
|
2023-09-06 17:51:40 -05:00 |
|
xoviat
|
3cf3caa3ab
|
Merge branch 'main' into rcc-bd
|
2023-09-06 17:49:29 -05:00 |
|
xoviat
|
c21ad04c2e
|
stm32: extract lse/lsi into bd mod
|
2023-09-06 17:48:12 -05:00 |
|
xoviat
|
d097c99719
|
stm32/rcc: add lsi and lse bd abstraction
|
2023-09-06 17:33:56 -05:00 |
|
Olle Sandberg
|
0d3ff34d80
|
adc: enable ADC and clock selection for STM32WLx
|
2023-09-06 06:57:30 +02:00 |
|
xoviat
|
a05afc5426
|
Merge pull request #1867 from xoviat/adc-g4
Adc g4
|
2023-09-05 23:31:03 +00:00 |
|
Scott Mabin
|
6770d8e8a6
|
Allow the RTC clock source to be configured with the new RTC mechanism
|
2023-09-06 00:04:09 +01:00 |
|
xoviat
|
7622d2eb61
|
stm32: fix merge issues
|
2023-09-05 17:10:15 -05:00 |
|
xoviat
|
7573160077
|
Merge branch 'main' of https://github.com/embassy-rs/embassy into adc-g4
|
2023-09-05 17:02:28 -05:00 |
|
xoviat
|
f502271940
|
stm32: add initial adc f3 impl
|
2023-09-05 16:46:57 -05:00 |
|
Daehyeok Mun
|
49ba9c3da2
|
initial support for STM32G4 ADC
|
2023-09-04 23:36:41 -07:00 |
|
xoviat
|
27dfced285
|
stm32: fix rcc wb
|
2023-08-29 19:51:21 -05:00 |
|
xoviat
|
989c98f316
|
stm32/rtc: autocompute prescalers
|
2023-08-29 19:41:03 -05:00 |
|
xoviat
|
6b8b145266
|
stm32: revert changes to rcc f4
|
2023-08-28 16:17:42 -05:00 |
|
xoviat
|
70a5221b2e
|
stm32/bd: consolidate enable_rtc
|
2023-08-28 15:34:08 -05:00 |
|
xoviat
|
e981cd4968
|
stm32: fix rtc wakeup timing and add dbg
|
2023-08-27 21:15:57 -05:00 |
|
xoviat
|
cbc92dce05
|
stm32/bd: fix errors
|
2023-08-27 15:18:34 -05:00 |
|
xoviat
|
531f51d0eb
|
rcc/bd: consolidate mod
|
2023-08-27 15:01:09 -05:00 |
|
xoviat
|
f28ab18d7b
|
stm32: fix l4 re-export
|
2023-08-27 09:50:02 -05:00 |
|
xoviat
|
3bf6081eb5
|
stm32: fix wl re-export
|
2023-08-27 09:41:31 -05:00 |
|
xoviat
|
fb942e6675
|
stm32: re-export rtcclocksource
|
2023-08-27 09:25:14 -05:00 |
|
xoviat
|
10ea068027
|
stm32/bd: allow dead code
|
2023-08-27 09:12:04 -05:00 |
|
xoviat
|
4caa8497fc
|
stm32: extract backupdomain into mod
|
2023-08-27 09:07:34 -05:00 |
|
xoviat
|
48085939e7
|
stm32/rcc: rename common to bus
|
2023-08-27 08:35:13 -05:00 |
|
xoviat
|
cda4047310
|
stm32: flesh out lp executor
|
2023-08-24 19:29:11 -05:00 |
|
xoviat
|
83f224e140
|
stm32/lp: add refcount
|
2023-08-23 20:18:34 -05:00 |
|
xoviat
|
7bff2ebab3
|
Merge pull request #1766 from xoviat/rtc-w
stm32/rtc: add start/stop wakeup
|
2023-08-22 21:50:53 +00:00 |
|
xoviat
|
5bfddfc9b6
|
stm32/rcc: add rtc to f410
|
2023-08-21 18:10:10 -05:00 |
|
xoviat
|
8c12453544
|
stm32/rcc: set rtc clock on f4
|
2023-08-21 17:50:18 -05:00 |
|
Dario Nieuwenhuis
|
cc400aa178
|
stm32: fix f37x build.
originally broke in https://github.com/embassy-rs/embassy/pull/1762
|
2023-08-19 01:15:32 +02:00 |
|
Dominik Sliwa
|
5bc0175be9
|
configure flash latency after axi clock and handle different flash in STM32H7A/B devices
|
2023-08-18 23:44:56 +02:00 |
|
Dario Nieuwenhuis
|
94fa95c699
|
Merge pull request #1793 from ARizzo35/stm32l4-rtc-pwren
stm32l4: set pwren in rcc regardless of clock source
|
2023-08-18 10:19:54 +00:00 |
|
Adam Rizkalla
|
62e66cdda3
|
stm32l4: set pwren in rcc regardless of clock source
|
2023-08-17 19:16:03 -05:00 |
|
Olle Sandberg
|
c80c323634
|
stm32-wl: set RTC clock source on RCC init
|
2023-08-16 14:41:00 +02:00 |
|
Sebastian Goll
|
df6952648e
|
Make sure to check RCC settings for compatibility before applying
|
2023-08-16 14:11:09 +02:00 |
|
xoviat
|
32fdd4c787
|
tests/stm32: fix rtc test
|
2023-08-08 20:33:24 -05:00 |
|
xoviat
|
6a73ab1afa
|
stm32/l4: set rtc clock source in rcc
|
2023-08-08 19:58:03 -05:00 |
|
xoviat
|
6fc5c608f8
|
stm32/rtc: remove generics and segregate clock sel
|
2023-08-08 19:47:01 -05:00 |
|
xoviat
|
28618d12a1
|
stm32/rtc: restructure
|
2023-08-06 11:58:28 -05:00 |
|
xoviat
|
66c1712118
|
stm32/rtc: enable in rcc mod
|
2023-08-06 11:11:53 -05:00 |
|
Bartek
|
5fcebd28f4
|
Fix unlocking the backup domain when enabling LSE
Set PWREN bit to enable the power interface clock before enabling access to the backup domain.
|
2023-08-01 13:46:34 +09:30 |
|
Dario Nieuwenhuis
|
3aef5999d5
|
Merge pull request #1716 from xoviat/rcc-p
stm32/rcc: extract and combine ahb/apb prescalers
|
2023-07-30 20:43:54 +00:00 |
|
xoviat
|
a8a491212b
|
stm32/rcc: cleanup merge
|
2023-07-30 10:18:54 -05:00 |
|
xoviat
|
2f18770e27
|
stm32/rcc: extract and combine ahb/apb prescalers
|
2023-07-30 09:52:30 -05:00 |
|