xoviat
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cc8d162859
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begin integrate interrupt
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2020-12-31 16:59:42 -06:00 |
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xoviat
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925ede848e
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rename uarte as serial
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2020-12-31 16:40:51 -06:00 |
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xoviat
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308756f366
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generalize uarte
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2020-12-31 16:38:31 -06:00 |
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xoviat
|
142c01ad01
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generalize futures
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2020-12-31 16:11:23 -06:00 |
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xoviat
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d52e1b2276
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use transfer_complete_flag; make partially generic
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2020-12-31 15:58:35 -06:00 |
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xoviat
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2d979eb4ef
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add interrupts
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2020-12-30 21:14:56 -06:00 |
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xoviat
|
ea36029a3d
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reformat
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2020-12-30 19:50:15 -06:00 |
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xoviat
|
a5cf65a17b
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impl. poll:ready
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2020-12-30 19:45:07 -06:00 |
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xoviat
|
c6cf9b801d
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minor rework to get tx working (maybe)
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2020-12-30 12:27:47 -06:00 |
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xoviat
|
60c7d112b1
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fix borrowing errors
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2020-12-30 11:05:52 -06:00 |
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xoviat
|
41db867d9a
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fix transfer mutability
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2020-12-29 22:57:00 -06:00 |
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xoviat
|
53c2829eb1
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add dma example; rename uarte
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2020-12-29 19:10:47 -06:00 |
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xoviat
|
74b5d4693c
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implement prelim draft
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2020-12-29 12:33:50 -06:00 |
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xoviat
|
04944b6379
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overhaul implementation
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2020-12-28 20:48:26 -06:00 |
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xoviat
|
3cf85df176
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add dma transfer example
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2020-12-28 16:43:29 -06:00 |
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xoviat
|
b5e0116f76
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add interrupt channels, waker
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2020-12-28 13:31:18 -06:00 |
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xoviat
|
56db0e1c61
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add dma transfer logic
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2020-12-28 13:13:43 -06:00 |
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xoviat
|
12fa5909c3
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set-up draft serial interface
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2020-12-28 09:55:49 -06:00 |
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xoviat
|
18cd87ae12
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create stm32f4 crate
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2020-12-28 09:17:36 -06:00 |
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