Commit Graph

3795 Commits

Author SHA1 Message Date
Jacob Rosenthal
67baec472d nrf: dump the pwm_sequence example for clarity
It is basically impossible to directly convert that example to a sequence for various reasons. You cant have multiple channels on same buffer with one sequence instance for starters, also at that clock rate and max_duty 1 period is far longer than the 3ms it was using, which would require using a new max_duty and thus require regenerating the sine table which makes it not representitive of the original example anymore
2021-11-11 23:31:10 -07:00
Jacob Rosenthal
7bee43df5a nrf: sequencepwm nitpicks for clarity 2021-11-11 22:50:07 -07:00
Jacob Rosenthal
937f49dead nrf: sequencepwm rename top to max_duty for consistancy 2021-11-11 22:47:57 -07:00
Jacob Rosenthal
ea1c62ff61 fix 2021-11-11 20:12:50 -07:00
Jacob Rosenthal
f15c3a04d4 sequence must be live while DMA runs 2021-11-11 20:10:34 -07:00
Jacob Rosenthal
639034cee4 fix 2021-11-11 19:58:45 -07:00
Jacob Rosenthal
fe83daf45f remove const generic 2021-11-11 19:49:41 -07:00
Jacob Rosenthal
ec66fcd01a pwm_sequence consume buffer 2021-11-11 19:14:29 -07:00
bors[bot]
4112759a8f
Merge #455
455: simple_playback api from nrf sdk r=Dirbaio a=jacobrosenthal

Port of the nrf_drv_pwm_simple_playback call from the nordic sdk that allows you to set up a sequence to play across leds with no interaction necessary using the 'shorts' registers to trigger looping sequences



Co-authored-by: Jacob Rosenthal <jacobrosenthal@gmail.com>
2021-11-11 16:26:36 +00:00
bors[bot]
8193885cb5
Merge #482
482: Add MCO peripheral. r=Dirbaio a=matoushybl

This PR adds an abstraction over STM32 RCC feature called MCO (Microcontroller Clock Output). The clock output can bind to several clock sources and then can be scaled using a prescaler.

Given that from the embassy ecosystem the RCC is generaly invisible to the user, the MCO was implemented as a separate peripheral bound to the pin where the clock should appear.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2021-11-11 16:20:02 +00:00
Matous Hybl
c14642cffc Add MCO peripheral. 2021-11-11 11:34:09 +01:00
Jacob Rosenthal
156caa9330 more comments 2021-11-10 19:56:36 -07:00
Jacob Rosenthal
66a43c2e58 more comments 2021-11-10 19:44:57 -07:00
Jacob Rosenthal
407e5d06e0 more comments 2021-11-10 19:43:47 -07:00
Jacob Rosenthal
613e88f1d2 fix bug with config.counter_mode 2021-11-10 18:53:21 -07:00
Jacob Rosenthal
4c2d0ac211 doccomments 2021-11-10 18:52:32 -07:00
Jacob Rosenthal
c6736abf5e dont wait seqend for sequencepwm 2021-11-10 18:52:03 -07:00
Jacob Rosenthal
2973ff4cf0 remove unstable feature and dependency, and make pwm_sequence a near mirror of pwm example 2021-11-10 18:49:24 -07:00
Jacob Rosenthal
c450f91bd9 doc comment cleanup 2021-11-10 17:30:59 -07:00
Jacob Rosenthal
6dcc731065 drop the debug 2021-11-10 17:25:38 -07:00
Jacob Rosenthal
5f28153b81 disconnect pwm pins on drop 2021-11-10 17:19:03 -07:00
bors[bot]
96e2f0dfc5
Merge #468
468: Add v1c ethernet driver for the STM32F7 family. r=Dirbaio a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2021-11-10 22:07:38 +00:00
Jacob Rosenthal
3b7af2f4ed fix wait seqend, pwm example is slow now... 2021-11-10 13:03:44 -07:00
Jacob Rosenthal
751617c2be fix examples for mut self set_duty 2021-11-10 12:48:15 -07:00
Jacob Rosenthal
903b8f032f defensive dma 2021-11-10 12:34:41 -07:00
Jacob Rosenthal
4751dbddc6 move state into PwmSimple 2021-11-10 12:32:28 -07:00
Jacob Rosenthal
9548748c26 fix 2021-11-10 12:29:13 -07:00
Jacob Rosenthal
65843c033e pwm store and deconfigure pins 2021-11-10 11:02:43 -07:00
Matous Hybl
f0ba79059e Add v1c ethernet driver for the STM32F7 family. 2021-11-10 10:16:46 +01:00
bors[bot]
fc75e0ec57
Merge #481
481: Stm32u5 r=Dirbaio a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
2021-11-09 14:00:25 +00:00
Bob McWhirter
12a64b867b More support for U5 PWR (ish), RCC, and FLASH (ish). 2021-11-08 14:27:33 -05:00
Bob McWhirter
5f124ec49f Update U5 to init RCC. 2021-11-08 14:20:51 -05:00
bors[bot]
db889da044
Merge #473
473: Replace rustflags with build.rs extra-link-args. r=Dirbaio a=Dirbaio

Rustflags apply to ALL the crates in the graph, while we only need
them for the toplevel crate which is the only one getting linked.

Rustflags are not equal for all crates, this caused cargo to re-build the
same dependency crate multiple times uselessly. After this change, deps
are reused more, making builds faster.

Note that this only applies when sharing the target/ dir for multiple crates
in the repo which is not the default.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-11-07 23:06:10 +00:00
bors[bot]
5322e293bd
Merge #461
461: nrf: add initial nrf5340 support r=Dirbaio a=Dirbaio

Thanks to `@diondokter's` work on DPPI this was quite easy! :) 

TODO:
- [ ] Add config option to enable 128mhz
- [ ] Add config option to unlock APPROTECT automatically.
- [ ] Add a way to boot net (config option or API?)
- [ ] Support WDT (there's WDT0, WDT1. Needs some refactor)
- [ ] Support NVMC
- [ ] Support TEMP

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-11-07 22:58:27 +00:00
Dario Nieuwenhuis
2221e1fa93 Replace rustflags with build.rs extra-link-args.
Rustflags apply to ALL the crates in the graph, while we only need
them for the toplevel crate which is the only one getting linked.

Rustflags are not equal for all crates, this caused cargo to re-build the
same dependency crate multiple times uselessly. After this change, deps
are reused more, making builds faster.

Note that this only applies when sharing the target/ dir for multiple crates
in the repo which is not the default.
2021-11-07 23:52:11 +01:00
bors[bot]
90095adedf
Merge #471
471: Update stm32-data r=Dirbaio a=Dirbaio

Updates to include https://github.com/embassy-rs/stm32-data/pull/98 to check I haven't broken anything.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-11-05 18:31:19 +00:00
Dario Nieuwenhuis
a8c78a3807 Update stm32-data 2021-11-05 19:30:53 +01:00
bors[bot]
5d863ad19f
Merge #469
469: Add support for STM32H723 and fix eth example. r=matoushybl a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2021-11-04 15:28:09 +00:00
Matous Hybl
9b5d9fbfca Fix v2 ethernet pin definitions. Fix ethernet example for H7 nucleos. 2021-11-04 16:25:30 +01:00
bors[bot]
26f86d7f36
Merge #470
470: Add TCP listen. r=Dirbaio a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2021-11-04 12:49:41 +00:00
Matous Hybl
d742d0252e Add TCP listen. 2021-11-04 13:34:13 +01:00
Jacob Rosenthal
03f2c593d6 fix slice_in_ram for arbitrary size types 2021-11-03 18:56:02 -07:00
Jacob Rosenthal
64e1426b54 clean up some todo comments around infinite play 2021-11-03 18:46:42 -07:00
Jacob Rosenthal
b726ef1886 make SequenceConfig struct is consistent with other Config structs, that are always non_exhaustive and have a Default 2021-11-03 18:37:54 -07:00
Jacob Rosenthal
d961fd1015 rename to SimplePwm and SequencePwm 2021-11-03 18:25:44 -07:00
Jacob Rosenthal
9a6c2de4ea fix safety comments 2021-11-03 18:19:43 -07:00
Jacob Rosenthal
511c5cb892 intenset in a noop 2021-11-03 18:16:00 -07:00
Jacob Rosenthal
82695c8f65 make both news configure registers in same order 2021-11-03 18:15:42 -07:00
Jacob Rosenthal
44375b427c restore example and add set_time_stretch api 2021-11-03 15:29:09 -07:00
bors[bot]
1bf6e646c9
Merge #465
465: Adjust for STM32U5. r=lulf a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
2021-11-02 20:42:41 +00:00