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a0d089536a
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1010 Commits

Author SHA1 Message Date
Rasmus Melchior Jacobsen
a0d089536a Merge branch 'flash-regions' of https://github.com/rmja/embassy into flash-regions 2023-03-29 14:10:33 +02:00
Rasmus Melchior Jacobsen
15e1747220 Fix build of not implemented family 2023-03-29 14:10:16 +02:00
Rasmus Melchior Jacobsen
0bbc3a3d81
Merge branch 'master' into flash-regions 2023-03-29 13:59:17 +02:00
Rasmus Melchior Jacobsen
5a12fd6c75 Add unimplemented family section 2023-03-29 13:57:33 +02:00
Rasmus Melchior Jacobsen
b7dfc8de10 Let flash module be conditionally included 2023-03-29 13:52:52 +02:00
Rasmus Melchior Jacobsen
ddbd509865 Move as much logic from families to shared module as possible 2023-03-29 13:37:45 +02:00
Rasmus Melchior Jacobsen
69944675a3 Expose get_sector in favor of is_eraseable_range 2023-03-29 12:49:13 +02:00
Rasmus Melchior Jacobsen
4ee3d15519 Keep peripheral lifetime when calling into_regions() 2023-03-29 12:10:24 +02:00
Rasmus Melchior Jacobsen
6806bb9692 Expose flash region settings as an array 2023-03-29 11:52:18 +02:00
Rasmus Melchior Jacobsen
d6ce1c4325 Support running tests in embassy-stm32 and move impl from common back to stm32 2023-03-29 11:31:45 +02:00
bors[bot]
7a841b58d1
Merge #1307 
1307: (embassy-stm32): add embedded-io blocking Read + Write for BufferedUart r=MathiasKoch a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
 2023-03-28 12:35:07 +00:00
Mathias
14f6bc88ea Remove unnecessary lifetime 2023-03-28 14:34:36 +02:00
Mathias
2d7f35cf57 Add embedded-io blocking Read + Write for BufferedUart 2023-03-28 14:28:44 +02:00
Dario Nieuwenhuis
a33774ec51 Update stm32-metapac 2023-03-27 12:36:31 +02:00
Rasmus Melchior Jacobsen
e9a5b31fa8 Implement drop for FlashRegions 2023-03-25 17:00:52 +01:00
Rasmus Melchior Jacobsen
e8fc7a66a3 Ensure flash module and FlashRegion trait is always defined 2023-03-25 16:32:32 +01:00
Rasmus Melchior Jacobsen
bc69eb596e Add is_eraseable_range and split write into consecutive parts 2023-03-25 16:04:45 +01:00
Rasmus Melchior Jacobsen
73ccc04231 Change region type name 2023-03-25 13:47:28 +01:00
Rasmus Melchior Jacobsen
47d5f127bb Align L family 2023-03-25 13:30:24 +01:00
Rasmus Melchior Jacobsen
47e07584ca Align H7 family 2023-03-25 13:03:00 +01:00
Rasmus Melchior Jacobsen
c848bd9c9c Align with removal of MemoryRegionKind::Otp 2023-03-25 13:02:42 +01:00
Rasmus Melchior Jacobsen
a8567f0617 Align F7 family 2023-03-25 06:26:00 +01:00
Rasmus Melchior Jacobsen
7edd72f8f5 Align F3 family 2023-03-25 06:07:57 +01:00
Rasmus Melchior Jacobsen
6c73b23f38 Align F4 family 2023-03-25 05:59:40 +01:00
Rasmus Melchior Jacobsen
6b44027eab Add FlashRegion trait and implement embedded_storage traits for each region 2023-03-25 05:58:40 +01:00
Rasmus Melchior Jacobsen
cccceb88f2 Generate flash regions during build 2023-03-25 05:57:15 +01:00
Dario Nieuwenhuis
0b49b588a2 stm32: use stm32-metapac from crates.io, remove stm32-data submodule. 2023-03-20 02:38:12 +01:00
Eric Yanush
13f0c64a8c Fix APB clock calculation for several STM32 families 2023-03-16 21:21:39 -06:00
Dario Nieuwenhuis
43462947ed stm32: remove unused embedded-storage-async. 2023-03-14 17:27:40 +01:00
Davide Della Giustina
c0e40b887b
Apply fix 2023-03-01 20:57:13 +00:00
Dario Nieuwenhuis
351e4407ef
Merge pull request #1252 from pattop/stm32_spi_fifo_fix 
stm32/spi: fix occasional data corruption
 2023-03-01 03:08:05 +01:00
Patrick Oppenlander
aabc275186 stm32/spi: fix occasional data corruption 
Need to clear the rx fifo before enabling rx dma.
 2023-03-01 12:24:22 +11:00
Davide Della Giustina
3c601bf8d2
PacketQueue::init() does not need to be unsafe 2023-02-28 18:04:43 +00:00
Davide Della Giustina
485bb76e46
Implemented suggestions from @Dirbaio 2023-02-28 17:39:02 +00:00
Davide Della Giustina
c1e93c0904
PacketQueue::new() uses ::init() when in nightly 2023-02-28 14:34:26 +00:00
Davide Della Giustina
90f2939bf6
Added PacketQueue::init() 2023-02-28 14:22:54 +00:00
Grant Miller
7be4337de9 Add #[must_use] to all futures 2023-02-24 13:01:41 -06:00
bors[bot]
3255e0a172
Merge #1228 
1228: stm32/sdmmc: Implement proper clock configuration r=chemicstry a=chemicstry

This implements proper clock configuration for sdmmc based on chip family, because `RccPeripheral::frequency()` is almost always incorrect. This can't be fixed in PAC, because sdmmc uses two clock domains, one for memory bus and one for sd card. `RccPeripheral::frequency()` usually returns the memory bus clock, but SDIO clock calculations need sd card domain clock. Moreover, chips have multiple clock source selection bits, which makes this even more complicated. I'm not sure if it's worth implementing all this logic in `RccPeripheral::frequency()` instead of cfg's in sdmmc.

Some chips (Lx, U5, H7) require RCC updates to expose required clocks. I didn't want to mash everything in a single PR so left a TODO comment. I also left a `T::frequency()` fallback, which seemed to work in H7 case even though the clock is most certainly incorrect.

In addition, added support for clock divider bypass for sdmmc_v1, which allows reaching a maximum clock of 48 MHz. The peripheral theoretically supports up to 50 MHz, but for that ST recommends setting pll48 frequency to 50 MHz 🤔

Co-authored-by: chemicstry <chemicstry@gmail.com>
 2023-02-23 16:22:31 +00:00
chemicstry
73ef85b765 stm32/sdmmc: Fix compile errors 2023-02-23 18:00:55 +02:00
bors[bot]
f0f92909c1
Merge #1227 
1227: stm32/dma: fix spurious transfer complete interrupts r=Dirbaio a=pattop

DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
 2023-02-23 15:44:43 +00:00
chemicstry
896764bb85 stm32/sdmmc: Refactor TypeId into a macro 2023-02-23 17:38:52 +02:00
chemicstry
42462681bd stm32/sdmmc: Implement proper clock configuration 2023-02-23 16:57:21 +02:00
Patrick Oppenlander
4e884ee2d2 stm32/dma: fix spurious transfer complete interrupts 
DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.
 2023-02-23 10:12:48 +11:00
chemicstry
a53f525f51 stm32/sdmmc: Fix SDIOv1 writes 2023-02-18 01:37:06 +02:00
Dario Nieuwenhuis
363054de98 stm32: doc all chips. 2023-02-13 03:02:12 +01:00
Dario Nieuwenhuis
1e36c91bf8 stm32: fix fmc-related build failures on some F4's 2023-02-13 02:22:06 +01:00
Christian Enderle
d21643c060 fix "prescaler none" which incorrectly set "prescaler divided by 3" 2023-02-12 11:36:57 +01:00
Lucas Granberg
2b6654541d rustfmt 2023-02-09 13:01:44 +02:00
Lucas Granberg
43d018b67f Use rng_v2 cfg instead of chip specific for seed error recover hack 2023-02-09 12:44:20 +02:00
Lucas Granberg
bab4277a86 hack for STM32WL, rcc reset in case of seed error 
The STM32WL series has a more complicated rng device that gets stuck
when there is a seed error.
 2023-02-08 17:57:37 +02:00