aeb69a7665
Track current word size in v2 and v3 also
2021-12-06 14:24:02 -06:00
d51885c0eb
Move WordSize methods to mod
2021-12-06 14:13:25 -06:00
d426caefbf
Move NoPin impls from v1 to mod
2021-12-06 14:02:21 -06:00
81ec4c82fd
Flush MISO before transfer operation
2021-12-03 09:53:28 +01:00
f0cb77443c
Fix wrong pin configuration in STM32's SPI v3.
2021-12-01 22:18:14 +01:00
cd9a1d547c
Ensure SPI DMA write is completed
...
Fix a bug where DMA writes were not fully completed and only a single
byte out of two were written.
2021-11-24 14:59:18 +01:00
d2a79a46c5
Configure the correct pin instances
2021-10-21 11:57:00 +02:00
43a7226d8b
inline FRE register check for SPI on F1
2021-10-11 23:33:32 +02:00
2cbb8a7ece
Add AFType::Input for input configurations.
2021-10-11 22:57:21 +02:00
259e84e68e
Make miso/mosi optional when for unidirectional spi
...
Only suported on v1 currently
2021-10-11 22:57:21 +02:00
39880de958
partial alternate function configuration on STM32f1
2021-10-11 22:57:10 +02:00
f9a576d13d
feat: Add spi support for STM32F1 variants
2021-10-11 22:39:48 +02:00
e4b37c40c9
Code review request - moving OutputType to mod sealed
2021-09-24 19:56:48 +02:00
d371298a27
Small adjustment to 'set_as_af' interface
...
Small adjustment to 'set_as_af' interface - v2
2021-09-24 18:39:07 +02:00
9d45018077
Refactor V1 SPI
2021-09-21 14:50:23 +02:00
7ad6280e65
Add HAL for SubGhz peripheral for STM32 WL series
...
Based on the HAL from stm32wl, the peripheral driver has been
modified to fit into embassy, using the embassy APIs, providing
operation of the radio peripheral.
The initial version does not offer any async APIs, but the example
shows how the radio IRQ can be used to perform async TX of the radio.
2021-09-02 10:39:56 +02:00
4aa52f1b9e
Formatting.
2021-08-24 14:56:45 -04:00
e36ae76e45
Fix blocking-write for SPI.
2021-08-24 14:44:47 -04:00
7bfb763e09
Rename embassy-extras to embassy-hal-common
2021-07-29 13:44:51 +02:00
83f63890e5
Actually take a &mut of that read slice.
2021-07-23 13:22:39 -04:00
473a83a937
Adjust how we deal with read/write being different length.
...
Including some docs about it.
Removing the Rx-enablement for write-only operations.
2021-07-23 13:22:39 -04:00
f1a3e0e05d
As before, EVERY DANG TIME.
...
It'll be sweet with intellij-rust-plugin works better.
2021-07-23 13:22:39 -04:00
b07325b476
Enable DMA for SPIv1 on F4's etc.
2021-07-23 13:22:39 -04:00
8ab82191b7
Every dang time.
2021-07-23 13:22:39 -04:00
a1dac21bdf
Make SPIv3 work with DMA.
...
Add both DMA and non-DMA example to H7.
2021-07-23 13:22:39 -04:00
6dbe049468
Add back in the other versions of SPI.
2021-07-23 13:22:39 -04:00
0d2051243e
SPIv2 + DMA.
2021-07-23 13:22:39 -04:00
1a03f00b56
Wire up peripheral DMA channels for SPI.
2021-07-23 13:22:39 -04:00
3df2aadc39
Avoid borrowck issue.
2021-07-23 13:22:39 -04:00
dedc2bac42
IntelliJ'd.
2021-07-23 13:22:39 -04:00
4c5a234a3a
Add a non-minc write() to DMA which takes a count.
...
Use it from "read-only" SPI.
2021-07-23 13:22:39 -04:00
7bbad4c4e5
More unused allowances.
2021-07-23 13:22:39 -04:00
4bcc3b06c6
Include all versions when handing to CI.
2021-07-23 13:22:39 -04:00
a75110296d
Annotate to avoid unused warnings for the moment.
2021-07-23 13:22:39 -04:00
3f379e06b0
Begin reworking SPI to add DMA for stm32.
2021-07-23 13:22:39 -04:00
fe66f0f8f8
Checkpoint.
2021-07-23 13:22:39 -04:00
531093f281
Derive SPI v1 and v3 clocks automatically
2021-06-14 11:58:16 +02:00
952f525af5
Provide a way for a peripheral to query its clock frequency
...
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
2021-06-14 11:33:11 +02:00
939ea3bbd0
Reduce generics noise
2021-06-08 17:20:29 +02:00
212bda0940
Enable clock for SPI v1 and v3
2021-06-08 17:20:29 +02:00
ee3b82b743
Auto generate SPI v2 clock enable
...
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral.
Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI.
2021-06-08 17:20:29 +02:00
010b2b9497
Fix stm32 warnings
2021-06-06 00:46:20 +10:00
c00a85f9a9
Refactor SPI signal pin macro.
2021-06-03 13:12:38 -04:00
6958091b50
Move DAC, I2C, SPI and RNG to macro-tables.
2021-06-03 13:12:38 -04:00
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
edec5833b3
Refactor SPI and fix write bug
...
* SPI write v2 was hanging in write due to an infinite loop
* SPI word write was not followed by a read back
The u8 and u16 write/read logic have been refactored into write_word and
read_word.
2021-05-27 23:05:42 +02:00
2e6c550355
Merge pull request #197 from rukai/fix_stm32_warnings
...
Fix warnings for embassy-stm32 and embassy-stm32-examples and add .cargo/config.toml + memory.x
2021-05-21 17:25:59 +02:00
b3eda9914b
Use the correct register names.
2021-05-20 14:24:40 -04:00
222faccbab
Formatting.
2021-05-20 14:19:43 -04:00
8b36269d65
Use modify instead of write for regs within a driver.
2021-05-20 14:14:31 -04:00
