max/embassy
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
1,197 Commits 67 Branches 32 Tags 16 MiB
af87031d62
Commit Graph

120 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
af87031d62 hal-common: remove Pin in PeripheralMutex 2021-08-02 19:55:04 +02:00
Bob McWhirter
63b32b39e1 Use an em bikeshed instead of an underscore bikeshed. 2021-08-02 13:29:06 -04:00
Bob McWhirter
5f9447abb4 Put the implicit memory.x behind a memory_x feature on embassy-stm32. 2021-08-02 13:21:30 -04:00
Bob McWhirter
f6c5f039c8 Emit a default memory.x alongside device.x from metapac. 2021-08-02 11:23:55 -04:00
Ben Gamari
3420cbf744 examples: Drop build-std = ["core"] 
Previously the cargo configurations of all of the example projects had
`build-std = ["core"]`, which forces compilation of `core` as a
code-size optimisation. However, this is strictly unnecessary and will
currently break for users who do not use `rustup` directly (e.g. nix
users).
 2021-07-31 13:01:15 -04:00
Dario Nieuwenhuis
3835278567
Merge pull request #321 from thalesfragoso/f4-pll 
F4 PLL
 2021-07-31 11:08:46 +02:00
Thales Fragoso
5cfb9adad8 f4-pll: Add max values per chip 2021-07-29 18:43:15 -03:00
Thales Fragoso
e7714983b3 f4-rcc: Add option to enable debug_wfe and add hello example 2021-07-29 18:43:15 -03:00
Timo Kröger
895781d0d1 stm32l4: Fix examples crate name 2021-07-29 18:14:01 +02:00
Timo Kröger
cad43587e6 stm32l0: Use embassy::main for examples 2021-07-29 17:37:32 +02:00
Timo Kröger
4ccac69929 stm32l4: Cleanup examples 
* Use `cortex_m_rt::entry` for sync examples
* Use `Dbgmcu::enable_all()` everywhere
 2021-07-29 15:54:11 +02:00
Timo Kröger
2a4890165d stm32f0: Enable debug access in low power modes 2021-07-29 15:35:23 +02:00
Dario Nieuwenhuis
7bfb763e09 Rename embassy-extras to embassy-hal-common 2021-07-29 13:44:51 +02:00
Timo Kröger
dd1ec8ebec Use embassy::main macro for stm32f4 examples 2021-07-27 15:03:18 +02:00
Dario Nieuwenhuis
5b0ae5c25b stm32/examples: cleanup L4 2021-07-24 13:57:11 +02:00
Timo Kröger
06fb2a7a80 Enable SYSCFG clock in exti::init() 2021-07-24 11:13:49 +02:00
Bob McWhirter
67283c0cbd Reset back the memory.x also. 2021-07-23 13:22:39 -04:00
Bob McWhirter
a63847944f Reset the examples to the original F4 flavor. 2021-07-23 13:22:39 -04:00
Bob McWhirter
b07325b476 Enable DMA for SPIv1 on F4's etc. 2021-07-23 13:22:39 -04:00
Bob McWhirter
a1dac21bdf Make SPIv3 work with DMA. 
Add both DMA and non-DMA example to H7.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
34dfe28d3a FFS warnings about unused Result<>. 2021-07-23 13:22:39 -04:00
Bob McWhirter
053e330375 Fix warnings about un-used variables. 2021-07-23 13:22:39 -04:00
Bob McWhirter
e269971597 Fix extraneous mut warnings in L4 example. 2021-07-23 13:22:39 -04:00
Bob McWhirter
638235e72d Fix up the L0 example for SPI. 2021-07-23 13:22:39 -04:00
Bob McWhirter
bee7f60f08 Improve the SPIv2 DMA example to verify it actually works. 2021-07-23 13:22:39 -04:00
Bob McWhirter
0d2051243e SPIv2 + DMA. 2021-07-23 13:22:39 -04:00
Timo Kröger
57eecd4292 Use Dbgmcu::enable_all() in stm32f4 examples 2021-07-23 17:54:14 +02:00
Timo Kröger
5ac91933ff stm32: No need to enable GPIO clocks manually 2021-07-23 17:54:13 +02:00
Bob McWhirter
13873df30b Auto-enable all GPIOs during init(). 2021-07-23 11:32:19 -04:00
Bob McWhirter
d68f2617e6 Add a Dbgmcu struct capable of enabling all relevant DBGMCU.cr fields. 
Includes the addition of a `dbgmcu!(...)` macro table which currently takes
the form of

	(cr, $fn_name:ident)

where `$fn_name` is something like `set_dbgsleep_d1` etc.

The method is unsafe, since it's performing unsafe PAC operations.

Two examples modified to demonstrate its usage.
 2021-07-22 14:18:48 -04:00
Dario Nieuwenhuis
3655ceff27
Merge pull request #308 from timokroeger/stmf4-example-cleanup 
Cleanup stm32f4 examples
 2021-07-21 23:21:28 +02:00
Timo Kröger
5e998d1a6c Cleanup stm32f4 examples 
* Remove dependency on stm32f4 pac crate
* Remove unused `ZeroClock`
 2021-07-21 23:12:36 +02:00
Dario Nieuwenhuis
25b870d811
Merge pull request #302 from embassy-rs/rp-spi-fixes 
Rp spi fixes
 2021-07-20 10:11:58 +02:00
Dario Nieuwenhuis
451e342961 rp/examples: add spi_display example 2021-07-20 10:06:57 +02:00
Dario Nieuwenhuis
b04dc7e783
Merge pull request #226 from huntc/mpsc 
Multi Producer Single Consumer channel
 2021-07-20 08:01:42 +02:00
Dario Nieuwenhuis
1799938187 rp/examples: add spi example 2021-07-19 23:54:18 +02:00
Dario Nieuwenhuis
d7176da37c stm32/examples: update DMA channel names 2021-07-17 08:04:33 +02:00
Bob McWhirter
0119ea809d Get DMA on H7 working, add usart_dma example for H7. 2021-07-16 14:41:20 -04:00
Dario Nieuwenhuis
63a0e188ea stm32/dma: fix h7 impls 2021-07-16 14:41:20 -04:00
Dario Nieuwenhuis
3d1391ef2d stm32/dma: impl all variants 2021-07-16 14:41:20 -04:00
Thales Fragoso
697f93ad42 stm32: Add F0 example 2021-07-15 13:50:39 -03:00
huntc
3778f55d80 Provides a cleaner construction of the channel with the common "new" naming 2021-07-15 12:31:53 +10:00
huntc
f159beec1c Use of a NoopMutex 2021-07-15 12:31:52 +10:00
huntc
5f87c7808c Remove the cell and trait 
At the expense of exposing the channel types again. We do this as we want to avoid using dyn traits given their overhead for embedded environments.
 2021-07-15 12:31:52 +10:00
huntc
ae62948d6c Replace UnsafeCell 
Using a new ChannelCell so that there's no leaking of the abstraction
 2021-07-15 12:31:52 +10:00
huntc
816b78c0d9 Reduces the types on sender and receiver 
In exchange for an UnsafeCell being passed into split
 2021-07-15 12:31:52 +10:00
huntc
1b9d5e5071 Multi Producer Single Consumer channel 
An MPSC inspired by Tokio and Crossbeam. The MPSC is designed to support both single and multi core processors, with only single core implemented at this time. The allocation of the channel’s buffer is inspired by the const generic parameters that Heapless provides.
 2021-07-15 12:31:52 +10:00
Dario Nieuwenhuis
71c8d7aa7d stm32l4/examples: remove old-pac uses. 2021-07-15 00:37:00 +02:00
Bob McWhirter
21e94972dc Fix more warnings and examples. 2021-07-14 14:55:20 -04:00
Bob McWhirter
3fd9023fce Fix the h7 example. 2021-07-14 14:45:54 -04:00