66e46d8012
Add the possibility to reconfigure Spi mode and bit order configuration on the fly.
2022-01-14 12:50:58 +01:00
2bbd1ddb8a
Remove unneeded rustfmt::skip
2021-12-16 11:37:53 +01:00
6597e67036
Add finish_dma function
2021-12-14 17:46:25 -06:00
a13a7a6616
Replace wait_for_idle with spin_until_idle
2021-12-14 17:46:25 -06:00
e75cb1a564
Regs type alias
2021-12-14 15:39:00 -06:00
b06658c195
Refactor new
2021-12-14 15:39:00 -06:00
79baa04118
Implement blocking traits with a macro
2021-12-07 00:03:52 -06:00
bf1f80afa1
Unify blocking trait impls
2021-12-07 00:03:52 -06:00
3a17e3a2a5
Move async trait impls to mod
2021-12-07 00:03:52 -06:00
20d2151b1d
check_error_flags function
2021-12-07 00:03:52 -06:00
496579b48b
Move Word trait to mod
2021-12-07 00:03:52 -06:00
7c78247be3
v2: set frxth and ds in new
2021-12-06 22:36:53 -06:00
d76bc45e30
Move Spi drop impl to mod
2021-12-06 17:19:55 -06:00
bd9e730024
Move set_word_size to mod
2021-12-06 16:47:08 -06:00
a35b7d90bc
Add tx_ptr and rx_ptr methods
2021-12-06 16:33:06 -06:00
a35f337bd6
Move Spi::new and Spi::compute_baud_rate to mod
2021-12-06 15:19:24 -06:00
e1cccc8391
Move Spi to mod (without NoDma defaults)
2021-12-06 14:47:50 -06:00
d51885c0eb
Move WordSize methods to mod
2021-12-06 14:13:25 -06:00
d426caefbf
Move NoPin impls from v1 to mod
2021-12-06 14:02:21 -06:00
259e84e68e
Make miso/mosi optional when for unidirectional spi
...
Only suported on v1 currently
2021-10-11 22:57:21 +02:00
39880de958
partial alternate function configuration on STM32f1
2021-10-11 22:57:10 +02:00
f9a576d13d
feat: Add spi support for STM32F1 variants
2021-10-11 22:39:48 +02:00
7ad6280e65
Add HAL for SubGhz peripheral for STM32 WL series
...
Based on the HAL from stm32wl, the peripheral driver has been
modified to fit into embassy, using the embassy APIs, providing
operation of the radio peripheral.
The initial version does not offer any async APIs, but the example
shows how the radio IRQ can be used to perform async TX of the radio.
2021-09-02 10:39:56 +02:00
f1a3e0e05d
As before, EVERY DANG TIME.
...
It'll be sweet with intellij-rust-plugin works better.
2021-07-23 13:22:39 -04:00
b07325b476
Enable DMA for SPIv1 on F4's etc.
2021-07-23 13:22:39 -04:00
8ab82191b7
Every dang time.
2021-07-23 13:22:39 -04:00
a1dac21bdf
Make SPIv3 work with DMA.
...
Add both DMA and non-DMA example to H7.
2021-07-23 13:22:39 -04:00
6dbe049468
Add back in the other versions of SPI.
2021-07-23 13:22:39 -04:00
0d2051243e
SPIv2 + DMA.
2021-07-23 13:22:39 -04:00
1a03f00b56
Wire up peripheral DMA channels for SPI.
2021-07-23 13:22:39 -04:00
dedc2bac42
IntelliJ'd.
2021-07-23 13:22:39 -04:00
4c5a234a3a
Add a non-minc write() to DMA which takes a count.
...
Use it from "read-only" SPI.
2021-07-23 13:22:39 -04:00
4bcc3b06c6
Include all versions when handing to CI.
2021-07-23 13:22:39 -04:00
3f379e06b0
Begin reworking SPI to add DMA for stm32.
2021-07-23 13:22:39 -04:00
fe66f0f8f8
Checkpoint.
2021-07-23 13:22:39 -04:00
939ea3bbd0
Reduce generics noise
2021-06-08 17:20:29 +02:00
c00a85f9a9
Refactor SPI signal pin macro.
2021-06-03 13:12:38 -04:00
6958091b50
Move DAC, I2C, SPI and RNG to macro-tables.
2021-06-03 13:12:38 -04:00
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
edec5833b3
Refactor SPI and fix write bug
...
* SPI write v2 was hanging in write due to an infinite loop
* SPI word write was not followed by a read back
The u8 and u16 write/read logic have been refactored into write_word and
read_word.
2021-05-27 23:05:42 +02:00
2e6c550355
Merge pull request #197 from rukai/fix_stm32_warnings
...
Fix warnings for embassy-stm32 and embassy-stm32-examples and add .cargo/config.toml + memory.x
2021-05-21 17:25:59 +02:00
82f9242df2
Fix warnings for embassy-stm32 and embassy-stm32-examples
2021-05-20 22:25:12 +10:00
1872824d56
Add SPI v3, fix up v2's af_num and remove extraneous Error enums.
2021-05-17 13:56:13 -04:00
2303364322
Standardize module structure, fix some build failures
2021-05-17 02:04:51 +02:00
180ca48d34
Remove AF_NUM const from pin traits, only use af_num fn
2021-05-15 03:18:15 +02:00
2569d38ab4
Adjust pin-names to FooPin.
...
Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
2021-05-14 10:11:43 -04:00
9e93a0999f
Add SPIv1, use cfg_attr to pick correct impl.
...
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
2021-05-13 14:28:53 -04:00
