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Author SHA1 Message Date
Ulf Lilleengen
cd9a1d547c Ensure SPI DMA write is completed 
Fix a bug where DMA writes were not fully completed and only a single
byte out of two were written.
 2021-11-24 14:59:18 +01:00
bors[bot]
8fea6c94f6
Merge #501 
501: stm32-metapac cleanups r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2021-11-24 01:00:22 +00:00
Dario Nieuwenhuis
f9934fb56b ci: do main build with fully generated stm32-metapac. 2021-11-24 01:43:53 +01:00
Dario Nieuwenhuis
e187f50f4b stm32: remove unused deps 2021-11-24 01:41:51 +01:00
Dario Nieuwenhuis
78d109f5d5 stm32-metapac: add pac feature to allow building only the macrotables. 2021-11-24 01:04:23 +01:00
Dario Nieuwenhuis
d06cb0a264 stm32-metapac-gen: use actually common common.rs instead of emitting it at every single chip file. 2021-11-24 00:42:14 +01:00
bors[bot]
e725d22fd4
Merge #489 
489: Faster CI with cargo-batch r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2021-11-23 23:24:27 +00:00
Dario Nieuwenhuis
dfb6d407a1 stm32: rename core features from _cmX to -cmX, cleanup gen. 2021-11-23 23:49:06 +01:00
bors[bot]
b0da114395
Merge #491 
491: Fix interrupt_take macro by specifying path to panic macro. r=Dirbaio a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
 2021-11-23 14:34:15 +00:00
Matous Hybl
0ca6060bfd Fix interrupt_take macro by specifying path to panic macro. 2021-11-23 11:00:37 +01:00
bors[bot]
d98d18d2ee
Merge #499 
499: Update to latest stm32-data r=Dirbaio a=lulf



Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
 2021-11-22 12:33:09 +00:00
Ulf Lilleengen
a6a744d0d9 Update to latest stm32-data 2021-11-22 13:30:53 +01:00
Dario Nieuwenhuis
039621c56d stm32-metapac-gen: fix broken build.rs 2021-11-22 02:38:01 +01:00
Dario Nieuwenhuis
0db4da10f8 stm32-metapac-gen: separate data structs 2021-11-22 02:37:46 +01:00
bors[bot]
5b45dd4eb5
Merge #497 
497: Some documentation corrections and expansion r=Dirbaio a=huntc

Some documentation to help us along with `Signal` and `Saadc`.

Co-authored-by: huntc <huntchr@gmail.com>
 2021-11-22 01:28:00 +00:00
huntc
d4179ee2e4 Some documentation corrections and expansion 2021-11-22 12:26:11 +11:00
Dario Nieuwenhuis
c8e69a14eb Faster CI with cargo-batch 2021-11-22 01:25:07 +01:00
bors[bot]
10a3a8bbed
Merge #496 
496: Fix warning for field never used. r=Dirbaio a=ithinuel



Co-authored-by: Wilfried Chauveau <wilfried.chauveau@ithinuel.me>
 2021-11-21 20:02:14 +00:00
bors[bot]
d7bbaf1a4c
Merge #494 
494: nrf: saadc do not reexport pac enums r=Dirbaio a=jacobrosenthal

Closes #415

Co-authored-by: Jacob Rosenthal <jacobrosenthal@gmail.com>
 2021-11-21 19:47:31 +00:00
bors[bot]
920bb3690e
Merge #495 
495: Fix missing lifetime bounds r=lulf a=ithinuel



Co-authored-by: Wilfried Chauveau <wilfried.chauveau@ithinuel.me>
 2021-11-21 11:10:44 +00:00
Wilfried Chauveau
d5a2462cba
Update embassy-nrf with lifetime bounds on gpio implementations. 2021-11-21 10:25:43 +00:00
Wilfried Chauveau
eac604accd
Fix missing lifetime bounds 2021-11-21 10:10:28 +00:00
Wilfried Chauveau
e6abd9f5df
Fix warning for field never used. 2021-11-21 08:33:18 +00:00
Jacob Rosenthal
18d94a7d01 nrf: saadc do not reexport pac enums 
Closes #415
 2021-11-20 18:07:20 -07:00
bors[bot]
8d108d8753
Merge #493 
493: Update stm32-data r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2021-11-17 20:43:52 +00:00
Dario Nieuwenhuis
24e5013c00 Allow unused to fix build failure in u5 2021-11-17 21:43:05 +01:00
Dario Nieuwenhuis
63688bf61f Update stm32-data 2021-11-17 21:31:37 +01:00
bors[bot]
5754be5d1e
Merge #492 
492: Adjust the config.toml for U5. r=Dirbaio a=bobmcwhirter

- Correct ISA
- Remove commented-out cruft.

Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
 2021-11-17 15:37:00 +00:00
Bob McWhirter
2649984b55 Adjust the config.toml for U5. 
- Correct ISA
- Remove commented-out cruft.
 2021-11-17 10:35:25 -05:00
bors[bot]
271881533e
Merge #488 
488: Remove unused deps r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2021-11-15 19:14:13 +00:00
Dario Nieuwenhuis
9b17b3d721 Remove unused deps 2021-11-15 20:13:22 +01:00
bors[bot]
c8f3ec3fba
Merge #487 
487: Update to defmt 3.0ish. r=bobmcwhirter a=bobmcwhirter

Lots of gitrevs deps.

Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
 2021-11-15 18:31:38 +00:00
Bob McWhirter
ee1490bce1 Move to the newly released bxcan crate that supports defmt 0.3. 2021-11-15 13:18:53 -05:00
Bob McWhirter
436eb81fc2 Adjust for bxcan API. 2021-11-15 12:00:26 -05:00
Bob McWhirter
57ca241658 Further cargo muckings for smol/defmt. 2021-11-15 11:40:06 -05:00
Bob McWhirter
23fdca9e52 Remove extraneous defmt-trace feature. 2021-11-15 11:33:44 -05:00
Bob McWhirter
a770fc77c9 Adjust all examples to defmt 0.3. 2021-11-15 11:19:19 -05:00
Bob McWhirter
c2da498263 Update to defmt 3.0ish. 
Lots of gitrevs deps.
 2021-11-15 11:09:08 -05:00
bors[bot]
4e0a0f27fe
Merge #484 
484: Fix lifetime of pwmsequence buffer argument and clarity cleanups r=Dirbaio a=jacobrosenthal

Im not sure its UB to write to the sequence values struct after having started a pwm sequence.. but its against the ethos of the api  I had in mind to monkey with it while its in motion.

~Use const generics to consume any size input instead of a borrow of slice~

cc https://github.com/embassy-rs/embassy/pull/483


Co-authored-by: Jacob Rosenthal <jacobrosenthal@gmail.com>
 2021-11-12 16:29:53 +00:00
Jacob Rosenthal
0f322c1d4e fix set_duty ptr write 2021-11-12 08:55:20 -07:00
Jacob Rosenthal
aca7b86c7e pwm_sequence show implicit and explicit stop functionality 2021-11-11 23:47:35 -07:00
Jacob Rosenthal
667a93b5c8 sequence pwm remove disable fn for clarity, and disable peripheral on stop 2021-11-11 23:46:27 -07:00
Jacob Rosenthal
b4cb24c735 pwm_servo example comment for clarity 2021-11-11 23:32:34 -07:00
Jacob Rosenthal
67baec472d nrf: dump the pwm_sequence example for clarity 
It is basically impossible to directly convert that example to a sequence for various reasons. You cant have multiple channels on same buffer with one sequence instance for starters, also at that clock rate and max_duty 1 period is far longer than the 3ms it was using, which would require using a new max_duty and thus require regenerating the sine table which makes it not representitive of the original example anymore
 2021-11-11 23:31:10 -07:00
Jacob Rosenthal
7bee43df5a nrf: sequencepwm nitpicks for clarity 2021-11-11 22:50:07 -07:00
Jacob Rosenthal
937f49dead nrf: sequencepwm rename top to max_duty for consistancy 2021-11-11 22:47:57 -07:00
Jacob Rosenthal
ea1c62ff61 fix 2021-11-11 20:12:50 -07:00
Jacob Rosenthal
f15c3a04d4 sequence must be live while DMA runs 2021-11-11 20:10:34 -07:00
Jacob Rosenthal
639034cee4 fix 2021-11-11 19:58:45 -07:00
Jacob Rosenthal
fe83daf45f remove const generic 2021-11-11 19:49:41 -07:00