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1502 Commits

Author SHA1 Message Date
xoviat
864202a23a
Merge pull request #1578 from schphil/can-split 
stm32 can split method
 2023-07-05 23:27:53 +00:00
Mathias
1255d8a8ce Merge branch 'main' of https://github.com/embassy-rs/embassy into embassy-stm32/rcc-rtc-l4 2023-07-05 12:36:42 +02:00
Dario Nieuwenhuis
eb57bb298f
Merge pull request #1617 from xoviat/const-rcc 
stm32/rcc: allow const-propagation
 2023-07-04 22:31:55 +00:00
xoviat
953c745ed8 stm32/rcc: allow const-propagation 2023-07-04 16:29:46 -05:00
Dario Nieuwenhuis
9c4df46c46 rustfmt. 2023-07-04 21:34:55 +02:00
Dario Nieuwenhuis
a101d9078d update embedded-hal crates. 2023-07-04 19:59:36 +02:00
William Yager
0c4180cdd0 fmt 2023-07-03 19:39:58 -04:00
William Yager
d9824dfd64 Add bank 1 16 bit 2023-07-03 19:39:51 -04:00
Philipp Scheff
a96f30edf4 allow deed code can rx & clippy 2023-07-03 23:48:07 +02:00
Philipp Scheff
af15b49bfe fmt 2023-07-03 22:57:33 +02:00
Mathias
60b2f075dc Merge branch 'main' of https://github.com/embassy-rs/embassy into embassy-stm32/rcc-rtc-l4 2023-07-03 19:33:26 +02:00
xoviat
0c49e6747c wip 2023-07-02 22:00:50 -05:00
Dario Nieuwenhuis
c9b9be5b81 hal-common: require DerefMut for peripherals, not just Deref. 
Otherwise you can create multiple drivers on the same singleton like this:

```rust
let mut input = Input::new(&pin, Pull::None);
let mut output = Output::new(&pin, Level::Low, Speed::Low);
input.is_high();
output.set_high();
input.is_high();
output.set_high();
```

Thanks @pennae for reporting.
 2023-07-02 22:16:01 +02:00
xoviat
2e6b813225 hrtim: add guardrails on bridge sec. duty 2023-07-02 09:17:12 -05:00
xoviat
aceba1c03f hrtim: fix example and auto adjust psc. 2023-07-01 21:47:44 -05:00
xoviat
8141d53d94 Merge branch 'main' of https://github.com/embassy-rs/embassy into hrtim 2023-07-01 17:32:25 -05:00
xoviat
21a8653195 hrtim: minor cleanup 2023-07-01 17:32:16 -05:00
Mathias
d372df7ddb L4: Switch to MSI to prevent problems with PLL configuration, and enable power to AHB bus clock to allow RTC to run 2023-07-01 12:16:23 +02:00
xoviat
6e13f5b387 rustfmt 2023-06-30 18:33:22 -05:00
xoviat
c07854fed8 stm32/hrtim: minor fixes 2023-06-30 18:22:02 -05:00
xoviat
8c4997c5fc stm32/hrtim: impl. bridge, dead-time part. res. 2023-06-30 18:22:01 -05:00
xoviat
3252eaa060 stm32/hrtim: add example impl. 2023-06-30 18:21:59 -05:00
xoviat
348019e37f stm32/hrtim: impl channel alloc type system 2023-06-30 18:21:58 -05:00
xoviat
b9eb3dfad7 stm32/hrtim: add api concept 2023-06-30 18:21:57 -05:00
xoviat
71513ccb39 stm32/hrtim: impl. draft frequency computation 2023-06-30 18:21:57 -05:00
xoviat
cdb3fb059f stm32/hrtim: first draft 2023-06-30 18:21:42 -05:00
Dario Nieuwenhuis
6eb46c419c
Merge pull request #1565 from JuliDi/main 
Implement DMA for DAC on STM32
 2023-06-29 08:54:28 +00:00
Julian
96f1525ffe
Revert changes to dma.rs 2023-06-29 09:20:25 +02:00
Dario Nieuwenhuis
e892014b65 Update stm32-metapac, includes chiptool changes to use real Rust enums now. 2023-06-29 02:01:33 +02:00
Kevin Lannen
5666c56903 STM32G4: Add CRS support to RCC 
Create working CRS USB Example
 2023-06-28 16:53:16 -06:00
JuliDi
daedfbbd87
add dma is_running change doc 2023-06-28 15:39:36 +02:00
JuliDi
91c31d5e43
Update DAC examples, add DAC + DMA example 2023-06-28 11:58:25 +02:00
Dario Nieuwenhuis
ed493be869 stm32: update metapac, includes fix for OTG with 9 endpoints (H7) 2023-06-27 23:58:32 +02:00
JuliDi
9c81d63155
fix warnings 2023-06-27 22:33:17 +02:00
JuliDi
60c54107ce
fix sdmmc bdma transferconfig fields 2023-06-27 21:58:56 +02:00
JuliDi
56dd22f0ac
feature-gate set_channel_mode, undo dma.rs changes 2023-06-27 21:23:47 +02:00
JuliDi
afec1b439b
feature-gate dma write, make trigger not return a result 2023-06-27 18:17:51 +02:00
Dario Nieuwenhuis
219ef5b37a stm32/otg: add VBUS detection. 
Fixes #1442.
 2023-06-27 12:52:37 +02:00
Dario Nieuwenhuis
5e6e18b310 stm32/usb: add TODO: implement VBUS detection. 2023-06-27 04:29:01 +02:00
Dario Nieuwenhuis
80407aa930 stm32/otg: set tx fifo num in IN endpoints on configure. 2023-06-27 02:12:33 +02:00
Dario Nieuwenhuis
a575e40a35 stm32/otg: clear NAK bit on endpoint enable. 2023-06-27 02:12:06 +02:00
Dario Nieuwenhuis
28fb492c40 stm32/otg: flush fifos on reconfigure and on ep disable. 2023-06-27 00:42:24 +02:00
JuliDi
e7bc84dda8
fix issues when DAC2 present, add additional options to DMA (NOT YET WORKING with STM32H7A3ZI) 2023-06-26 09:42:25 +02:00
JuliDi
8cafaa1f3c
add docs, cleanup 2023-06-25 11:54:25 +02:00
JuliDi
df944edeef
fix minor issues with splitting channels etc 2023-06-25 10:53:35 +02:00
JuliDi
388d3e273d
first attempt at fixing the 2nd channel problem 2023-06-24 13:10:59 +02:00
xoviat
49333ce6ad stm32/wpan: move linker file into pkg 2023-06-23 20:09:13 -05:00
JuliDi
915f79c974
allow independent use of ch1 and ch2 on dac 2023-06-23 12:14:40 +02:00
JuliDi
ea04a0277b
change dma complete transfer IR default to true 2023-06-23 12:14:26 +02:00
schphil
71afa40a69
Merge branch 'embassy-rs:main' into can-split 2023-06-23 10:19:30 +02:00
Philipp Scheff
89fbb02979 add as_mut 2023-06-22 17:49:33 +02:00
Philipp Scheff
5ecf9ec7bc split can 2023-06-22 17:17:51 +02:00
JuliDi
78736328a0
update docs and update to new dma interface 2023-06-22 10:44:08 +02:00
JuliDi
8d0095c618
add option to enable/disable complete transfer interrupt 2023-06-22 10:43:45 +02:00
xoviat
1f2be2dac5
Merge pull request #1569 from xoviat/tl-mbox-2 
wpan: misc. cleanup and add mac
 2023-06-21 21:50:12 +00:00
JuliDi
fdb3c3d6ff
Merge remote-tracking branch 'upstream/main' 2023-06-21 11:52:53 +02:00
Dario Nieuwenhuis
2e625138ff
Merge pull request #1501 from xoviat/can 
async can
 2023-06-20 22:57:31 +00:00
xoviat
ca21027eea
Merge pull request #3 from schphil/can 
fix extended can id
 2023-06-20 17:45:28 -05:00
xoviat
0a551eb7c6 stm32/can: fix time 2023-06-20 17:39:00 -05:00
xoviat
0d67ef795e Merge branch 'main' of https://github.com/embassy-rs/embassy into tl-mbox-2 2023-06-19 21:18:46 -05:00
xoviat
0998221478 stm32/can: update interrupts 2023-06-19 16:05:59 -05:00
Dario Nieuwenhuis
428a4ba3f9 stm32/gpdma: clear all interrupts after reset. 
Reset doesn't clear them, this causes subsequent transfers to instantly
complete because the TC flag was set from before.
 2023-06-19 23:03:31 +02:00
xoviat
aaad906815 Merge branch 'main' of https://github.com/embassy-rs/embassy into can 2023-06-19 15:52:33 -05:00
JuliDi
56ab6d9f14
remove write_X variants 2023-06-19 13:54:22 +02:00
JuliDi
88052480b1
fix typo, minor cleanup 2023-06-19 13:50:17 +02:00
JuliDi
218b102b28
remove Alignment and make Value and Value array look the same 2023-06-19 13:46:17 +02:00
JuliDi
fe7b72948a
add ValueArray type and respective write functions 2023-06-19 13:42:25 +02:00
Dario Nieuwenhuis
3c70f799a2
Merge pull request #1572 from whitequark/bdma-blocking_wait-stop 
BDMA: request stop after busy loop in blocking_wait()
 2023-06-19 09:55:07 +00:00
JuliDi
e0747e937f
remove unsafe for circular dma reg access 2023-06-19 11:15:09 +02:00
JuliDi
320e2cf35b
Merge branch 'main' of github.com:embassy-rs/embassy 2023-06-19 11:14:48 +02:00
Catherine
bbc81146ec BDMA: request stop after busy loop in blocking_wait(). 
Otherwise the channel cannot be used again, since CR.EN remains set
and the DMA channel registers are read-only while it is set.
 2023-06-19 09:06:41 +00:00
Dario Nieuwenhuis
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
JuliDi
f8ee33abb9
add half transfer interrupt and circular dma 2023-06-18 18:51:36 +02:00
xoviat
748d1ea89d stm32/ipcc: minor cleanup 2023-06-18 10:10:05 -05:00
Dario Nieuwenhuis
adaed307b4
Merge pull request #1561 from petegibson/stm32-buffereduart-int-flags-fix 
Ensure idle & ove flags are cleared in BufferedUart ISR on STM32
 2023-06-18 10:40:22 +00:00
Peter Gibson
b4f96e192c Don't read data register to clear flags on usart v3 ^& v4 2023-06-18 08:45:58 +10:00
xoviat
ae83e6f536
Merge pull request #1566 from xoviat/tl-mbox-2 
tl-mbox: switch to new ipcc mechanism
 2023-06-17 20:48:37 +00:00
xoviat
6b5d55eb29 stm32/wpan: convert to new ipcc 2023-06-17 12:00:33 -05:00
xoviat
4c9b7befaa stm32/ipcc: add clear debug 2023-06-17 10:50:06 -05:00
JuliDi
78a2ca8a0e
remove unnecessary use, disable DAC and DMA after transfer 2023-06-17 11:51:57 +02:00
JuliDi
f5d084552d
implement mwe of a DMA write() method for DAC 2023-06-17 11:48:21 +02:00
Dario Nieuwenhuis
ec36225f8a
Merge pull request #1560 from kevswims/feature/stm32g4-pll-enhancements 
Feature/stm32g4 pll enhancements - Add PLL support for the P and Q outputs for G4 series chips
 2023-06-16 16:06:50 +00:00
Philipp Scheff
f6c1108bdf fix extended can id 2023-06-16 14:56:28 +02:00
Peter Gibson
d236f3dbf9 actually fix formatting 2023-06-15 18:35:58 +10:00
Peter Gibson
d23717904b fix formatting 2023-06-15 18:33:01 +10:00
Peter Gibson
837950cd74 ensure DR is read to clear idle/overflow interrupt when they occur independently of the rxne 2023-06-15 13:24:49 +10:00
Kevin Lannen
c94ba84892 stm32g4: PLL: Add support for configuring PLL_P and PLL_Q 2023-06-14 10:44:51 -06:00
goueslati
2d89cfb18f fix merge conflict 2023-06-12 14:27:53 +01:00
goueslati
ca8957da43 stm32/ipcc: move tl_mbox into embassy-stm32-wpan 2023-06-12 12:27:51 +01:00
Dario Nieuwenhuis
98c821ac39 Remove embassy-cortex-m crate, move stuff to embassy-hal-common. 2023-06-09 16:44:20 +02:00
Dario Nieuwenhuis
dc8e34420f Remove executor dep+reexports from HALs. 
Closes #1547
 2023-06-09 16:29:45 +02:00
Carl St-Laurent
8ddeaddc67
Rename to follow ref manual and CubeIDE 2023-06-08 20:46:48 -04:00
Carl St-Laurent
0915fb73b2
Merge branch 'master' into stm32g4-pll 2023-06-08 20:43:14 -04:00
Dario Nieuwenhuis
8c93805ab5 Add rt feature to HALs, cfg out interrupt handling when not set. 2023-06-08 18:57:03 +02:00
Dario Nieuwenhuis
5c2f02c735 Reexport NVIC_PRIO_BITS at HAL root. 
This allows using RTIC with `#[rtic::app(device = embassy_nrf, ...)]`
 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
bce24e8005 asdg 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
921780e6bf Make interrupt module more standard. 
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.

This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
  - It works with `cortex-m` functions for manipulating interrupts, for example.
  - It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
 2023-06-08 18:00:48 +02:00
goueslati
ce1d72c609 wip 2023-06-08 16:26:47 +01:00
ExplodingWaffle
a4b8fc420a Replace Into<bool> for Level with From<Level> for bool 2023-06-05 01:37:56 +01:00
Carl St-Laurent
4185c10bf8
Cleanup 2023-06-04 12:09:03 -04:00
Carl St-Laurent
ade46489f1
Added Vcore boost mode and Flash wait state 2023-06-04 11:57:42 -04:00
Carl St-Laurent
6fe853a7d3
Better comments 2023-06-04 10:58:44 -04:00
Carl St-Laurent
2f269f3256
stm32/rcc: Implement basic PLL support for STM32G4 series 2023-06-03 22:05:24 -04:00
gak
3539dd7d4c
Fix #1528 HS USB on STM32F7 2023-06-03 07:00:31 +10:00
Dario Nieuwenhuis
404aa29289 cortex-m: remove owned interrupts. 2023-06-01 03:25:19 +02:00
Dario Nieuwenhuis
7fcded5705 stm32/rtc: fix build failure in some L4s 2023-05-31 20:03:52 +02:00
xoviat
35083b262b
Merge branch 'main' into can 2023-05-30 21:15:26 -05:00
xoviat
16bfbd4e99 stm32/can: add hw test and cleanup 2023-05-30 21:14:25 -05:00
xoviat
f8d35806dc stm32/can: move to irq binding use embassy channel 2023-05-29 19:09:52 -05:00
xoviat
da0be7114f stm32/uart: fix dma ringbuf tests 2023-05-29 15:14:43 -05:00
xoviat
68441a74c2 Merge branch 'main' of https://github.com/embassy-rs/embassy into uart 2023-05-29 15:07:21 -05:00
xoviat
aba0f8fd6c stm32/uart: refactor rx ringbuffer 
- remove some race conditions
- allow full use of rx buffer
 2023-05-29 14:49:43 -05:00
Dario Nieuwenhuis
46961cfdf7 Fix tests. 2023-05-29 19:46:28 +02:00
bors[bot]
bab03a3927
Merge #1489 #1500 
1489: stm32/ipcc: make IPCC methods static r=xoviat a=OueslatiGhaith



1500: stm32/tests: disable sdmmc test for now r=xoviat a=xoviat



Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-29 14:42:51 +00:00
xoviat
403cbb1dc9 Merge commit '8d7abeb06fbe3e19db3cae3f5220725969ecbb81' of https://github.com/Lytehorse/embassy into can 2023-05-29 09:40:37 -05:00
xoviat
37e104a6b3 stm32/ipcc: refactor tl_mbox 2023-05-27 15:05:23 -05:00
xoviat
7e501855fc stm32/ipcc: move into tl_mbox 2023-05-27 15:05:07 -05:00
xoviat
c19967dcf2 stm32/ipcc: extract tl_mbox linker file to embassy-stm32 2023-05-27 15:03:25 -05:00
Dario Nieuwenhuis
bea42a78a4
Merge pull request #1468 from rmja/assume-noise-free 
Add assume_noise_free to usart configuration
 2023-05-27 00:23:56 +02:00
Rasmus Melchior Jacobsen
cb5df138d6 Use found divider instead of re-reading brr 2023-05-26 23:48:49 +02:00
Rasmus Melchior Jacobsen
fee89ed7c7 Remove ability to set alt layout - it does not work. 2023-05-26 15:41:08 +02:00
goueslati
66304a102d Revert "Merge branch 'tl_mbox' into ipcc" 
This reverts commit 859e539f85, reversing
changes made to 984cd47b41.
 2023-05-26 11:26:58 +01:00
Ghaith Oueslati
859e539f85
Merge branch 'tl_mbox' into ipcc 2023-05-26 11:24:08 +01:00
goueslati
2ccf9f3abd stm32/ipcc: static methods for IPCC 2023-05-26 09:56:55 +01:00
bors[bot]
31b364b9b0
Merge #1480 
1480: stm32: Async flash support for F4 r=rmja a=rmja

This PR depends on https://github.com/embassy-rs/embassy/pull/1478.

It adds async write/erase operations to the F4 series based on the work in https://github.com/embassy-rs/embassy/pull/870 but aligned to the new flash regions.

If one considers the entire `Flash` then nothing has changed other than the async operations have been added.



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
 2023-05-26 08:21:57 +00:00
Rasmus Melchior Jacobsen
d82ba4af8a WHY does format on save not work 2023-05-26 00:35:53 +02:00
Rasmus Melchior Jacobsen
35d8edbc41 nightly guard async traits only 2023-05-26 00:31:41 +02:00
Rasmus Melchior Jacobsen
9115431d35 Move nightly guard and clear data cache reset bit 2023-05-26 00:12:22 +02:00
Rasmus Melchior Jacobsen
e08267df54 Move new async to asynch module to guard for models without flash interrupt 2023-05-25 23:51:10 +02:00
Rasmus Melchior Jacobsen
74104aafda erase_sector_blocking -> blocking_erase_sector 2023-05-25 23:13:20 +02:00
Rasmus Melchior Jacobsen
4478d8322b Endless rustfmt pain 2023-05-25 22:58:13 +02:00
Rasmus Melchior Jacobsen
88543445d8 Fix end address for assertion 2023-05-25 22:52:57 +02:00
Rasmus Melchior Jacobsen
b50d04336e Fix merge error 2023-05-25 22:32:57 +02:00
Rasmus Melchior Jacobsen
ce331b411c Only assert_not_corrupted_read if we read from the second bank 2023-05-25 22:31:24 +02:00
Rasmus Melchior Jacobsen
8528455a75 Errata if _not_ pa12 out low 2023-05-25 22:20:05 +02:00
bors[bot]
d28dc08f09
Merge #1486 
1486: feature(embassy-stm32): add RTC MUX selection to embassy-stm32 L4 family r=Dirbaio a=MathiasKoch

To select and setup LSE and/or LSI

Co-authored-by: Mathias <mk@blackbird.online>
 2023-05-25 20:13:27 +00:00
Rasmus Melchior Jacobsen
344e28360f More blocking rename 2023-05-25 22:09:28 +02:00
Rasmus Melchior Jacobsen
983f01016b Merge branch 'async-flash' of https://github.com/rmja/embassy into async-flash 2023-05-25 21:52:35 +02:00
Rasmus Melchior Jacobsen
9eca19b49d *_blocking -> blocking_* 2023-05-25 21:46:26 +02:00
Rasmus Melchior Jacobsen
860b519f99 Let Flash<Async/Blocking> be a thing 2023-05-25 21:40:54 +02:00
Mathias
181c4c5311 Add RTC MUX selection to embassy-stm32 L4 family, to select and setup LSE and/or LSI 2023-05-25 21:28:32 +02:00
Rasmus Melchior Jacobsen
18d14dff48 Handle errata 2.2.12 2023-05-25 21:14:35 +02:00
Rasmus Melchior Jacobsen
b412784a7a Add runtime checks for errata 2.2.11 2023-05-25 20:55:12 +02:00
Rasmus Melchior Jacobsen
8073bf22e9 Add sector number tests 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
e764a3d9ca Fix unused errors 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
49a31bd5d8 Simplify SR->Result 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
7371eefa86 Align with new bind_interrupt 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
15636f05f5 Actually transition to dual bank mode - key was required 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
efc71e08c4 Default to Async mode 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
bac8ad565e Remove TryLockError, 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
44b6494ab7 Let FlashLayout and FlashRegion depends on a Blocking/Async mode generic 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
6df6239704 Run format with nightly 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
c6ffece410 Add more missing nightly guards 2023-05-25 20:07:41 +02:00
Rasmus Melchior Jacobsen
34a2804b54 Fix unused get_sector and ensure_sector_aligned 2023-05-25 20:07:41 +02:00
Rasmus Melchior Jacobsen
cdb1447569 Add missing nightly guards 2023-05-25 20:07:41 +02:00
Rasmus Melchior Jacobsen
0e90e98e9b stm32: Add async flash write/erase to f4 2023-05-25 20:07:41 +02:00
Rasmus Melchior Jacobsen
f616b22159 Fix yet another v1 error 2023-05-25 18:16:46 +02:00
Rasmus Melchior Jacobsen
c5bf36eebf Fix oversampling message for usart v1 2023-05-25 17:56:52 +02:00
goueslati
abbaaeee37 stm32/ipcc: support for MAC 802.15.4 2023-05-25 16:39:43 +01:00
Rasmus Melchior Jacobsen
387a4fcb8e Exclude usart_v1 2023-05-25 17:24:22 +02:00
Rasmus Melchior Jacobsen
cd6256a924 Add assume_noise_free to usart configuration 
Effectively setting cr3.onebit
 2023-05-25 17:24:22 +02:00
Rasmus Melchior Jacobsen
673396c0e7 Update metapac version again 2023-05-25 16:19:46 +02:00
Rasmus Melchior Jacobsen
963f3e3059 Align with updated stm32 metapac 2023-05-25 16:06:02 +02:00
Rasmus Melchior Jacobsen
c02759ad91 Fix unused errors 2023-05-25 13:59:32 +02:00
Rasmus Melchior Jacobsen
8b1eaf00a0 Simplify SR->Result 2023-05-25 13:54:40 +02:00
Rasmus Melchior Jacobsen
baf1c2efbe Align with new bind_interrupt 2023-05-25 13:42:42 +02:00
Rasmus Melchior Jacobsen
cd8198037f Actually transition to dual bank mode - key was required 2023-05-25 13:08:40 +02:00
Rasmus Melchior Jacobsen
e65ff85b88 Default to Async mode 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
9370973846 Remove TryLockError, 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
dfd5603171 Let FlashLayout and FlashRegion depends on a Blocking/Async mode generic 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
966f0abf48 Run format with nightly 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
1329a387e0 Add more missing nightly guards 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
6804b6c0b4 Fix unused get_sector and ensure_sector_aligned 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
ff3a70ed9d Add missing nightly guards 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
b2775fc90c stm32: Add async flash write/erase to f4 2023-05-25 13:04:47 +02:00
bors[bot]
5f10eadb8d
Merge #1475 #1478 #1482 
1475: Add YieldingAsync adapter r=Dirbaio a=rmja

This PR calls `yield_now()` for long blocking `NorFlash` read and erase operations.
The motivation for this change is to allow for other tasks on the same executor to get something done between these long running operations, for example a task that feeds a watchdog. This will allow the watchdog to have a timer relative to e.g. one sector erase, instead of all sector erase.

1478: stm32: Minor fixes in flash regions for F4 dual bank layout r=Dirbaio a=rmja

This PR has the following fixes:
* Ensure that `FlashRegion` instances can only be created within the embassy-stm32 crate.
* Remove `Drop` trait for `AltFlashLayout`, as it is hard to use, as one cannot take the individual regions out from the struct. Instead of going back to single bank mode on `Drop`, we instead transition to single bank mode when calling `Flash::into_regions()`.
* Add missing `otp_region` to the dual bank layout and implement `NorFlash` for the alternate regions.

1482: Add ConcatFlash utility r=Dirbaio a=rmja

This PR adds a `ConcatFlash` utility that can be used to concatenate two `NorFlash` flashes. This is especially useful when concatenating multiple flash regions with unequal erase size.


Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
 2023-05-25 01:05:32 +00:00
bors[bot]
224faccd4c
Merge #1340 #1474 
1340: Add I2S for f4 r=Dirbaio a=xoviat

This is only for f4, but it puts us equal to or ahead of the standard rust hal.

1474: stm32: Fix watchdog timeout computation r=Dirbaio a=rmja



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
 2023-05-25 00:42:10 +00:00
xoviat
316be179af stm32: move to bind_interrupts 
disable lora functionality for now
 2023-05-24 17:29:56 -05:00
Rasmus Melchior Jacobsen
87acf5f50f Add missing set_default_layout() in "other" family 2023-05-23 23:01:55 +02:00
Rasmus Melchior Jacobsen
14e3e72b0f Add missing implementations for f4 alternate regions 2023-05-23 22:51:26 +02:00
Rasmus Melchior Jacobsen
faf506b300 Remove Drop for AltFlashLayout 2023-05-23 22:50:41 +02:00
Rasmus Melchior Jacobsen
879c621394 Ensure FlashRegion can only be created within this crate 2023-05-23 22:49:27 +02:00
bors[bot]
1fdde8f03f
Merge #1457 
1457: TL Mbox read and write for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, built upon the work done in #1405 and #1424, and was tested on an stm32wb55rg.

This pull request aims to add read and write functionality to the TL mailbox for stm32wb microcontrollers

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-23 01:15:22 +00:00
Rasmus Melchior Jacobsen
e9121cba2c stm32: Fix watchdog timeout computation 2023-05-22 14:22:27 +02:00
xoviat
7f702fd6f1 stm32/ipcc: fix warnings 2023-05-20 11:29:53 -05:00
xoviat
383bef1711 stm32/ipcc: naming 2023-05-20 10:24:26 -05:00
xoviat
5e86188c25 stm32/ipcc: cleanup naming 2023-05-20 10:24:13 -05:00
xoviat
661b1f3373 stm32/ipcc: remove constrain 2023-05-20 10:23:57 -05:00
Dario Nieuwenhuis
8b9306ed5c stm32/sdmmc: fix "drop with a value that implements Copy does nothing" warning. 2023-05-19 18:00:33 +02:00
Dario Nieuwenhuis
9f7392474b Update Rust nightly. 2023-05-19 17:12:39 +02:00
bors[bot]
9dff6b9d81
Merge #1419 
1419: stm32/pwm: improve dead-time api r=Dirbaio a=xoviat



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-19 14:41:44 +00:00
Dario Nieuwenhuis
f43d57846e stm32/usb: do not require embassy-time. 
Fixes #1466
 2023-05-19 15:20:37 +02:00
goueslati
a8953b5c66 cleanup 2023-05-15 10:34:52 +01:00
goueslati
d97724cca3 tl_mbox read and write 2023-05-15 10:25:02 +01:00
bors[bot]
4567eff78e
Merge #1455 
1455: Remove unused `feature(type_alias_impl_trait)`. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2023-05-14 21:57:51 +00:00
Dario Nieuwenhuis
2d65373f63 Remove unused feature(type_alias_impl_trait). 2023-05-14 23:44:53 +02:00
bors[bot]
ae4827587c
Merge #1454 
1454: stm32f0 flash implementation r=Dirbaio a=jp99

i've copied and modified the f3 implementation and it seems to be working.


Co-authored-by: Jaap Prickartz <jaap@tetra.nl>
 2023-05-14 21:39:55 +00:00
Jaap Prickartz
ec7a4fd9cc stm32f0 flash implementation 2023-05-14 21:57:31 +02:00
Timo Kröger
977a7906e4 stm32 uart: Fix error flag handling for blocking operations 
Clear and report the error flags one by one and pop the data byte only
after all error flags were handled.

For v1/v2 we emulate the v3/v4 behaviour by buffering the status
register because a read to the data register clears all flags at once
which means we might loose all but the first error.
 2023-05-14 21:10:37 +02:00
goueslati
3810fe6a20 tl_mbox: added zigee, lld tests and ble lld tables to ref table 2023-05-12 10:26:46 +01:00