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1626 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
6eb46c419c
Merge pull request #1565 from JuliDi/main 
Implement DMA for DAC on STM32
 2023-06-29 08:54:28 +00:00
Julian
96f1525ffe
Revert changes to dma.rs 2023-06-29 09:20:25 +02:00
Dario Nieuwenhuis
e892014b65 Update stm32-metapac, includes chiptool changes to use real Rust enums now. 2023-06-29 02:01:33 +02:00
Kevin Lannen
5666c56903 STM32G4: Add CRS support to RCC 
Create working CRS USB Example
 2023-06-28 16:53:16 -06:00
JuliDi
daedfbbd87
add dma is_running change doc 2023-06-28 15:39:36 +02:00
JuliDi
91c31d5e43
Update DAC examples, add DAC + DMA example 2023-06-28 11:58:25 +02:00
Dario Nieuwenhuis
ed493be869 stm32: update metapac, includes fix for OTG with 9 endpoints (H7) 2023-06-27 23:58:32 +02:00
JuliDi
9c81d63155
fix warnings 2023-06-27 22:33:17 +02:00
JuliDi
60c54107ce
fix sdmmc bdma transferconfig fields 2023-06-27 21:58:56 +02:00
JuliDi
56dd22f0ac
feature-gate set_channel_mode, undo dma.rs changes 2023-06-27 21:23:47 +02:00
JuliDi
afec1b439b
feature-gate dma write, make trigger not return a result 2023-06-27 18:17:51 +02:00
Dario Nieuwenhuis
219ef5b37a stm32/otg: add VBUS detection. 
Fixes #1442.
 2023-06-27 12:52:37 +02:00
Dario Nieuwenhuis
5e6e18b310 stm32/usb: add TODO: implement VBUS detection. 2023-06-27 04:29:01 +02:00
Dario Nieuwenhuis
80407aa930 stm32/otg: set tx fifo num in IN endpoints on configure. 2023-06-27 02:12:33 +02:00
Dario Nieuwenhuis
a575e40a35 stm32/otg: clear NAK bit on endpoint enable. 2023-06-27 02:12:06 +02:00
Dario Nieuwenhuis
28fb492c40 stm32/otg: flush fifos on reconfigure and on ep disable. 2023-06-27 00:42:24 +02:00
JuliDi
e7bc84dda8
fix issues when DAC2 present, add additional options to DMA (NOT YET WORKING with STM32H7A3ZI) 2023-06-26 09:42:25 +02:00
JuliDi
8cafaa1f3c
add docs, cleanup 2023-06-25 11:54:25 +02:00
JuliDi
df944edeef
fix minor issues with splitting channels etc 2023-06-25 10:53:35 +02:00
JuliDi
388d3e273d
first attempt at fixing the 2nd channel problem 2023-06-24 13:10:59 +02:00
xoviat
49333ce6ad stm32/wpan: move linker file into pkg 2023-06-23 20:09:13 -05:00
JuliDi
915f79c974
allow independent use of ch1 and ch2 on dac 2023-06-23 12:14:40 +02:00
JuliDi
ea04a0277b
change dma complete transfer IR default to true 2023-06-23 12:14:26 +02:00
schphil
71afa40a69
Merge branch 'embassy-rs:main' into can-split 2023-06-23 10:19:30 +02:00
Philipp Scheff
89fbb02979 add as_mut 2023-06-22 17:49:33 +02:00
Philipp Scheff
5ecf9ec7bc split can 2023-06-22 17:17:51 +02:00
JuliDi
78736328a0
update docs and update to new dma interface 2023-06-22 10:44:08 +02:00
JuliDi
8d0095c618
add option to enable/disable complete transfer interrupt 2023-06-22 10:43:45 +02:00
xoviat
1f2be2dac5
Merge pull request #1569 from xoviat/tl-mbox-2 
wpan: misc. cleanup and add mac
 2023-06-21 21:50:12 +00:00
JuliDi
fdb3c3d6ff
Merge remote-tracking branch 'upstream/main' 2023-06-21 11:52:53 +02:00
Dario Nieuwenhuis
2e625138ff
Merge pull request #1501 from xoviat/can 
async can
 2023-06-20 22:57:31 +00:00
xoviat
ca21027eea
Merge pull request #3 from schphil/can 
fix extended can id
 2023-06-20 17:45:28 -05:00
xoviat
0a551eb7c6 stm32/can: fix time 2023-06-20 17:39:00 -05:00
xoviat
0d67ef795e Merge branch 'main' of https://github.com/embassy-rs/embassy into tl-mbox-2 2023-06-19 21:18:46 -05:00
xoviat
0998221478 stm32/can: update interrupts 2023-06-19 16:05:59 -05:00
Dario Nieuwenhuis
428a4ba3f9 stm32/gpdma: clear all interrupts after reset. 
Reset doesn't clear them, this causes subsequent transfers to instantly
complete because the TC flag was set from before.
 2023-06-19 23:03:31 +02:00
xoviat
aaad906815 Merge branch 'main' of https://github.com/embassy-rs/embassy into can 2023-06-19 15:52:33 -05:00
JuliDi
56ab6d9f14
remove write_X variants 2023-06-19 13:54:22 +02:00
JuliDi
88052480b1
fix typo, minor cleanup 2023-06-19 13:50:17 +02:00
JuliDi
218b102b28
remove Alignment and make Value and Value array look the same 2023-06-19 13:46:17 +02:00
JuliDi
fe7b72948a
add ValueArray type and respective write functions 2023-06-19 13:42:25 +02:00
Dario Nieuwenhuis
3c70f799a2
Merge pull request #1572 from whitequark/bdma-blocking_wait-stop 
BDMA: request stop after busy loop in blocking_wait()
 2023-06-19 09:55:07 +00:00
JuliDi
e0747e937f
remove unsafe for circular dma reg access 2023-06-19 11:15:09 +02:00
JuliDi
320e2cf35b
Merge branch 'main' of github.com:embassy-rs/embassy 2023-06-19 11:14:48 +02:00
Catherine
bbc81146ec BDMA: request stop after busy loop in blocking_wait(). 
Otherwise the channel cannot be used again, since CR.EN remains set
and the DMA channel registers are read-only while it is set.
 2023-06-19 09:06:41 +00:00
Dario Nieuwenhuis
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
JuliDi
f8ee33abb9
add half transfer interrupt and circular dma 2023-06-18 18:51:36 +02:00
xoviat
748d1ea89d stm32/ipcc: minor cleanup 2023-06-18 10:10:05 -05:00
Dario Nieuwenhuis
adaed307b4
Merge pull request #1561 from petegibson/stm32-buffereduart-int-flags-fix 
Ensure idle & ove flags are cleared in BufferedUart ISR on STM32
 2023-06-18 10:40:22 +00:00
Peter Gibson
b4f96e192c Don't read data register to clear flags on usart v3 ^& v4 2023-06-18 08:45:58 +10:00
xoviat
ae83e6f536
Merge pull request #1566 from xoviat/tl-mbox-2 
tl-mbox: switch to new ipcc mechanism
 2023-06-17 20:48:37 +00:00
xoviat
6b5d55eb29 stm32/wpan: convert to new ipcc 2023-06-17 12:00:33 -05:00
xoviat
4c9b7befaa stm32/ipcc: add clear debug 2023-06-17 10:50:06 -05:00
JuliDi
78a2ca8a0e
remove unnecessary use, disable DAC and DMA after transfer 2023-06-17 11:51:57 +02:00
JuliDi
f5d084552d
implement mwe of a DMA write() method for DAC 2023-06-17 11:48:21 +02:00
Dario Nieuwenhuis
ec36225f8a
Merge pull request #1560 from kevswims/feature/stm32g4-pll-enhancements 
Feature/stm32g4 pll enhancements - Add PLL support for the P and Q outputs for G4 series chips
 2023-06-16 16:06:50 +00:00
Philipp Scheff
f6c1108bdf fix extended can id 2023-06-16 14:56:28 +02:00
Peter Gibson
d236f3dbf9 actually fix formatting 2023-06-15 18:35:58 +10:00
Peter Gibson
d23717904b fix formatting 2023-06-15 18:33:01 +10:00
Peter Gibson
837950cd74 ensure DR is read to clear idle/overflow interrupt when they occur independently of the rxne 2023-06-15 13:24:49 +10:00
Kevin Lannen
c94ba84892 stm32g4: PLL: Add support for configuring PLL_P and PLL_Q 2023-06-14 10:44:51 -06:00
goueslati
2d89cfb18f fix merge conflict 2023-06-12 14:27:53 +01:00
goueslati
ca8957da43 stm32/ipcc: move tl_mbox into embassy-stm32-wpan 2023-06-12 12:27:51 +01:00
Dario Nieuwenhuis
98c821ac39 Remove embassy-cortex-m crate, move stuff to embassy-hal-common. 2023-06-09 16:44:20 +02:00
Dario Nieuwenhuis
dc8e34420f Remove executor dep+reexports from HALs. 
Closes #1547
 2023-06-09 16:29:45 +02:00
Carl St-Laurent
8ddeaddc67
Rename to follow ref manual and CubeIDE 2023-06-08 20:46:48 -04:00
Carl St-Laurent
0915fb73b2
Merge branch 'master' into stm32g4-pll 2023-06-08 20:43:14 -04:00
Dario Nieuwenhuis
8c93805ab5 Add rt feature to HALs, cfg out interrupt handling when not set. 2023-06-08 18:57:03 +02:00
Dario Nieuwenhuis
5c2f02c735 Reexport NVIC_PRIO_BITS at HAL root. 
This allows using RTIC with `#[rtic::app(device = embassy_nrf, ...)]`
 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
bce24e8005 asdg 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
921780e6bf Make interrupt module more standard. 
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.

This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
  - It works with `cortex-m` functions for manipulating interrupts, for example.
  - It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
 2023-06-08 18:00:48 +02:00
goueslati
ce1d72c609 wip 2023-06-08 16:26:47 +01:00
ExplodingWaffle
a4b8fc420a Replace Into<bool> for Level with From<Level> for bool 2023-06-05 01:37:56 +01:00
Carl St-Laurent
4185c10bf8
Cleanup 2023-06-04 12:09:03 -04:00
Carl St-Laurent
ade46489f1
Added Vcore boost mode and Flash wait state 2023-06-04 11:57:42 -04:00
Carl St-Laurent
6fe853a7d3
Better comments 2023-06-04 10:58:44 -04:00
Carl St-Laurent
2f269f3256
stm32/rcc: Implement basic PLL support for STM32G4 series 2023-06-03 22:05:24 -04:00
gak
3539dd7d4c
Fix #1528 HS USB on STM32F7 2023-06-03 07:00:31 +10:00
Dario Nieuwenhuis
404aa29289 cortex-m: remove owned interrupts. 2023-06-01 03:25:19 +02:00
Dario Nieuwenhuis
7fcded5705 stm32/rtc: fix build failure in some L4s 2023-05-31 20:03:52 +02:00
xoviat
35083b262b
Merge branch 'main' into can 2023-05-30 21:15:26 -05:00
xoviat
16bfbd4e99 stm32/can: add hw test and cleanup 2023-05-30 21:14:25 -05:00
xoviat
f8d35806dc stm32/can: move to irq binding use embassy channel 2023-05-29 19:09:52 -05:00
xoviat
da0be7114f stm32/uart: fix dma ringbuf tests 2023-05-29 15:14:43 -05:00
xoviat
68441a74c2 Merge branch 'main' of https://github.com/embassy-rs/embassy into uart 2023-05-29 15:07:21 -05:00
xoviat
aba0f8fd6c stm32/uart: refactor rx ringbuffer 
- remove some race conditions
- allow full use of rx buffer
 2023-05-29 14:49:43 -05:00
Dario Nieuwenhuis
46961cfdf7 Fix tests. 2023-05-29 19:46:28 +02:00
bors[bot]
bab03a3927
Merge #1489 #1500 
1489: stm32/ipcc: make IPCC methods static r=xoviat a=OueslatiGhaith



1500: stm32/tests: disable sdmmc test for now r=xoviat a=xoviat



Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-29 14:42:51 +00:00
xoviat
403cbb1dc9 Merge commit '8d7abeb06fbe3e19db3cae3f5220725969ecbb81' of https://github.com/Lytehorse/embassy into can 2023-05-29 09:40:37 -05:00
xoviat
37e104a6b3 stm32/ipcc: refactor tl_mbox 2023-05-27 15:05:23 -05:00
xoviat
7e501855fc stm32/ipcc: move into tl_mbox 2023-05-27 15:05:07 -05:00
xoviat
c19967dcf2 stm32/ipcc: extract tl_mbox linker file to embassy-stm32 2023-05-27 15:03:25 -05:00
Dario Nieuwenhuis
bea42a78a4
Merge pull request #1468 from rmja/assume-noise-free 
Add assume_noise_free to usart configuration
 2023-05-27 00:23:56 +02:00
Rasmus Melchior Jacobsen
cb5df138d6 Use found divider instead of re-reading brr 2023-05-26 23:48:49 +02:00
Rasmus Melchior Jacobsen
fee89ed7c7 Remove ability to set alt layout - it does not work. 2023-05-26 15:41:08 +02:00
goueslati
66304a102d Revert "Merge branch 'tl_mbox' into ipcc" 
This reverts commit 859e539f85, reversing
changes made to 984cd47b41.
 2023-05-26 11:26:58 +01:00
Ghaith Oueslati
859e539f85
Merge branch 'tl_mbox' into ipcc 2023-05-26 11:24:08 +01:00
goueslati
2ccf9f3abd stm32/ipcc: static methods for IPCC 2023-05-26 09:56:55 +01:00
bors[bot]
31b364b9b0
Merge #1480 
1480: stm32: Async flash support for F4 r=rmja a=rmja

This PR depends on https://github.com/embassy-rs/embassy/pull/1478.

It adds async write/erase operations to the F4 series based on the work in https://github.com/embassy-rs/embassy/pull/870 but aligned to the new flash regions.

If one considers the entire `Flash` then nothing has changed other than the async operations have been added.



Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
 2023-05-26 08:21:57 +00:00
Rasmus Melchior Jacobsen
d82ba4af8a WHY does format on save not work 2023-05-26 00:35:53 +02:00
Rasmus Melchior Jacobsen
35d8edbc41 nightly guard async traits only 2023-05-26 00:31:41 +02:00
Rasmus Melchior Jacobsen
9115431d35 Move nightly guard and clear data cache reset bit 2023-05-26 00:12:22 +02:00
Rasmus Melchior Jacobsen
e08267df54 Move new async to asynch module to guard for models without flash interrupt 2023-05-25 23:51:10 +02:00
Rasmus Melchior Jacobsen
74104aafda erase_sector_blocking -> blocking_erase_sector 2023-05-25 23:13:20 +02:00
Rasmus Melchior Jacobsen
4478d8322b Endless rustfmt pain 2023-05-25 22:58:13 +02:00
Rasmus Melchior Jacobsen
88543445d8 Fix end address for assertion 2023-05-25 22:52:57 +02:00
Rasmus Melchior Jacobsen
b50d04336e Fix merge error 2023-05-25 22:32:57 +02:00
Rasmus Melchior Jacobsen
ce331b411c Only assert_not_corrupted_read if we read from the second bank 2023-05-25 22:31:24 +02:00
Rasmus Melchior Jacobsen
8528455a75 Errata if _not_ pa12 out low 2023-05-25 22:20:05 +02:00
bors[bot]
d28dc08f09
Merge #1486 
1486: feature(embassy-stm32): add RTC MUX selection to embassy-stm32 L4 family r=Dirbaio a=MathiasKoch

To select and setup LSE and/or LSI

Co-authored-by: Mathias <mk@blackbird.online>
 2023-05-25 20:13:27 +00:00
Rasmus Melchior Jacobsen
344e28360f More blocking rename 2023-05-25 22:09:28 +02:00
Rasmus Melchior Jacobsen
983f01016b Merge branch 'async-flash' of https://github.com/rmja/embassy into async-flash 2023-05-25 21:52:35 +02:00
Rasmus Melchior Jacobsen
9eca19b49d *_blocking -> blocking_* 2023-05-25 21:46:26 +02:00
Rasmus Melchior Jacobsen
860b519f99 Let Flash<Async/Blocking> be a thing 2023-05-25 21:40:54 +02:00
Mathias
181c4c5311 Add RTC MUX selection to embassy-stm32 L4 family, to select and setup LSE and/or LSI 2023-05-25 21:28:32 +02:00
Rasmus Melchior Jacobsen
18d14dff48 Handle errata 2.2.12 2023-05-25 21:14:35 +02:00
Rasmus Melchior Jacobsen
b412784a7a Add runtime checks for errata 2.2.11 2023-05-25 20:55:12 +02:00
Rasmus Melchior Jacobsen
8073bf22e9 Add sector number tests 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
e764a3d9ca Fix unused errors 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
49a31bd5d8 Simplify SR->Result 2023-05-25 20:07:43 +02:00
Rasmus Melchior Jacobsen
7371eefa86 Align with new bind_interrupt 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
15636f05f5 Actually transition to dual bank mode - key was required 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
efc71e08c4 Default to Async mode 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
bac8ad565e Remove TryLockError, 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
44b6494ab7 Let FlashLayout and FlashRegion depends on a Blocking/Async mode generic 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
6df6239704 Run format with nightly 2023-05-25 20:07:42 +02:00
Rasmus Melchior Jacobsen
c6ffece410 Add more missing nightly guards 2023-05-25 20:07:41 +02:00
Rasmus Melchior Jacobsen
34a2804b54 Fix unused get_sector and ensure_sector_aligned 2023-05-25 20:07:41 +02:00
Rasmus Melchior Jacobsen
cdb1447569 Add missing nightly guards 2023-05-25 20:07:41 +02:00
Rasmus Melchior Jacobsen
0e90e98e9b stm32: Add async flash write/erase to f4 2023-05-25 20:07:41 +02:00
Rasmus Melchior Jacobsen
f616b22159 Fix yet another v1 error 2023-05-25 18:16:46 +02:00
Rasmus Melchior Jacobsen
c5bf36eebf Fix oversampling message for usart v1 2023-05-25 17:56:52 +02:00
goueslati
abbaaeee37 stm32/ipcc: support for MAC 802.15.4 2023-05-25 16:39:43 +01:00
Rasmus Melchior Jacobsen
387a4fcb8e Exclude usart_v1 2023-05-25 17:24:22 +02:00
Rasmus Melchior Jacobsen
cd6256a924 Add assume_noise_free to usart configuration 
Effectively setting cr3.onebit
 2023-05-25 17:24:22 +02:00
Rasmus Melchior Jacobsen
673396c0e7 Update metapac version again 2023-05-25 16:19:46 +02:00
Rasmus Melchior Jacobsen
963f3e3059 Align with updated stm32 metapac 2023-05-25 16:06:02 +02:00
Rasmus Melchior Jacobsen
c02759ad91 Fix unused errors 2023-05-25 13:59:32 +02:00
Rasmus Melchior Jacobsen
8b1eaf00a0 Simplify SR->Result 2023-05-25 13:54:40 +02:00
Rasmus Melchior Jacobsen
baf1c2efbe Align with new bind_interrupt 2023-05-25 13:42:42 +02:00
Rasmus Melchior Jacobsen
cd8198037f Actually transition to dual bank mode - key was required 2023-05-25 13:08:40 +02:00
Rasmus Melchior Jacobsen
e65ff85b88 Default to Async mode 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
9370973846 Remove TryLockError, 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
dfd5603171 Let FlashLayout and FlashRegion depends on a Blocking/Async mode generic 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
966f0abf48 Run format with nightly 2023-05-25 13:04:48 +02:00
Rasmus Melchior Jacobsen
1329a387e0 Add more missing nightly guards 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
6804b6c0b4 Fix unused get_sector and ensure_sector_aligned 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
ff3a70ed9d Add missing nightly guards 2023-05-25 13:04:47 +02:00
Rasmus Melchior Jacobsen
b2775fc90c stm32: Add async flash write/erase to f4 2023-05-25 13:04:47 +02:00
bors[bot]
5f10eadb8d
Merge #1475 #1478 #1482 
1475: Add YieldingAsync adapter r=Dirbaio a=rmja

This PR calls `yield_now()` for long blocking `NorFlash` read and erase operations.
The motivation for this change is to allow for other tasks on the same executor to get something done between these long running operations, for example a task that feeds a watchdog. This will allow the watchdog to have a timer relative to e.g. one sector erase, instead of all sector erase.

1478: stm32: Minor fixes in flash regions for F4 dual bank layout r=Dirbaio a=rmja

This PR has the following fixes:
* Ensure that `FlashRegion` instances can only be created within the embassy-stm32 crate.
* Remove `Drop` trait for `AltFlashLayout`, as it is hard to use, as one cannot take the individual regions out from the struct. Instead of going back to single bank mode on `Drop`, we instead transition to single bank mode when calling `Flash::into_regions()`.
* Add missing `otp_region` to the dual bank layout and implement `NorFlash` for the alternate regions.

1482: Add ConcatFlash utility r=Dirbaio a=rmja

This PR adds a `ConcatFlash` utility that can be used to concatenate two `NorFlash` flashes. This is especially useful when concatenating multiple flash regions with unequal erase size.


Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
 2023-05-25 01:05:32 +00:00
bors[bot]
224faccd4c
Merge #1340 #1474 
1340: Add I2S for f4 r=Dirbaio a=xoviat

This is only for f4, but it puts us equal to or ahead of the standard rust hal.

1474: stm32: Fix watchdog timeout computation r=Dirbaio a=rmja



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
Co-authored-by: Rasmus Melchior Jacobsen <rmja@laesoe.org>
 2023-05-25 00:42:10 +00:00
xoviat
316be179af stm32: move to bind_interrupts 
disable lora functionality for now
 2023-05-24 17:29:56 -05:00
Rasmus Melchior Jacobsen
87acf5f50f Add missing set_default_layout() in "other" family 2023-05-23 23:01:55 +02:00
Rasmus Melchior Jacobsen
14e3e72b0f Add missing implementations for f4 alternate regions 2023-05-23 22:51:26 +02:00
Rasmus Melchior Jacobsen
faf506b300 Remove Drop for AltFlashLayout 2023-05-23 22:50:41 +02:00
Rasmus Melchior Jacobsen
879c621394 Ensure FlashRegion can only be created within this crate 2023-05-23 22:49:27 +02:00
bors[bot]
1fdde8f03f
Merge #1457 
1457: TL Mbox read and write for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, built upon the work done in #1405 and #1424, and was tested on an stm32wb55rg.

This pull request aims to add read and write functionality to the TL mailbox for stm32wb microcontrollers

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-23 01:15:22 +00:00
Rasmus Melchior Jacobsen
e9121cba2c stm32: Fix watchdog timeout computation 2023-05-22 14:22:27 +02:00
xoviat
7f702fd6f1 stm32/ipcc: fix warnings 2023-05-20 11:29:53 -05:00
xoviat
383bef1711 stm32/ipcc: naming 2023-05-20 10:24:26 -05:00
xoviat
5e86188c25 stm32/ipcc: cleanup naming 2023-05-20 10:24:13 -05:00
xoviat
661b1f3373 stm32/ipcc: remove constrain 2023-05-20 10:23:57 -05:00
Dario Nieuwenhuis
8b9306ed5c stm32/sdmmc: fix "drop with a value that implements Copy does nothing" warning. 2023-05-19 18:00:33 +02:00
Dario Nieuwenhuis
9f7392474b Update Rust nightly. 2023-05-19 17:12:39 +02:00
bors[bot]
9dff6b9d81
Merge #1419 
1419: stm32/pwm: improve dead-time api r=Dirbaio a=xoviat



Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-19 14:41:44 +00:00
Dario Nieuwenhuis
f43d57846e stm32/usb: do not require embassy-time. 
Fixes #1466
 2023-05-19 15:20:37 +02:00
goueslati
a8953b5c66 cleanup 2023-05-15 10:34:52 +01:00
goueslati
d97724cca3 tl_mbox read and write 2023-05-15 10:25:02 +01:00
bors[bot]
4567eff78e
Merge #1455 
1455: Remove unused `feature(type_alias_impl_trait)`. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2023-05-14 21:57:51 +00:00
Dario Nieuwenhuis
2d65373f63 Remove unused feature(type_alias_impl_trait). 2023-05-14 23:44:53 +02:00
bors[bot]
ae4827587c
Merge #1454 
1454: stm32f0 flash implementation r=Dirbaio a=jp99

i've copied and modified the f3 implementation and it seems to be working.


Co-authored-by: Jaap Prickartz <jaap@tetra.nl>
 2023-05-14 21:39:55 +00:00
Jaap Prickartz
ec7a4fd9cc stm32f0 flash implementation 2023-05-14 21:57:31 +02:00
Timo Kröger
977a7906e4 stm32 uart: Fix error flag handling for blocking operations 
Clear and report the error flags one by one and pop the data byte only
after all error flags were handled.

For v1/v2 we emulate the v3/v4 behaviour by buffering the status
register because a read to the data register clears all flags at once
which means we might loose all but the first error.
 2023-05-14 21:10:37 +02:00
goueslati
3810fe6a20 tl_mbox: added zigee, lld tests and ble lld tables to ref table 2023-05-12 10:26:46 +01:00
bors[bot]
7f96359804
Merge #1424 
1424: add TL maibox for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, build upon the work done in #1405, and was tested on an stm32wb55rg.

This pull request aims to add the transport layer mailbox for stm32wb microcontrollers. For now it's only capable of initializing it and getting the firmware information

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-11 22:48:55 +00:00
Dirk Stolle
0584312ef0 Fix some typos 2023-05-08 23:25:01 +02:00
Marco Pastrello
db2bc8783e Improve readability 2023-05-05 19:04:58 +02:00
Marco Pastrello
c37f86ff1c removes unecessary braces 2023-05-05 00:12:32 +02:00
Marco Pastrello
2dcbe75cca beautify 2023-05-04 23:51:42 +02:00
Marco Pastrello
5158014f3f PPLXTPRE is a bool. 
This flag for example permits the following clock tree
configuration on stm32f103r8

    let mut config = Config::default();
    config.rcc.hse = Some(Hertz(16_000_000));
    config.rcc.sys_ck = Some(Hertz(72_000_000));
    config.rcc.pclk1 = Some(Hertz(36_000_000));
    config.rcc.pclk2 = Some(Hertz(72_000_000));
    config.rcc.pllxtpre = true;

Init fails if pllxtpre is false.
 2023-05-04 22:59:52 +02:00
Marco Pastrello
1cc61dc68a Support PLLXTPRE switch. 
See figure 2. Clock tree page 12 DS5319 Rev 18
https://www.st.com/resource/en/datasheet/stm32f103cb.pdf
 2023-05-04 21:32:37 +02:00
ceekdee
91612b7446 Simplify SUBGHZSPI configuration. 2023-05-04 09:45:18 -05:00
goueslati
007f452927 removed hardcoded addresses in memory.x 2023-05-04 11:02:17 +01:00
Chuck Davis
91d1fff4ed
Merge branch 'embassy-rs:master' into master 2023-05-03 21:07:28 -05:00
ceekdee
629e0ea595 Handle SUBGHZSPI as async. 2023-05-03 21:05:47 -05:00
xoviat
02d6e0d14d stm32/i2s: add module and example for f4 2023-05-03 18:17:57 -05:00
goueslati
0997021a05 fixed ble table cmd buffer being constant 2023-05-03 11:11:51 +01:00
Dario Nieuwenhuis
a61701b756 stm32/usart: add OVER8 and PRESC support, update PAC 2023-05-02 19:36:00 +02:00
goueslati
371a80e1a2 whoops, plugin formatted Cargo.toml, reverting 2023-05-02 14:16:59 +01:00
goueslati
bab30a7e87 added TL Mailbox initialization for STM32WB 2023-05-02 12:16:48 +01:00
xoviat
cd88e39f5f stm32/pwm: improve dead-time api 2023-05-01 16:42:03 -05:00
Dario Nieuwenhuis
00cde67abe stm32/dma: solve overlapping impl on DmaCtrl on stm32h7 2023-05-01 23:20:51 +02:00
Dario Nieuwenhuis
96e8a7ddb9 stm32/uart: feature-gate ringbuffer out when using gpdma, not supported yet. 2023-05-01 22:43:23 +02:00
Dario Nieuwenhuis
25864ae4dc stm32/bdma: add ringbuffer support. 2023-05-01 22:42:36 +02:00
Dario Nieuwenhuis
14e0090cb1 stm32/dma: remove separate process_tcif. 2023-05-01 22:42:36 +02:00
Rasmus Melchior Jacobsen
45843034ec Actually clear idle flag 2023-05-01 22:42:36 +02:00
Rasmus Melchior Jacobsen
7757405908 Remove unused import 2023-05-01 22:42:36 +02:00
Rasmus Melchior Jacobsen
fc268df6f5 Support overflow detection for more than one ring-period 2023-05-01 22:42:36 +02:00
Rasmus Melchior Jacobsen
4ea6662e55 Do not disable dma request when idle line is detected 2023-05-01 22:42:36 +02:00
Rasmus Melchior Jacobsen
49455792cb Ring-buffered uart rx with one-period overrun detection 2023-05-01 22:42:36 +02:00
bors[bot]
855c0d1423
Merge #1376 
1376: rtc: cleanup and consolidate r=Dirbaio a=xoviat

This removes an extra file that I left in, adds an example, and consolidates the files into one 'v2' file.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-01 19:32:06 +00:00
Chuck Davis
ff6748a0d8
Merge branch 'embassy-rs:master' into master 2023-04-30 11:09:43 -05:00
bors[bot]
7646f18836
Merge #1405 
1405: add IPCC peripheral for stm32wb r=xoviat a=OueslatiGhaith

Hello again,

This pull request is related to #1397 and #1401, inspired by #24, and was tested on an stm32wb55rg.

This pull request aims to add the IPCC peripheral for stm32wb microcontrollers.
I am debating whether this should be included in the public API, since the IPCC peripheral would be typically managed by the TL Mailbox, not by the app directly.

Co-authored-by: OueslatiGhaith <ghaith.oueslati@enis.tn>
 2023-04-30 15:23:55 +00:00
bors[bot]
41fe718ea8
Merge #1412 
1412: stm32/uart: abort on error r=Dirbaio a=xoviat

This PR aborts the DMA transfer in the event of a UART error. Otherwise, the transfer will never complete, and an error will not be returned.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-04-30 14:58:36 +00:00
xoviat
b77794c9a7 stm32/uart: abort on error 2023-04-28 21:43:03 -05:00
Chuck Davis
49bed094a3
Merge branch 'embassy-rs:master' into master 2023-04-28 13:35:22 -05:00
OueslatiGhaith
29cc661dca removed constrain method 2023-04-28 10:17:01 +01:00
OueslatiGhaith
91cddd50f6 reversed changes in Cargo.toml 2023-04-27 18:26:19 +01:00
ceekdee
9d610c6866 Remove legacy LoRa drivers. 2023-04-27 11:05:33 -05:00
OueslatiGhaith
d960bf344a fixed missing imports 2023-04-27 16:22:41 +01:00
OueslatiGhaith
3ba73b5ff4 fixed mistake with casting channel to a usize 2023-04-27 16:08:57 +01:00
OueslatiGhaith
8c733c29cc add IPCC peripheral for stm32wb 2023-04-27 16:03:22 +01:00
Ulf Lilleengen
42a8f1671d Bump versions preparing for -macros and -executor release 2023-04-27 11:54:22 +02:00
xoviat
0d82ebea29 stm32/rtc: fix datetime and add f4 test 2023-04-25 17:35:01 -05:00
ceekdee
f729d2d060 Deprecate original LoRa drivers. Update rust-lorawan releases. 2023-04-25 13:51:19 -05:00
ceekdee
02c86bca52 Add external LoRa physical layer functionality. 2023-04-21 01:20:46 -05:00
bors[bot]
41e90e22e2
Merge #1370 
1370: stm32/i2c: fix races when using dma. r=Dirbaio a=xoviat

This change addresses two races:

1. It removes the `chunks_transferred` state variable that is modified inside the interrupt. Analysis of the code reveals that the only time the waker can be woken is when `chunks_transferred` is incremented. Therefore, waking is enough to signal the `poll_fn` that the `chunks_transferred` has incremented. Moving to `remaining_len` clarifies the code, since there is no need to track how many chunks are remaining.
2. It moves the start of the transfer until after the waker is registered, which could theoretically occur if the clock speed is very low, but probably never would even if this wasn't fixed.

There is another race that I noticed: between writes the waker may not yet be registered. In that case, the code would simply be stuck and the `poll_fn` would never be woken. There is no way to resolve this without broadening the scope of the analysis, and this will likely never occur. 

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-04-19 21:36:04 +00:00
xoviat
64b80c2e4d stm32/i2c: ignore wakes without interrupt 2023-04-19 16:16:44 -05:00
xoviat
e24421a393 stm32/rtc: impl. functions on trait 2023-04-18 20:38:51 -05:00
xoviat
4de4039417 stm32/rtc: build more chips 2023-04-18 20:38:28 -05:00
xoviat
f589247c1f stm32/rtc: cleanup and consolidate 2023-04-18 20:38:18 -05:00
anton smeenk
3260f6b2af stm32/spi: add new_txonly_nosck constructor, for neopixels, with an example in the stm32g0 directory. 2023-04-18 20:59:25 +02:00
Dario Nieuwenhuis
2080d8bb6d stm32/spi: add support for all word sizes. 
Co-Authored-By: anton smeenk <asmeenk@planet.nl>
 2023-04-18 20:56:23 +02:00
Dario Nieuwenhuis
fbd6eeb748
Merge pull request #1348 from embassy-rs/h5-spi 
stm32/dma: refactor
 2023-04-18 17:03:24 +02:00
Dario Nieuwenhuis
efc70debb3 stm32/dma: add double buffered mode for DMA, update DCMI. 2023-04-18 16:41:24 +02:00
Dario Nieuwenhuis
173c65b543 stm32/dma: refactor. 2023-04-18 16:37:35 +02:00
Mathias
bba8b0ded5 Missing semi-colon 2023-04-18 16:03:55 +02:00
Mathias
095f5ef279 Add MAX_ERASE_SIZE const in build script, and use it in flash-wide implementation of embedded-storage traits 2023-04-18 15:49:33 +02:00
Mathias
1c68c62ebd Implement embedded-storage traits for full flash struct 2023-04-18 13:48:37 +02:00
xoviat
f5216624bb stm32/i2c: fix races when using dma. 
fixes #1341.
 2023-04-17 15:24:24 -05:00
Dario Nieuwenhuis
0dfa192992 stm32/sdmmc: remove "inner" layer. 2023-04-17 19:23:18 +02:00
Dario Nieuwenhuis
e14fa11fc3 stm32/sdmmc: remove unneeded pointer casts. 2023-04-17 17:52:02 +02:00
Dario Nieuwenhuis
df7ef1d98f stm32/sdmmc: remove cfg_if. 2023-04-17 17:52:02 +02:00
bors[bot]
6acc361109
Merge #1371 #1374 
1371: RTC r=Dirbaio a=xoviat

This adds RTC for most of the stm32 chips. Nearly all of the work was not done by me, but I took it the last bit by disabling the chips that weren't working. I think it would be easier to enable them in future PRs if requested.

1374: stm32: remove TIMX singleton when used on timer driver r=Dirbaio a=xoviat

After multiple ways of looking at this, this is the best solution I could think of.

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-04-17 01:29:05 +00:00
xoviat
27ec29e2c5 stm32/rtc: remove unused import 2023-04-16 19:32:15 -05:00
xoviat
90c1422381 stm32/rtc: remove chrono datetime and add converters 2023-04-16 19:30:42 -05:00
xoviat
9e1ddeac86 stm32: fix defective example 2023-04-16 18:32:55 -05:00
xoviat
776e001b5b stm32: remove TIMX singleton when used on timer driver 
fixes #1316.
 2023-04-16 17:47:25 -05:00
xoviat
e9ede443bc stm32/rtc: disable nonworking versions 2023-04-16 11:14:17 -05:00
xoviat
8da9c07a65 stm32/rtc: disable nonworking versions 2023-04-16 11:06:05 -05:00
xoviat
bd6bb2d248 Merge branch 'embassy-stm32/rtc' of https://github.com/MathiasKoch/embassy into rtc 2023-04-16 10:06:00 -05:00
bors[bot]
1fdce6e52a
Merge #1360 #1361 
1360: stm32/rcc: add i2s pll on some f4 micros r=Dirbaio a=xoviat

Adds the i2s pll on some f4 micros. 

1361: Executor: Replace unnecessary atomics in runqueue r=Dirbaio a=GrantM11235

Only the head pointer needs to be atomic. The `RunQueueItem` pointers are only loaded and stored, and never concurrently

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
 2023-04-15 10:38:28 +00:00
xoviat
f395ec44e8 stm32/rcc: add pllsai clock 2023-04-14 21:28:27 -05:00
Dario Nieuwenhuis
224eaaf797 stm32/sdmmc: switch to AFIT. 2023-04-15 00:58:58 +02:00
Dario Nieuwenhuis
f681b9d4e5 Remove the _todo_embedded_hal_serial impls. EH will probably not have these serial traits. 2023-04-15 00:58:58 +02:00
xoviat
650589ab3f stm32/rcc: add plli2s to Clocks and cfg directives 2023-04-14 16:30:36 -05:00
Dario Nieuwenhuis
577f060d24 Release embassy-sync v0.2.0 2023-04-13 23:40:49 +02:00
xoviat
c1d5f86871 stm32/rcc: fix warnings 2023-04-12 18:11:55 -05:00
xoviat
0289630fe4 stm32/rcc: add i2s pll on some f4 micros 2023-04-12 18:04:44 -05:00
Sebastian Goll
4863f88d02 Make Hertz constructors const 
This allows them to be used in constant values.
 2023-04-13 00:06:14 +02:00
Sebastian Goll
f3699e67b9 Fix typo in derivation of PLLP divisor 2023-04-12 02:07:31 +02:00
Dario Nieuwenhuis
9a677ab618 common/peripheral: do not require mut in PeripheralRef clone_unchecked. 2023-04-11 23:09:02 +02:00
Dario Nieuwenhuis
f5df567619 stm32/test: add C0 hil tests. 2023-04-11 14:16:32 +02:00
Dario Nieuwenhuis
1f25d2ba83
Merge pull request #1347 from embassy-rs/h5-spi 
stm32h5: add spi support, fix DMA hang, add HIL tests.
 2023-04-10 21:27:44 +02:00
Dario Nieuwenhuis
cae683cd41 stm32: update pac. 2023-04-10 21:12:48 +02:00
Glenn Dirkx
6760258ec3 fix I2C controller problems after NACK 2023-04-10 16:20:47 +02:00
Dario Nieuwenhuis
4ef8e008e8 stm32/spi: add v4/v5 support (for H5). 2023-04-10 15:25:11 +02:00
Dario Nieuwenhuis
44b7fe45e2 stm32/gpdma: fix race condition when resetting channel when done. 2023-04-10 15:11:07 +02:00
Dario Nieuwenhuis
f38899728c stm32: add h5 flavor. 2023-04-07 02:28:36 +02:00
Dario Nieuwenhuis
8469a2409c stm32/otg: add U5 support. 2023-04-07 02:28:36 +02:00
Dario Nieuwenhuis
dee1d51ad3 stm32: remove subghz feature. 
It's available only on WL. if you're using a WL, you want subghz for sure.
 2023-04-07 02:28:36 +02:00
bors[bot]
da8258b767
Merge #1330 
1330: stm32/pwm: add complementary pwm r=Dirbaio a=xoviat

This implements complementary PWM with dead time on many supported targets. The specific dead-time programming functions are passed through directly to the user, which is a bit ugly but the best compromise I could reach for now.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-04-06 21:33:17 +00:00
Dario Nieuwenhuis
be37eee13d Update embedded-hal crates. 2023-04-06 22:41:50 +02:00
bors[bot]
89279dcdc9
Merge #1333 
1333: STM32: Adc V1 r=Dirbaio a=GrantM11235

Based on #947

Co-authored-by: Matthew W. Samsonoff <matt.samsonoff@gmail.com>
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
 2023-04-06 17:16:50 +00:00
Dario Nieuwenhuis
611d023829 stm32: add H5 support. 2023-04-06 18:59:37 +02:00
Dario Nieuwenhuis
9f28d80977 stm32/usb: add support for 32bit usbram. 2023-04-06 18:59:37 +02:00
Eric Yanush
8d7abeb06f Round out the async fns for can 2023-04-06 08:21:44 -06:00
Eric Yanush
9876571887 Strip out debug messages... oops 2023-04-06 08:21:44 -06:00
Eric Yanush
289762c0ef Add initial setup of async can for STM32 2023-04-06 08:21:44 -06:00
xoviat
9f1dac3f5d stm32/pwm: add complementary pwm example 2023-04-05 18:07:07 -05:00
xoviat
7677268319 stm32/pwm: cleanup and fix complementary pwm 2023-04-05 17:50:23 -05:00
Grant Miller
0ef419bee4 Change ADC1 to ADC 2023-04-05 16:52:32 -05:00
Grant Miller
92e96bd601 Fix typo 2023-04-05 16:38:06 -05:00
Grant Miller
20e7b5e296 InternalChannel 2023-04-05 16:11:21 -05:00
Grant Miller
37d8f2e512 Properly enable and reset adc 2023-04-05 15:28:42 -05:00
Grant Miller
f588105429 wip 2023-04-05 15:01:31 -05:00
Matthew W. Samsonoff
511a951246 Differentiate between read and read_internal for STM32F0 ADC 
The internal channels (vbat, vref, and temperature) are not real pins and do
not have the `set_as_analog` method. They must be read using the
`read_internal` method.
 2023-04-05 14:34:24 -05:00
Matthew W. Samsonoff
a0b6096610 Put ADC input pin into analog mode 2023-04-05 14:34:24 -05:00
Matthew W. Samsonoff
5d9ae3dbdb Add implementation of STM32 v1 ADC 2023-04-05 14:34:24 -05:00
Rasmus Melchior Jacobsen
95b31cf2db Remove Drop on Flash and FlashLayout and propage lifetime to region types 
This allows the user to "split" the FlashRegions struct into each region
 2023-04-05 10:27:13 +02:00
xoviat
991b22b6a1 stm32/pwm: add complementary pwm 2023-04-04 19:35:25 -05:00
Rasmus Melchior Jacobsen
3deb65bc87 Merge branch 'master' into flash-regions 2023-04-04 23:16:01 +02:00
bors[bot]
143105eeb6
Merge #1313 
1313: (embassy-stm32): rework bufferedUart to get rid of PeripheralMutex r=Dirbaio a=MathiasKoch

New implementation is very similar to the implementation of embassy-nrf & embassy-rp. 

Also adds embedded-hal traits to bufferedUart.

**NB**: Still needs testing on actual hardware

Co-authored-by: Mathias <mk@blackbird.online>
 2023-04-04 15:14:07 +00:00
Mathieu Dupont
1349dabe1a add compilation time exclusion for stm32f410 2023-04-03 17:55:05 +02:00
Mathieu Dupont
4ce1c5f27d Add MCO support for L4 and F4 families 2023-04-03 16:41:25 +02:00
Rasmus Melchior Jacobsen
bfebf7a436 Fix formatting of sector erase log 2023-04-03 08:02:43 +02:00
Dario Nieuwenhuis
94890e544e Update stm32-metapac. 2023-04-03 02:01:06 +02:00
Rasmus Melchior Jacobsen
dd88775871 Ensure that flash locking is defered to after write 2023-04-01 18:10:20 +02:00
Rasmus Melchior Jacobsen
e11eebfa57 Ensure that ranges are validated with the region size 2023-04-01 17:26:32 +02:00
Rasmus Melchior Jacobsen
268e29b153 Let the FlashRegion for region types be public 2023-04-01 16:59:21 +02:00
Mathias
472dc6b7d1 Fix interrupt handling so it is similar to before the rework, and fix examples 2023-03-31 15:57:35 +02:00
Rasmus Melchior Jacobsen
50b0fb1a37 Let get_flash_regions be public 2023-03-31 15:47:45 +02:00
Mathias
cfbe93c280 Rework bufferedUart to get rid of PeripheralMutex in a similar fashion as nrf & rp. Also adds embedded-hal traits to bufferedUart 2023-03-31 10:43:30 +02:00
Rasmus Melchior Jacobsen
f3dcb5eb22 Wrap write/erase operations in cs 2023-03-30 15:13:44 +02:00
Rasmus Melchior Jacobsen
a78e10e003 Add defmt support to new flash types 2023-03-30 09:17:14 +02:00
Rasmus Melchior Jacobsen
02caec9482 Skip unknown banks 2023-03-30 09:07:23 +02:00
Rasmus Melchior Jacobsen
760d4a72cb Ensure that embedded_storage traits are actually implemented 2023-03-30 09:05:13 +02:00
Rasmus Melchior Jacobsen
e7129371d0 Let sector computation be shared across families 2023-03-30 08:32:36 +02:00
Rasmus Melchior Jacobsen
e3c4e00be0 Align families 2023-03-30 06:01:56 +02:00
Rasmus Melchior Jacobsen
91d8afd371 Add AltFlashLayout for supported F4 chips 2023-03-30 05:27:57 +02:00
Rasmus Melchior Jacobsen
89129babf9 Merge remote-tracking branch 'upstream/master' into flash-regions 2023-03-30 04:53:07 +02:00
Rasmus Melchior Jacobsen
def576ac46 Remove FlashRegion trait and rename Settings to FlashRegion 2023-03-30 04:24:41 +02:00
Rasmus Melchior Jacobsen
ef1890e911 Remove flash operations from FlashRegion trait and move to common module 2023-03-29 15:45:18 +02:00
bors[bot]
754bb802ba
Merge #1294 
1294: Add support for `QSPI` in `stm32` r=Dirbaio a=Mirror0

Implemented with help of Tomasz Grześ <tomasz.grzes@gmail.com>.

Tested only on stm32f777zi.

Co-authored-by: Mateusz Butkiewicz <mateusz@github.butkiewicz.dev>
 2023-03-29 13:42:29 +00:00
Rasmus Melchior Jacobsen
68c260edeb Use stm32-metapac v2 2023-03-29 15:03:48 +02:00
Rasmus Melchior Jacobsen
fc8c83e00a Fix h7 compile error 2023-03-29 14:50:19 +02:00
Mateusz Butkiewicz
87898501a2 feat(stm32:qspi): convert some u8 to enum variants 2023-03-29 14:28:25 +02:00
Rasmus Melchior Jacobsen
a0d089536a Merge branch 'flash-regions' of https://github.com/rmja/embassy into flash-regions 2023-03-29 14:10:33 +02:00
Rasmus Melchior Jacobsen
15e1747220 Fix build of not implemented family 2023-03-29 14:10:16 +02:00
Rasmus Melchior Jacobsen
0bbc3a3d81
Merge branch 'master' into flash-regions 2023-03-29 13:59:17 +02:00
Rasmus Melchior Jacobsen
5a12fd6c75 Add unimplemented family section 2023-03-29 13:57:33 +02:00
Rasmus Melchior Jacobsen
b7dfc8de10 Let flash module be conditionally included 2023-03-29 13:52:52 +02:00
Rasmus Melchior Jacobsen
ddbd509865 Move as much logic from families to shared module as possible 2023-03-29 13:37:45 +02:00
Rasmus Melchior Jacobsen
69944675a3 Expose get_sector in favor of is_eraseable_range 2023-03-29 12:49:13 +02:00
Rasmus Melchior Jacobsen
4ee3d15519 Keep peripheral lifetime when calling into_regions() 2023-03-29 12:10:24 +02:00
Rasmus Melchior Jacobsen
6806bb9692 Expose flash region settings as an array 2023-03-29 11:52:18 +02:00
Rasmus Melchior Jacobsen
d6ce1c4325 Support running tests in embassy-stm32 and move impl from common back to stm32 2023-03-29 11:31:45 +02:00
bors[bot]
7a841b58d1
Merge #1307 
1307: (embassy-stm32): add embedded-io blocking Read + Write for BufferedUart r=MathiasKoch a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
 2023-03-28 12:35:07 +00:00
Mathias
14f6bc88ea Remove unnecessary lifetime 2023-03-28 14:34:36 +02:00
Mathias
2d7f35cf57 Add embedded-io blocking Read + Write for BufferedUart 2023-03-28 14:28:44 +02:00
Mateusz Butkiewicz
6a802c4708 feat(stm32:qspi): add support for QSPI in stm32 
Implemented with help of Tomasz Grześ <tomasz.grzes@gmail.com>.
 2023-03-27 13:20:00 +02:00
Dario Nieuwenhuis
a33774ec51 Update stm32-metapac 2023-03-27 12:36:31 +02:00
Rasmus Melchior Jacobsen
e9a5b31fa8 Implement drop for FlashRegions 2023-03-25 17:00:52 +01:00
Rasmus Melchior Jacobsen
e8fc7a66a3 Ensure flash module and FlashRegion trait is always defined 2023-03-25 16:32:32 +01:00
Rasmus Melchior Jacobsen
bc69eb596e Add is_eraseable_range and split write into consecutive parts 2023-03-25 16:04:45 +01:00
Rasmus Melchior Jacobsen
73ccc04231 Change region type name 2023-03-25 13:47:28 +01:00
Rasmus Melchior Jacobsen
47d5f127bb Align L family 2023-03-25 13:30:24 +01:00
Rasmus Melchior Jacobsen
47e07584ca Align H7 family 2023-03-25 13:03:00 +01:00
Rasmus Melchior Jacobsen
c848bd9c9c Align with removal of MemoryRegionKind::Otp 2023-03-25 13:02:42 +01:00
Rasmus Melchior Jacobsen
a8567f0617 Align F7 family 2023-03-25 06:26:00 +01:00
Rasmus Melchior Jacobsen
7edd72f8f5 Align F3 family 2023-03-25 06:07:57 +01:00
Rasmus Melchior Jacobsen
6c73b23f38 Align F4 family 2023-03-25 05:59:40 +01:00
Rasmus Melchior Jacobsen
6b44027eab Add FlashRegion trait and implement embedded_storage traits for each region 2023-03-25 05:58:40 +01:00
Rasmus Melchior Jacobsen
cccceb88f2 Generate flash regions during build 2023-03-25 05:57:15 +01:00
Dario Nieuwenhuis
0b49b588a2 stm32: use stm32-metapac from crates.io, remove stm32-data submodule. 2023-03-20 02:38:12 +01:00
Eric Yanush
13f0c64a8c Fix APB clock calculation for several STM32 families 2023-03-16 21:21:39 -06:00
Dario Nieuwenhuis
43462947ed stm32: remove unused embedded-storage-async. 2023-03-14 17:27:40 +01:00
Davide Della Giustina
c0e40b887b
Apply fix 2023-03-01 20:57:13 +00:00
Dario Nieuwenhuis
351e4407ef
Merge pull request #1252 from pattop/stm32_spi_fifo_fix 
stm32/spi: fix occasional data corruption
 2023-03-01 03:08:05 +01:00
Patrick Oppenlander
aabc275186 stm32/spi: fix occasional data corruption 
Need to clear the rx fifo before enabling rx dma.
 2023-03-01 12:24:22 +11:00
Davide Della Giustina
3c601bf8d2
PacketQueue::init() does not need to be unsafe 2023-02-28 18:04:43 +00:00
Davide Della Giustina
485bb76e46
Implemented suggestions from @Dirbaio 2023-02-28 17:39:02 +00:00
Davide Della Giustina
c1e93c0904
PacketQueue::new() uses ::init() when in nightly 2023-02-28 14:34:26 +00:00
Davide Della Giustina
90f2939bf6
Added PacketQueue::init() 2023-02-28 14:22:54 +00:00
Grant Miller
7be4337de9 Add #[must_use] to all futures 2023-02-24 13:01:41 -06:00
bors[bot]
3255e0a172
Merge #1228 
1228: stm32/sdmmc: Implement proper clock configuration r=chemicstry a=chemicstry

This implements proper clock configuration for sdmmc based on chip family, because `RccPeripheral::frequency()` is almost always incorrect. This can't be fixed in PAC, because sdmmc uses two clock domains, one for memory bus and one for sd card. `RccPeripheral::frequency()` usually returns the memory bus clock, but SDIO clock calculations need sd card domain clock. Moreover, chips have multiple clock source selection bits, which makes this even more complicated. I'm not sure if it's worth implementing all this logic in `RccPeripheral::frequency()` instead of cfg's in sdmmc.

Some chips (Lx, U5, H7) require RCC updates to expose required clocks. I didn't want to mash everything in a single PR so left a TODO comment. I also left a `T::frequency()` fallback, which seemed to work in H7 case even though the clock is most certainly incorrect.

In addition, added support for clock divider bypass for sdmmc_v1, which allows reaching a maximum clock of 48 MHz. The peripheral theoretically supports up to 50 MHz, but for that ST recommends setting pll48 frequency to 50 MHz 🤔

Co-authored-by: chemicstry <chemicstry@gmail.com>
 2023-02-23 16:22:31 +00:00
chemicstry
73ef85b765 stm32/sdmmc: Fix compile errors 2023-02-23 18:00:55 +02:00
bors[bot]
f0f92909c1
Merge #1227 
1227: stm32/dma: fix spurious transfer complete interrupts r=Dirbaio a=pattop

DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
 2023-02-23 15:44:43 +00:00
chemicstry
896764bb85 stm32/sdmmc: Refactor TypeId into a macro 2023-02-23 17:38:52 +02:00
chemicstry
42462681bd stm32/sdmmc: Implement proper clock configuration 2023-02-23 16:57:21 +02:00