Commit Graph

385 Commits

Author SHA1 Message Date
7256ff3e71 Provides AsyncWrite with flush
As per Tokio and others, this commit provides a `poll_flush` method on `AsyncWrite` so that a best-effort attempt at wakening once all bytes are flushed can be made.
2021-12-10 12:16:08 +11:00
484c356c03 Add DCMI example. 2021-12-09 12:56:39 +01:00
d6f3b479df Use smoltcp revision from its master branch. 2021-12-09 12:15:32 +01:00
9d62e886fb Do not use exported Result to mitigate problems with clap. 2021-12-08 22:19:13 +01:00
00a87b9a41 Fix build examples with defmt. 2021-12-06 21:58:57 +01:00
a802fd83aa Fix embassy-net documentation of running examples. 2021-12-06 14:59:15 +01:00
9a730ef692 Refactor sx127x radio to use async SPI with DMA 2021-12-03 09:53:28 +01:00
b9693c0b91 Update rust-lorawan to version supporting defmt 0.3 2021-12-02 19:10:29 +01:00
469852c667 Removed unsafe from uarte
The constructors themselves are not strictly unsafe. Interactions with DMA can be generally unsafe if a future is dropped, but that's a separate issue. It is important that we use the `unsafe` keyword diligently as it can lead to confusion otherwise.
2021-12-01 09:14:24 +11:00
3332c40705 examples: remove unused deps. 2021-11-29 02:07:48 +01:00
e40555e245 examples/stm32g4: add pwm example 2021-11-27 03:06:46 +01:00
88d4b0c00d stm32: add stm32g4 support. 2021-11-27 02:34:23 +01:00
c7d9729028 Merge #486
486: Pwm ppi events r=Dirbaio a=jacobrosenthal

More PWM yak shaving. I was going to do some safe pwm ppi events stuff but I just dont think it fits this api design.. ppi is just very low level, im not sure how safe it will be in general

* first we should probably have borrows of handlers for ppi with lifetime of the peripheral?  hal does eb4ba6ae42/nrf-hal-common/src/pwm.rs (L714-L716)
* in general having access to tasks can put the state in some configuration the api doesnt understand anymore. for `SequencePwm` ideally id hand you back either only seq_start0 or seq_start1 because youd only use one based on if your `Times` is even or odd.. but again we only know that with this api AFTER start has been called. I dont think were ready for typestates

SO I figured why not add the pwm ppi events but make them unsafe and commit this example since I started it.

Somewhat related drop IS removing the last duty cycle from the pin correctly, but stop DOES NOT..the only thing that sets the pin back is pin.conf() as far as I can tell, so I tried to document that better and got rid of stop for the `SimplePwm` again since that doesnt need it then. However its ackward we dont have a way to unset the pwm without setting a new sequence of 0s, or dropping the peripheral


Co-authored-by: Jacob Rosenthal <jacobrosenthal@gmail.com>
2021-11-26 23:08:24 +00:00
c257893da9 net: update smoltcp 2021-11-26 04:12:14 +01:00
e4de15e4de net: don't depend directly on smoltcp outside embassy-net 2021-11-24 17:48:48 +01:00
8fea6c94f6 Merge #501
501: stm32-metapac cleanups r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-11-24 01:00:22 +00:00
dfb6d407a1 stm32: rename core features from _cmX to -cmX, cleanup gen. 2021-11-23 23:49:06 +01:00
0ca6060bfd Fix interrupt_take macro by specifying path to panic macro. 2021-11-23 11:00:37 +01:00
2649984b55 Adjust the config.toml for U5.
- Correct ISA
- Remove commented-out cruft.
2021-11-17 10:35:25 -05:00
9b17b3d721 Remove unused deps 2021-11-15 20:13:22 +01:00
436eb81fc2 Adjust for bxcan API. 2021-11-15 12:00:26 -05:00
57ca241658 Further cargo muckings for smol/defmt. 2021-11-15 11:40:06 -05:00
23fdca9e52 Remove extraneous defmt-trace feature. 2021-11-15 11:33:44 -05:00
a770fc77c9 Adjust all examples to defmt 0.3. 2021-11-15 11:19:19 -05:00
c2da498263 Update to defmt 3.0ish.
Lots of gitrevs deps.
2021-11-15 11:09:08 -05:00
2bcacd4f16 nrf: sequencepwm add events 2021-11-13 16:24:41 -07:00
aca7b86c7e pwm_sequence show implicit and explicit stop functionality 2021-11-11 23:47:35 -07:00
b4cb24c735 pwm_servo example comment for clarity 2021-11-11 23:32:34 -07:00
67baec472d nrf: dump the pwm_sequence example for clarity
It is basically impossible to directly convert that example to a sequence for various reasons. You cant have multiple channels on same buffer with one sequence instance for starters, also at that clock rate and max_duty 1 period is far longer than the 3ms it was using, which would require using a new max_duty and thus require regenerating the sine table which makes it not representitive of the original example anymore
2021-11-11 23:31:10 -07:00
937f49dead nrf: sequencepwm rename top to max_duty for consistancy 2021-11-11 22:47:57 -07:00
ea1c62ff61 fix 2021-11-11 20:12:50 -07:00
639034cee4 fix 2021-11-11 19:58:45 -07:00
ec66fcd01a pwm_sequence consume buffer 2021-11-11 19:14:29 -07:00
4112759a8f Merge #455
455: simple_playback api from nrf sdk r=Dirbaio a=jacobrosenthal

Port of the nrf_drv_pwm_simple_playback call from the nordic sdk that allows you to set up a sequence to play across leds with no interaction necessary using the 'shorts' registers to trigger looping sequences



Co-authored-by: Jacob Rosenthal <jacobrosenthal@gmail.com>
2021-11-11 16:26:36 +00:00
8193885cb5 Merge #482
482: Add MCO peripheral. r=Dirbaio a=matoushybl

This PR adds an abstraction over STM32 RCC feature called MCO (Microcontroller Clock Output). The clock output can bind to several clock sources and then can be scaled using a prescaler.

Given that from the embassy ecosystem the RCC is generaly invisible to the user, the MCO was implemented as a separate peripheral bound to the pin where the clock should appear.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2021-11-11 16:20:02 +00:00
c14642cffc Add MCO peripheral. 2021-11-11 11:34:09 +01:00
2973ff4cf0 remove unstable feature and dependency, and make pwm_sequence a near mirror of pwm example 2021-11-10 18:49:24 -07:00
96e2f0dfc5 Merge #468
468: Add v1c ethernet driver for the STM32F7 family. r=Dirbaio a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2021-11-10 22:07:38 +00:00
751617c2be fix examples for mut self set_duty 2021-11-10 12:48:15 -07:00
f0ba79059e Add v1c ethernet driver for the STM32F7 family. 2021-11-10 10:16:46 +01:00
5f124ec49f Update U5 to init RCC. 2021-11-08 14:20:51 -05:00
2221e1fa93 Replace rustflags with build.rs extra-link-args.
Rustflags apply to ALL the crates in the graph, while we only need
them for the toplevel crate which is the only one getting linked.

Rustflags are not equal for all crates, this caused cargo to re-build the
same dependency crate multiple times uselessly. After this change, deps
are reused more, making builds faster.

Note that this only applies when sharing the target/ dir for multiple crates
in the repo which is not the default.
2021-11-07 23:52:11 +01:00
9b5d9fbfca Fix v2 ethernet pin definitions. Fix ethernet example for H7 nucleos. 2021-11-04 16:25:30 +01:00
b726ef1886 make SequenceConfig struct is consistent with other Config structs, that are always non_exhaustive and have a Default 2021-11-03 18:37:54 -07:00
d961fd1015 rename to SimplePwm and SequencePwm 2021-11-03 18:25:44 -07:00
44375b427c restore example and add set_time_stretch api 2021-11-03 15:29:09 -07:00
1bf6e646c9 Merge #465
465: Adjust for STM32U5. r=lulf a=bobmcwhirter



Co-authored-by: Bob McWhirter <bmcwhirt@redhat.com>
2021-11-02 20:42:41 +00:00
f9c266bc10 Omg. More formatting. 2021-11-02 16:06:49 -04:00
16c88e3094 Need to include a bit of embassy for the NVIC. 2021-11-02 15:58:40 -04:00
9deafa8bab Remove unused imports. 2021-11-02 15:56:04 -04:00