Côme ALLART
f051f57d55
build(gen-features): remove unused toml dependency
2021-09-11 20:14:32 +02:00
Côme ALLART
99ccf18160
fix(gen-features): keep data files order
2021-09-11 20:04:57 +02:00
Côme ALLART
addee8778d
refactor(gen-features): use Rust instead of Python
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Added support for /stm32-metapac
2021-09-05 20:19:13 +02:00
Côme ALLART
022b809248
refactor(gen_features): use Rust instead of Python
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Done for /embassy-stm32 only
The new generator is in /stm32-gen-features
/stm32-metapac could/should be added too
A CI check "generated features up to date" could/should be performed
2021-08-27 11:09:27 +02:00
Dario Nieuwenhuis
1e1cd0506a
Merge pull request #368 from embassy-rs/nrf-features
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nrf: make gpiote and time-driver optional via cargo features.
2021-08-20 15:49:38 +02:00
Dario Nieuwenhuis
3457bb9f05
nrf: make gpiote and time-driver optional via cargo features.
2021-08-20 15:42:42 +02:00
Dario Nieuwenhuis
de2039fd1d
net: fix build with medium-ip
2021-08-20 15:06:06 +02:00
Dario Nieuwenhuis
17659e2e44
nrf/wdt: add handle steal
2021-08-20 14:23:24 +02:00
Dario Nieuwenhuis
0be6e4a384
Merge pull request #333 from bgamari/stm32g0
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Add support for STM32G0
2021-08-20 01:35:02 +02:00
Dario Nieuwenhuis
da707051b0
stm32: add G0 to Ci
2021-08-20 01:29:37 +02:00
Ben Gamari
ee841499ee
Add STM32G0 examples
2021-08-20 01:28:50 +02:00
Ben Gamari
e2f71ffbbd
Add support for STM32G0
2021-08-20 00:15:11 +02:00
Dario Nieuwenhuis
8e5f1f4b5e
Merge pull request #367 from embassy-rs/metapac-cleanup
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stm32-metapac cleanups
2021-08-20 00:05:08 +02:00
Dario Nieuwenhuis
174c51f097
stm32/metapac: check GPIO RCC regs are always found.
2021-08-19 23:59:50 +02:00
Dario Nieuwenhuis
2c992f7010
stm32: move dbgmcu stuff to toplevel config setting, defaulting to true.
2021-08-19 23:50:19 +02:00
Dario Nieuwenhuis
446d6c275c
stm32: remove last use of python at build time
2021-08-19 23:42:18 +02:00
Dario Nieuwenhuis
9f51f9a170
stm32/wl: add stub APB3 to get it to build.
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Completely untested.
2021-08-19 22:51:41 +02:00
Dario Nieuwenhuis
637fcdd316
stm32/rcc: update for new version naming
2021-08-19 22:17:45 +02:00
Dario Nieuwenhuis
ec51880e28
stm32/exti: unify all versions into single impl
2021-08-19 22:17:17 +02:00
Dario Nieuwenhuis
dd62790f36
stm32-metapac: assume RCC is always present
2021-08-19 22:16:27 +02:00
Dario Nieuwenhuis
f3de443ee7
Bump stm32-data
2021-08-19 22:16:05 +02:00
Dario Nieuwenhuis
3dd1253b06
stm32-metapac: ignore gen'd out dir
2021-08-19 17:44:29 +02:00
Dario Nieuwenhuis
39baff8775
Merge pull request #366 from embassy-rs/nrf-cmrt07
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Update more examples to cortex-m-rt 0.7
2021-08-19 17:19:13 +02:00
Dario Nieuwenhuis
daab542fc4
wl55: update to cortex-m-rt 0.7
2021-08-19 17:11:38 +02:00
Dario Nieuwenhuis
fe355af4f0
nrf: update to cortex-m-rt 0.7
2021-08-19 17:11:17 +02:00
Dario Nieuwenhuis
a665b83a19
Merge pull request #365 from embassy-rs/cmrt07
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Update cortex-m-rt to v0.7 for stm32, rp.
2021-08-19 01:05:35 +02:00
Dario Nieuwenhuis
d3aeb45fb3
Update cortex-m-rt to v0.7 for stm32, rp.
2021-08-19 00:56:11 +02:00
Dario Nieuwenhuis
c0fb534a00
Merge pull request #364 from embassy-rs/nrf-time-irq-prio
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nrf/time: allow configuring the rtc irq prio
2021-08-18 22:17:46 +02:00
Dario Nieuwenhuis
066abfe4c6
nrf/time: allow configuring the rtc irq prio
2021-08-18 22:13:02 +02:00
Dario Nieuwenhuis
2b5d1c068f
Merge pull request #352 from timokroeger/can
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CAN support with bxcan crate
2021-08-18 22:04:56 +02:00
Timo Kröger
f141b98741
bxcan: Cleanup
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Older families like F1 and F4 have a consistent naming for the CAN
peripherals: CAN when there is only one instance, CAN1/CAN2/CAN2 if
there are multiple instances.
Newer families like L4 and F7 use the name CAN1 even if there is only
one instance. The number of filter banks is incorrect for those.
Affected chips:
* STM32F722
* STM32F723
* STM32F730
* STM32F732
* STM32F733
* STM32L4P5
* STM32L4Q5
* STM32L4R5
* STM32L4R7
* STM32L4R9
* STM32L4S5
* STM32L4S7
* STM32L4S9
* STM32L431
* STM32L432
* STM32L433
* STM32L442
* STM32L443
* STM32L451
* STM32L452
* STM32L462
* STM32L471
* STM32L475
* STM32L476
* STM32L485
* STM32L486
2021-08-18 21:58:50 +02:00
Timo Kröger
0c3bede64f
bxcan: Make bxcan
a hard dependency
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There seems no way to enable a optional dependency from build.rs or
features passed through the command line.
2021-08-18 21:58:50 +02:00
Timo Kröger
dacf75d911
bxcan: Fix the flaky CAN example
2021-08-18 21:58:50 +02:00
Timo Kröger
191a589820
bxcan: namechange "bxcan_v1" -> "can_bxcan"
2021-08-18 21:58:50 +02:00
Timo Kröger
dc6b7f3cba
bxcan: Disable on drop
2021-08-18 21:58:50 +02:00
Timo Kröger
7c405250a7
CAN support with bxcan crate
2021-08-18 21:58:50 +02:00
Dario Nieuwenhuis
0fee2b9509
Merge pull request #363 from embassy-rs/update-nightly
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Update nightly
2021-08-18 21:56:20 +02:00
Dario Nieuwenhuis
e66922f333
Update nightly
2021-08-18 21:51:22 +02:00
Dario Nieuwenhuis
f907504eb6
Merge pull request #362 from bobmcwhirter/h7-metapac-example
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Remove metapac from the Cargo.toml for h7.
2021-08-18 17:55:43 +02:00
Bob McWhirter
5fab514f02
Remove metapac from the Cargo.toml for h7.
2021-08-18 11:44:09 -04:00
Ulf Lilleengen
919cdfe8c4
Add STM32WL55 examples to CI ( #361 )
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* Add STM32WL55 examples to CI and fix warnings
2021-08-18 09:35:08 +02:00
Bob McWhirter
5c5cb1a8ce
Merge pull request #360 from bobmcwhirter/xtask
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First shot at xtask support.
2021-08-17 15:43:17 -04:00
Bob McWhirter
61e6b52870
xtask runner for CI types of things and other utilities.
2021-08-17 15:23:08 -04:00
Dario Nieuwenhuis
bc57d6839f
Merge pull request #359 from lulf/stm32wl55
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Add example for STM32WL55
2021-08-17 17:58:36 +02:00
Ulf Lilleengen
4df63f5379
Add per-core EXTI support
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* Generate a core index put into the PAC for the peripherals to use as
index into registers.
* Add EXTI v2 which uses CORE_INDEX to index exti registers
2021-08-17 16:22:47 +02:00
Ulf Lilleengen
61409e2fb6
Add example for STM32WL55
2021-08-17 16:22:47 +02:00
Dario Nieuwenhuis
4b74e8fc50
Merge pull request #357 from bobmcwhirter/h7_exti
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Add H7 exti button example using correct EXTI reg block offsets.
2021-08-16 21:30:28 +02:00
Bob McWhirter
a93ed2bed6
Add H7 exti button example using correct EXTI reg block offsets.
2021-08-16 15:15:07 -04:00
Ulf Lilleengen
cbff0398bb
Add IRQ-driven buffered USART implementation for STM32 v2 usart ( #356 )
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* Add IRQ-driven buffered USART implementation for STM32 v2 usart
* Implementation based on nRF UARTE, but simplified to not use DMA to
avoid complex interaction between DMA and USART.
* Implementation of AsyncBufRead and AsyncWrite traits
* Some unit tests to ring buffer
* Update polyfill version
* Update sub module to get usart IRQ fix
2021-08-16 17:16:49 +02:00
Dario Nieuwenhuis
c310f18aaf
Merge pull request #355 from thalesfragoso/dma-fences
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stm32: Add fences to DMA code
2021-08-11 13:28:57 +02:00