Commit Graph

6020 Commits

Author SHA1 Message Date
48afef28a0 Strengthen the borrow
The start method is now safe. Because it has the potential of borrowing the sequence and mutating itself, the sequence must outlive the Pwm struct.
2022-01-24 17:22:35 +11:00
917b0ea9b1 Merge #587
587: Update stm32-data r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-24 01:28:16 +00:00
c2eb6d6ddf Update stm32-data 2022-01-24 02:19:10 +01:00
982f5a9a19 Merge #586
586: stm32: add `time-driver-any` cargo feature that automatically picks one. r=Dirbaio a=Dirbaio

Most of the time you don't care which one gets used, so this is easier! :) 

It also helps for building docs for all chips, it reduces the feature changes needed.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-24 00:17:50 +00:00
6bf935402f stm32/ci: add stm32f410tb, time-driver-any 2022-01-24 01:07:49 +01:00
a8580ec78a stm32/rcc: fix stm32f410 2022-01-24 00:50:35 +01:00
533ceb707c stm32: add tim4, tim5 support for time-driver (stm32f410 doesn't have tim2, tim3) 2022-01-24 00:50:10 +01:00
79f60adbfb stm32: add time-driver-any cargo feature that automatically picks one available timer. 2022-01-24 00:24:53 +01:00
7598b8a40f Permit many sequences to be passed
Sequences are now passed in via the start method to avoid having to stop the PWM and restart it. Sequences continue to be constrained with the same lifetime of the Pwm object itself. The pwm_sequence example has been extended to illustrate multiple sequences being passed around.
2022-01-23 16:29:52 +11:00
6b0cb0609b Merge #581
581: stm32: expose all functionality as inherent methods. r=Dirbaio a=Dirbaio

This is the previous step to implementing both the embedded-hal 0.2 and embedded-hal 1.0 + embedded-hal-async traits.

The equivalent in nrf was done in #552 

- Removes need for `unwrap` in gpio.
- Removes need for `use embedded_hal::whatever` in all cases.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-19 20:47:07 +00:00
889d757ab8 stm32/spi: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
3d27a0e7cb stm32/dma: make lowlevel api take ptrs instead of slices. 2022-01-19 17:59:55 +01:00
97ab859f00 stm32/i2c: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
c949519714 stm32/usart: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
98f24bf819 examples/stm32l0: cleanup 2022-01-19 17:59:55 +01:00
ade44e91c4 stm32/exti: add wait_for_high, wait_for_low. 2022-01-19 17:59:55 +01:00
b526addf7b stm32/exti: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
58fc64722c stm32/gpio: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
52e156b429 stm32: use critical_section instead of cortex_m::interrupt 2022-01-19 17:59:55 +01:00
ecda57dff1 stm32: remove unused .pep8 file 2022-01-19 17:59:55 +01:00
071b034a5d Merge #582
582: Make advanced timer trait not require general purpose timer trait as … r=Dirbaio a=matoushybl

…the timers are too different.

When developing pwm driver, I originally used T: GeneralPurpose16bitTimer as it could support both GP timers and advanced timer, but advanced timer requires further modifications in registers accessible only in it (BDTR - bit AOE).

This PR makes advanced timers depend on Basic16bitTimer instead, which should hopefully improve type safety and allow for better timer drivers that can distinguish between advanced timers and general purpose ones.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-01-19 16:45:56 +00:00
8fb11bcd9b Merge #583
583: misc nrf fixes r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-19 16:32:30 +00:00
b640c72092 nrf: return ptr in slice_ptr_parts 2022-01-19 17:31:32 +01:00
a607cf6142 nrf: build with unstable-traits in ci 2022-01-19 17:31:24 +01:00
4988dfe981 Make advanced timer trait not require general purpose timer trait as the timers are too different. 2022-01-18 11:18:54 +01:00
ddf8c99a93 Merge #579
579: embassy-stm32: L1 family RCC fixes r=Dirbaio a=unrelentingtech



Co-authored-by: Greg V <greg@unrelenting.technology>
2022-01-14 20:07:25 +00:00
9fb2b5fa86 examples/stm32l1: remove memory.x, use the crate-provided one 2022-01-14 22:59:57 +03:00
9fcc207629 stm32l1/rcc: fix clock frequency assertion
It was comparing a number in Hz (!) to "32" (MHz).
embassy-stm32's units don't work like those used by stm32-hal :/
2022-01-14 22:59:57 +03:00
456b56d4fd stm32l1/rcc: set required flash bits for high frequencies
As is done for lots of other families
2022-01-14 22:59:57 +03:00
2310003f39 Merge #552
552: embassy-nrf: migrate to embedded-hal 1.0, embedded-hal-async r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-14 18:39:27 +00:00
8f81a6548f Merge #574
574: Add the possibility to reconfigure Spi mode and bit order configurati… r=matoushybl a=matoushybl

…on on the fly.

I have not tested these changes. I am also not sure if the peripheral should be disabled when changing these settings. What do you think `@Dirbaio` ?

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-01-14 12:07:57 +00:00
516ad6d8fd Merge #578
578: Fix typo in defuse doc comment r=Dirbaio a=danbev



Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2022-01-14 11:53:59 +00:00
bc0af38599 Update stm32-data. 2022-01-14 12:50:58 +01:00
66e46d8012 Add the possibility to reconfigure Spi mode and bit order configuration on the fly. 2022-01-14 12:50:58 +01:00
cdb4f70646 Fix typo in defuse doc comment 2022-01-14 12:49:37 +01:00
7997687f3b nrf: impl embedded-hal 1.0 and embedded-hal-async traits. 2022-01-13 23:56:39 +01:00
6eec3d8acc nrf/rng: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
df00c83984 nrf/qspi: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
3e503e7335 nrf/uarte: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
c432d036c7 nrf/gpiote: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
3ca01cba8d nrf/gpio: Rename FlexPin to Flex.
FlexPin sounds like it's an owned pin singleton, like AnyPin or NoPin.
2022-01-13 23:56:39 +01:00
ecb4f8fb00 nrf/twim: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
a287fef687 nrf/spim: expose all functionality as inherent methods. 2022-01-13 23:56:39 +01:00
7086642ce4 nrf/spim: share code between blocking+async. 2022-01-13 19:53:12 +01:00
167af01211 stm32-metapac: remove stm32gbk 2022-01-13 18:22:29 +01:00
f3b999c8b5 Merge #577
577: embassy/util: Add yield_now() r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-13 16:44:33 +00:00
d07f6828ef Merge #508
508: STM32 timers + pwm improvements r=matoushybl a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-01-13 16:09:20 +00:00
e056bedd55 Port the PWM example to H7, add low-level API example implementing 32-bit PWM. 2022-01-13 16:53:55 +01:00
e07df92651 Make RCC accessible using low-level API. 2022-01-13 16:12:45 +01:00
16d09f074a Add simple PWM, add PWM pin definitions also accessible from low-level API. 2022-01-13 16:05:54 +01:00