Commit Graph

5861 Commits

Author SHA1 Message Date
15cc97d794 usb: associate ControlHandlers with interfaces, automatically route requests. 2022-04-06 05:38:11 +02:00
3412e5dc4a usb: cleanup giant matches in control code. 2022-04-06 05:38:11 +02:00
a2f5763a67 usb: add add_class to builder, so that FooBarClass::new(&mut builder) can set up everything. 2022-04-06 05:38:11 +02:00
a062baae38 nrf/usb: fix wrong DMA read size 2022-04-06 05:38:11 +02:00
52c622b1cd Use trait objects instead of generics for UsbDevice::classes 2022-04-06 05:38:11 +02:00
bdc6e0481c Add support for USB classes handling control requests. 2022-04-06 05:38:11 +02:00
5c0db627fe nrf/usb: update where clause syntax. 2022-04-06 05:38:11 +02:00
9a6d11281d Add some comments on the example. 2022-04-06 05:38:11 +02:00
0320500f0f Working CDC-ACM device->host 2022-04-06 05:38:11 +02:00
77ceced036 Working CDC-ACM host->device 2022-04-06 05:38:11 +02:00
37598a5b37 wip: experimental async usb stack 2022-04-06 05:38:11 +02:00
c1b3822964 Merge #695
695: Simplify Channel. r=Dirbaio a=Dirbaio

- Allow initializing in a static, without Forever.
- Remove ability to close, since in embedded enviromnents channels usually live forever and don't get closed.
- Remove MPSC restriction, it's MPMC now. Rename "mpsc" to "channel".
- `Sender` and `Receiver` are still available if you want to enforce a piece of code only has send/receive access, but are optional: you can send/receive directly into the Channel if you want.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-04-05 23:53:59 +00:00
6731948056 Add async Mutex. 2022-04-06 01:39:58 +02:00
27a1b0ea73 Simpler Channel.
- Allow initializing in a static, without Forever.
- Remove ability to close, since in embedded enviromnents channels usually live forever and don't get closed.
- Remove MPSC restriction, it's MPMC now. Rename "mpsc" to "channel".
- `Sender` and `Receiver` are still available if you want to enforce a piece of code only has send/receive access, but are optional: you can send/receive directly into the Channel if you want.
2022-04-06 01:34:08 +02:00
f32fa1d33a Add select, select3, select4. 2022-04-05 21:51:43 +02:00
b5c479fdad Remove impl Unpin for SelectAll, as it's automatically inferred. 2022-04-05 21:22:02 +02:00
59ec634246 Remove SelectAll::into_inner.
Due to not requiring Unpin, it's not really possible to call it
after having polled it, you can only call it right after constructing it,
so in practice it's not very useful.
2022-04-05 21:20:44 +02:00
c8bd792b7a reorganize util mod. 2022-04-05 21:17:29 +02:00
aee19185b7 Add more docserver metadata. 2022-04-05 21:05:09 +02:00
f5cf465417 Merge #693
693: no_std version of `futures::future::select_all` r=Dirbaio a=alexmoon

Here's a no-std compatible version of `select_all`. It's not quite as useful as the original because it requires an array of Unpin futures to be pre-constructed instead of taking an iterator (which could return `Pin<Box<_>>` in `std`). And, of course, you don't get a `Vec` of the unfinished futures returned at completion. Still, I think it's cleaner than a long cons of select calls.

I'll leave it up to you whether this is sufficiently general purpose to include in Embassy or not.


Co-authored-by: alexmoon <alex.r.moon@gmail.com>
2022-04-05 17:20:16 +00:00
e42295c4c5 Remove Unpin bound from SelectAll 2022-04-04 21:24:10 -04:00
04a263c700 no_std version of futures::future::select_all 2022-04-04 19:30:16 -04:00
b0de865e0b Merge #691
691: Add pllsai1 and allow for 120Mhz clock on stm32l4+ r=Dirbaio a=ant32



Co-authored-by: Philip A Reimer <antreimer@gmail.com>
2022-04-02 13:30:32 +00:00
1f59f8e7d0 add pllsai1 and allow for 120Mhz clock on stm32l4+ 2022-04-01 22:42:43 -06:00
0eea6fd6b5 Merge #690
690: Use embassy/defmt-timestamp-uptime in all examples. r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-04-02 02:35:49 +00:00
82803bffda Use embassy/defmt-timestamp-uptime in all examples. 2022-04-02 04:35:06 +02:00
a9e63167e1 Merge #689
689: Avoid writing bootloader flash if not needed r=lulf a=lulf

bors r+

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-03-31 13:24:25 +00:00
b0a53610ba Avoid writing bootloader flash if not needed 2022-03-31 15:23:06 +02:00
f028b0064b Merge #685
685: Fix STM32 timer interrupt bug r=Dirbaio a=chemicstry

Previously timer overflow interrupts were not firing correctly, because Update Interrupt Enable (UIE) was not set.

The timers still worked somewhat correclty, because overflow was handled together with other interrupts.

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-03-29 22:13:30 +00:00
d052631118 Fix STM32 timer interrupt bug 2022-03-30 00:27:33 +03:00
1a31cda3c3 Merge #682
682: Convert chip name to upper case to fix rebuilds r=Dirbaio a=DCNick3

PR #665 made stm32-metapac rebuild when the chip definition was changed.
Though it used the lowercase version of the chip name as a filename which probably worked fine on windows with its case-independent filesystem, but was causing constant rebuilds on linux

Co-authored-by: Nikita Strygin <nikita6@bk.ru>
2022-03-28 15:50:13 +00:00
58948051e5 Convert chip name to upper case to fix rebuilds
PR #665 made stm32-metapac rebuild when the chip definition was changed.
Though it used the lowercase version of the chip name as a filename
which probably worked fine on windows with its case-independent
filesystem, but was causing constant rebuilds on linux
2022-03-28 18:44:17 +03:00
c6fb7807c0 Merge #677
677: nrf: nrf52832 doesn't have SPI3 r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-03-27 17:44:54 +00:00
a211003021 Merge #678
678: Add minimal F2 family support r=Dirbaio a=Gekkio

Here's the bare minimum to support F2 family (207/217/205/215). A lot is missing in RCC (e.g. PLL support), but this is enough to have a working blinky example. The example is set up for a NUCLEO-F207ZG board which I don't have, but I've tested it on my custom board with a F215 and different pinout 😅 

After looking at other RCC implementation, I noticed there's two main API styles: a "low-level" API (e.g. L0) where the `Config` struct has dividers and other low-level "knobs", and a "high-level" API (e.g. F0) where it has desired clock frequencies and the RCC implementation figures out how to achieve them. Which one is preferred? Personally I like the low-level API slightly more, because it gives you the most control and it would be easy to also provide some functions to calculate the required parameters based on desired clock frequencies.

F2 has a nasty errata: a delay or DSB instruction must be added after every RCC peripheral clock enable. I've added this workaround to build.rs, but am not sure if this is the best approach. Any comments?

I'm planning to add PLL support too once I know which kind of API is preferred. Would you prefer a separate pull request for that, or should I continue working on this one?

Co-authored-by: Joonas Javanainen <joonas.javanainen@gmail.com>
2022-03-27 17:18:30 +00:00
55a9bf98c5 Add STM32F217ZG to CI
F217 has the most features in the F2 family
2022-03-27 19:56:44 +03:00
5d97c8c8b2 Add F2 examples to CI 2022-03-27 19:55:43 +03:00
83211c2b61 Add workaround for F2 errata 2022-03-27 19:00:36 +03:00
a16fef21e1 Add blinky example for STM32F2
Default configuration is for NUCLEO-F207ZG board
2022-03-27 18:45:37 +03:00
a608d0deaf Add minimal STM32F2 RCC
No support for PLL or other clocks than SYSCLK/AHB/APB1/APB2
2022-03-27 18:40:49 +03:00
490d4588ea nrf: nrf52832 doesn't have SPI3 2022-03-22 19:33:35 +01:00
5c68f0bae7 Merge #676
676: Fix potential unaligned write r=lulf a=lulf

Ensure 4 byte alignment of writes to boot magic.

Reduce log level

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-03-22 13:44:33 +00:00
73012ed40e Fix potential unaligned write
Reduce log level
2022-03-22 14:43:17 +01:00
08e6a996bc Regenerate embassy-stm32 features 2022-03-21 00:19:36 +02:00
5fd1421af2 Mark F2 as a supported family 2022-03-21 00:19:20 +02:00
5df4ae7baf Fix suffix of generated chip metadata files
stm32-data switched from YAML to JSON files in this commit:

4c1eda7c32
2022-03-21 00:17:24 +02:00
48f7d37e75 Merge #675
675: Update stm32data r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-03-20 20:33:47 +00:00
9941e0d012 Update stm32-data 2022-03-20 21:33:16 +01:00
37ada65a33 Merge #669
669: Add SDMMC v1 and SDIO support r=Dirbaio a=chemicstry

SDMMC v2 peripheral is an extension of SDMMC v1 (or SDIO) so I managed to reuse most of the code, with some cfg's.

Apart from small differeces in registers, the biggest change is that v2 uses internal DMA, while v1 has to use shared DMA peripheral. This makes code a bit uglier, because DMA channel for v1 has to be passed around. Not sure if it's possible to make it any cleaner.

This also adds `TransferOptions` structure to DMA, because SDMMC v1 requires setting peripheral flow control and burst transfers. Let me know if some alternative way would be prefered.

I tested this on STM32F429ZIT6 (with sd card) and STM32H745ZIT6 (with oscilloscope).

Depends on: https://github.com/embassy-rs/stm32-data/pull/130

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-03-20 20:19:58 +00:00
f0a071790d Merge #673
673: Inline GPIO functions r=Dirbaio a=nviennot

All GPIO functions are monomorphized (per pin). Inlining these make the ROM smaller when using opt-level="z"

Co-authored-by: Nicolas Viennot <nicolas@viennot.biz>
2022-03-19 20:34:07 +00:00
4aba87f983 Inline GPIO functions
All GPIO functions are monomorphized (per pin). Inlining these make the
ROM smaller when using opt-level="z"
2022-03-19 14:06:11 -04:00