test ci

2023-10-30 03:21:07 +01:00
205 changed files with 1951 additions and 3784 deletions
--- a/.github/ci/build.sh
+++ b/.github/ci/build.sh
@ -12,6 +12,7 @@ if [ -f /ci/secrets/teleprobe-token.txt ]; then
    export TELEPROBE_HOST=https://teleprobe.embassy.dev
    export TELEPROBE_TOKEN=$(cat /ci/secrets/teleprobe-token.txt)
    export TELEPROBE_CACHE=/ci/cache/teleprobe_cache.json
+    rm -f $TELEPROBE_CACHE
 fi

 # needed for "dumb HTTP" transport support
--- a/ci.sh
+++ b/ci.sh
@ -218,7 +218,6 @@ cargo batch  \
 rm out/tests/stm32wb55rg/wpan_mac
 rm out/tests/stm32wb55rg/wpan_ble

-
 # unstable, I think it's running out of RAM?
 rm out/tests/stm32f207zg/eth

--- a/cyw43-pio/src/lib.rs
+++ b/cyw43-pio/src/lib.rs
@ -1,6 +1,6 @@
 #![no_std]
+#![allow(incomplete_features)]
 #![feature(async_fn_in_trait)]
-#![allow(stable_features, unknown_lints, async_fn_in_trait)]

 use core::slice;

--- a/cyw43/Cargo.toml
+++ b/cyw43/Cargo.toml
@ -12,7 +12,7 @@ firmware-logs = []

 [dependencies]
 embassy-time = { version = "0.1.5", path = "../embassy-time"}
-embassy-sync = { version = "0.4.0", path = "../embassy-sync"}
+embassy-sync = { version = "0.3.0", path = "../embassy-sync"}
 embassy-futures = { version = "0.1.0", path = "../embassy-futures"}
 embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel"}

--- a/cyw43/src/control.rs
+++ b/cyw43/src/control.rs
@ -1,10 +1,10 @@
 use core::cmp::{max, min};
-use core::iter::zip;

 use embassy_net_driver_channel as ch;
 use embassy_net_driver_channel::driver::{HardwareAddress, LinkState};
 use embassy_time::Timer;

+pub use crate::bus::SpiBusCyw43;
 use crate::consts::*;
 use crate::events::{Event, EventSubscriber, Events};
 use crate::fmt::Bytes;
@ -17,12 +17,6 @@ pub struct Error {
    pub status: u32,
 }

-#[derive(Debug)]
-pub enum AddMulticastAddressError {
-    NotMulticast,
-    NoFreeSlots,
-}
-
 pub struct Control<'a> {
    state_ch: ch::StateRunner<'a>,
    events: &'a Events,
@ -323,54 +317,6 @@ impl<'a> Control<'a> {
        self.set_iovar_u32x2("bss", 0, 1).await; // bss = BSS_UP
    }

-    /// Add specified address to the list of hardware addresses the device
-    /// listens on. The address must be a Group address (I/G bit set). Up
-    /// to 10 addresses are supported by the firmware. Returns the number of
-    /// address slots filled after adding, or an error.
-    pub async fn add_multicast_address(&mut self, address: [u8; 6]) -> Result<usize, AddMulticastAddressError> {
-        // The firmware seems to ignore non-multicast addresses, so let's
-        // prevent the user from adding them and wasting space.
-        if address[0] & 0x01 != 1 {
-            return Err(AddMulticastAddressError::NotMulticast);
-        }
-
-        let mut buf = [0; 64];
-        self.get_iovar("mcast_list", &mut buf).await;
-
-        let n = u32::from_le_bytes(buf[..4].try_into().unwrap()) as usize;
-        let (used, free) = buf[4..].split_at_mut(n * 6);
-
-        if used.chunks(6).any(|a| a == address) {
-            return Ok(n);
-        }
-
-        if free.len() < 6 {
-            return Err(AddMulticastAddressError::NoFreeSlots);
-        }
-
-        free[..6].copy_from_slice(&address);
-        let n = n + 1;
-        buf[..4].copy_from_slice(&(n as u32).to_le_bytes());
-
-        self.set_iovar_v::<80>("mcast_list", &buf).await;
-        Ok(n)
-    }
-
-    /// Retrieve the list of configured multicast hardware addresses.
-    pub async fn list_mulistcast_addresses(&mut self, result: &mut [[u8; 6]; 10]) -> usize {
-        let mut buf = [0; 64];
-        self.get_iovar("mcast_list", &mut buf).await;
-
-        let n = u32::from_le_bytes(buf[..4].try_into().unwrap()) as usize;
-        let used = &buf[4..][..n * 6];
-
-        for (addr, output) in zip(used.chunks(6), result.iter_mut()) {
-            output.copy_from_slice(addr)
-        }
-
-        n
-    }
-
    async fn set_iovar_u32x2(&mut self, name: &str, val1: u32, val2: u32) {
        let mut buf = [0; 8];
        buf[0..4].copy_from_slice(&val1.to_le_bytes());
--- a/cyw43/src/lib.rs
+++ b/cyw43/src/lib.rs
@ -1,7 +1,7 @@
 #![no_std]
 #![no_main]
+#![allow(incomplete_features)]
 #![feature(async_fn_in_trait, type_alias_impl_trait, concat_bytes)]
-#![allow(stable_features, unknown_lints, async_fn_in_trait)]
 #![deny(unused_must_use)]

 // This mod MUST go first, so that the others see its macros.
@ -27,7 +27,7 @@ use ioctl::IoctlState;

 use crate::bus::Bus;
 pub use crate::bus::SpiBusCyw43;
-pub use crate::control::{AddMulticastAddressError, Control, Error as ControlError, Scanner};
+pub use crate::control::{Control, Error as ControlError, Scanner};
 pub use crate::runner::Runner;
 pub use crate::structs::BssInfo;

--- a/embassy-boot/boot/Cargo.toml
+++ b/embassy-boot/boot/Cargo.toml
@ -28,7 +28,7 @@ digest = "0.10"
 log = { version = "0.4", optional = true  }
 ed25519-dalek = { version = "1.0.1", default_features = false, features = ["u32_backend"], optional = true }
 embassy-embedded-hal = { version = "0.1.0", path = "../../embassy-embedded-hal" }
-embassy-sync = { version = "0.4.0", path = "../../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../../embassy-sync" }
 embedded-storage = "0.3.0"
 embedded-storage-async = { version = "0.4.0", optional = true }
 salty = { git = "https://github.com/ycrypto/salty.git", rev = "a9f17911a5024698406b75c0fac56ab5ccf6a8c7", optional = true }
--- a/embassy-boot/boot/src/lib.rs
+++ b/embassy-boot/boot/src/lib.rs
@ -1,5 +1,4 @@
 #![cfg_attr(feature = "nightly", feature(async_fn_in_trait))]
-#![cfg_attr(feature = "nightly", allow(stable_features, unknown_lints, async_fn_in_trait))]
 #![no_std]
 #![warn(missing_docs)]
 #![doc = include_str!("../README.md")]
--- a/embassy-boot/nrf/Cargo.toml
+++ b/embassy-boot/nrf/Cargo.toml
@ -16,7 +16,7 @@ target = "thumbv7em-none-eabi"
 [dependencies]
 defmt = { version = "0.3", optional = true }

-embassy-sync = { version = "0.4.0", path = "../../embassy-sync" }
+embassy-sync = { path = "../../embassy-sync" }
 embassy-nrf = { path = "../../embassy-nrf" }
 embassy-boot = { path = "../boot", default-features = false }
 cortex-m = { version = "0.7.6" }
--- a/embassy-boot/rp/Cargo.toml
+++ b/embassy-boot/rp/Cargo.toml
@ -17,7 +17,7 @@ defmt = { version = "0.3", optional = true }
 defmt-rtt = { version = "0.4", optional = true }
 log = { version = "0.4", optional = true }

-embassy-sync = { version = "0.4.0", path = "../../embassy-sync" }
+embassy-sync = { path = "../../embassy-sync" }
 embassy-rp = { path = "../../embassy-rp", default-features = false }
 embassy-boot = { path = "../boot", default-features = false }
 embassy-time = { path = "../../embassy-time" }
--- a/embassy-boot/stm32/Cargo.toml
+++ b/embassy-boot/stm32/Cargo.toml
@ -18,7 +18,7 @@ defmt = { version = "0.3", optional = true }
 defmt-rtt = { version = "0.4", optional = true }
 log = { version = "0.4", optional = true }

-embassy-sync = { version = "0.4.0", path = "../../embassy-sync" }
+embassy-sync = { path = "../../embassy-sync" }
 embassy-stm32 = { path = "../../embassy-stm32", default-features = false }
 embassy-boot = { path = "../boot", default-features = false }
 cortex-m = { version = "0.7.6" }
--- a/embassy-embedded-hal/Cargo.toml
+++ b/embassy-embedded-hal/Cargo.toml
@ -20,7 +20,7 @@ default = ["time"]

 [dependencies]
 embassy-futures = { version = "0.1.0", path = "../embassy-futures", optional = true }
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = [
    "unproven",
--- a/embassy-embedded-hal/src/lib.rs
+++ b/embassy-embedded-hal/src/lib.rs
@ -1,6 +1,5 @@
 #![cfg_attr(not(feature = "std"), no_std)]
-#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections, try_blocks))]
-#![cfg_attr(feature = "nightly", allow(stable_features, unknown_lints, async_fn_in_trait))]
+#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, try_blocks))]
 #![warn(missing_docs)]

 //! Utilities to use `embedded-hal` traits with Embassy.
--- a/embassy-executor/CHANGELOG.md
+++ b/embassy-executor/CHANGELOG.md
@ -5,20 +5,6 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).

-## 0.3.3 - 2023-11-15
-
- Add `main` macro reexport for Xtensa arch.
- Remove use of `atomic-polyfill`. The executor now has multiple implementations of its internal data structures for cases where the target supports atomics or doesn't.
-
-## 0.3.2 - 2023-11-06
-
- Use `atomic-polyfill` for `riscv32`
- Removed unused dependencies (static_cell, futures-util)
-
-## 0.3.1 - 2023-11-01
-
- Fix spurious "Found waker not created by the Embassy executor" error in recent nightlies.
-
 ## 0.3.0 - 2023-08-25

 - Replaced Pender. Implementations now must define an extern function called `__pender`.
--- a/embassy-executor/Cargo.toml
+++ b/embassy-executor/Cargo.toml
@ -1,6 +1,6 @@
 [package]
 name = "embassy-executor"
-version = "0.3.3"
+version = "0.3.0"
 edition = "2021"
 license = "MIT OR Apache-2.0"
 description = "async/await executor designed for embedded usage"
@ -34,7 +34,7 @@ _arch = [] # some arch was picked
 arch-std = ["_arch", "critical-section/std"]
 arch-cortex-m = ["_arch", "dep:cortex-m"]
 arch-xtensa = ["_arch"]
-arch-riscv32 = ["_arch", "dep:portable-atomic"]
+arch-riscv32 = ["_arch"]
 arch-wasm = ["_arch", "dep:wasm-bindgen", "dep:js-sys"]

 # Enable the thread-mode executor (using WFE/SEV in Cortex-M, WFI in other embedded archs)
@ -57,13 +57,12 @@ defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
 rtos-trace = { version = "0.1.2", optional = true }

+futures-util = { version = "0.3.17", default-features = false }
 embassy-macros = { version = "0.2.1", path = "../embassy-macros" }
 embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true}
+atomic-polyfill = "1.0.1"
 critical-section = "1.1"
-
-# needed for riscv
-# remove when https://github.com/rust-lang/rust/pull/114499 is merged
-portable-atomic = { version = "1.5", optional = true }
+static_cell = "1.1"

 # arch-cortex-m dependencies
 cortex-m = { version = "0.7.6", optional = true }
--- a/embassy-executor/src/arch/cortex_m.rs
+++ b/embassy-executor/src/arch/cortex_m.rs
@ -115,12 +115,12 @@ mod thread {
 pub use interrupt::*;
 #[cfg(feature = "executor-interrupt")]
 mod interrupt {
-    use core::cell::{Cell, UnsafeCell};
+    use core::cell::UnsafeCell;
    use core::mem::MaybeUninit;

+    use atomic_polyfill::{AtomicBool, Ordering};
    use cortex_m::interrupt::InterruptNumber;
    use cortex_m::peripheral::NVIC;
-    use critical_section::Mutex;

    use crate::raw;

@ -146,7 +146,7 @@ mod interrupt {
    /// It is somewhat more complex to use, it's recommended to use the thread-mode
    /// [`Executor`] instead, if it works for your use case.
    pub struct InterruptExecutor {
-        started: Mutex<Cell<bool>>,
+        started: AtomicBool,
        executor: UnsafeCell<MaybeUninit<raw::Executor>>,
    }

@ -158,7 +158,7 @@ mod interrupt {
        #[inline]
        pub const fn new() -> Self {
            Self {
-                started: Mutex::new(Cell::new(false)),
+                started: AtomicBool::new(false),
                executor: UnsafeCell::new(MaybeUninit::uninit()),
            }
        }
@ -167,8 +167,7 @@ mod interrupt {
        ///
        /// # Safety
        ///
-        /// - You MUST call this from the interrupt handler, and from nowhere else.
-        /// - You must not call this before calling `start()`.
+        /// You MUST call this from the interrupt handler, and from nowhere else.
        pub unsafe fn on_interrupt(&'static self) {
            let executor = unsafe { (&*self.executor.get()).assume_init_ref() };
            executor.poll();
@ -197,7 +196,11 @@ mod interrupt {
        /// do it after.
        ///
        pub fn start(&'static self, irq: impl InterruptNumber) -> crate::SendSpawner {
-            if critical_section::with(|cs| self.started.borrow(cs).replace(true)) {
+            if self
+                .started
+                .compare_exchange(false, true, Ordering::Acquire, Ordering::Relaxed)
+                .is_err()
+            {
                panic!("InterruptExecutor::start() called multiple times on the same executor.");
            }

@ -219,10 +222,10 @@ mod interrupt {
        /// This returns a [`SendSpawner`] you can use to spawn tasks on this
        /// executor.
        ///
-        /// This MUST only be called on an executor that has already been started.
+        /// This MUST only be called on an executor that has already been spawned.
        /// The function will panic otherwise.
        pub fn spawner(&'static self) -> crate::SendSpawner {
-            if !critical_section::with(|cs| self.started.borrow(cs).get()) {
+            if !self.started.load(Ordering::Acquire) {
                panic!("InterruptExecutor::spawner() called on uninitialized executor.");
            }
            let executor = unsafe { (&*self.executor.get()).assume_init_ref() };
--- a/embassy-executor/src/arch/riscv32.rs
+++ b/embassy-executor/src/arch/riscv32.rs
@ -6,10 +6,10 @@ pub use thread::*;
 #[cfg(feature = "executor-thread")]
 mod thread {
    use core::marker::PhantomData;
+    use core::sync::atomic::{AtomicBool, Ordering};

    #[cfg(feature = "nightly")]
    pub use embassy_macros::main_riscv as main;
-    use portable_atomic::{AtomicBool, Ordering};

    use crate::{raw, Spawner};

--- a/embassy-executor/src/arch/xtensa.rs
+++ b/embassy-executor/src/arch/xtensa.rs
@ -8,9 +8,6 @@ mod thread {
    use core::marker::PhantomData;
    use core::sync::atomic::{AtomicBool, Ordering};

-    #[cfg(feature = "nightly")]
-    pub use embassy_macros::main_riscv as main;
-
    use crate::{raw, Spawner};

    /// global atomic used to keep track of whether there is work to do since sev() is not available on Xtensa
--- a/embassy-executor/src/lib.rs
+++ b/embassy-executor/src/lib.rs
@ -33,7 +33,6 @@ check_at_most_one!("arch-cortex-m", "arch-riscv32", "arch-xtensa", "arch-std", "
 mod arch;

 #[cfg(feature = "_arch")]
-#[allow(unused_imports)] // don't warn if the module is empty.
 pub use arch::*;

 pub mod raw;
@ -47,6 +46,7 @@ pub use spawner::*;
 pub mod _export {
    #[cfg(feature = "rtos-trace")]
    pub use rtos_trace::trace;
+    pub use static_cell::StaticCell;

    /// Expands the given block of code when `embassy-executor` is compiled with
    /// the `rtos-trace-interrupt` feature.
--- a/embassy-executor/src/raw/mod.rs
+++ b/embassy-executor/src/raw/mod.rs
@ -7,15 +7,7 @@
 //! Using this module requires respecting subtle safety contracts. If you can, prefer using the safe
 //! [executor wrappers](crate::Executor) and the [`embassy_executor::task`](embassy_macros::task) macro, which are fully safe.

-#[cfg_attr(target_has_atomic = "ptr", path = "run_queue_atomics.rs")]
-#[cfg_attr(not(target_has_atomic = "ptr"), path = "run_queue_critical_section.rs")]
 mod run_queue;
-
-#[cfg_attr(all(cortex_m, target_has_atomic = "8"), path = "state_atomics_arm.rs")]
-#[cfg_attr(all(not(cortex_m), target_has_atomic = "8"), path = "state_atomics.rs")]
-#[cfg_attr(not(target_has_atomic = "8"), path = "state_critical_section.rs")]
-mod state;
-
 #[cfg(feature = "integrated-timers")]
 mod timer_queue;
 pub(crate) mod util;
@ -29,6 +21,7 @@ use core::pin::Pin;
 use core::ptr::NonNull;
 use core::task::{Context, Poll};

+use atomic_polyfill::{AtomicU32, Ordering};
 #[cfg(feature = "integrated-timers")]
 use embassy_time::driver::{self, AlarmHandle};
 #[cfg(feature = "integrated-timers")]
@ -37,14 +30,21 @@ use embassy_time::Instant;
 use rtos_trace::trace;

 use self::run_queue::{RunQueue, RunQueueItem};
-use self::state::State;
 use self::util::{SyncUnsafeCell, UninitCell};
 pub use self::waker::task_from_waker;
 use super::SpawnToken;

+/// Task is spawned (has a future)
+pub(crate) const STATE_SPAWNED: u32 = 1 << 0;
+/// Task is in the executor run queue
+pub(crate) const STATE_RUN_QUEUED: u32 = 1 << 1;
+/// Task is in the executor timer queue
+#[cfg(feature = "integrated-timers")]
+pub(crate) const STATE_TIMER_QUEUED: u32 = 1 << 2;
+
 /// Raw task header for use in task pointers.
 pub(crate) struct TaskHeader {
-    pub(crate) state: State,
+    pub(crate) state: AtomicU32,
    pub(crate) run_queue_item: RunQueueItem,
    pub(crate) executor: SyncUnsafeCell<Option<&'static SyncExecutor>>,
    poll_fn: SyncUnsafeCell<Option<unsafe fn(TaskRef)>>,
@ -116,7 +116,7 @@ impl<F: Future + 'static> TaskStorage<F> {
    pub const fn new() -> Self {
        Self {
            raw: TaskHeader {
-                state: State::new(),
+                state: AtomicU32::new(0),
                run_queue_item: RunQueueItem::new(),
                executor: SyncUnsafeCell::new(None),
                // Note: this is lazily initialized so that a static `TaskStorage` will go in `.bss`
@ -161,7 +161,7 @@ impl<F: Future + 'static> TaskStorage<F> {
        match future.poll(&mut cx) {
            Poll::Ready(_) => {
                this.future.drop_in_place();
-                this.raw.state.despawn();
+                this.raw.state.fetch_and(!STATE_SPAWNED, Ordering::AcqRel);

                #[cfg(feature = "integrated-timers")]
                this.raw.expires_at.set(Instant::MAX);
@ -193,7 +193,11 @@ impl<F: Future + 'static> AvailableTask<F> {
    ///
    /// This function returns `None` if a task has already been spawned and has not finished running.
    pub fn claim(task: &'static TaskStorage<F>) -> Option<Self> {
-        task.raw.state.spawn().then(|| Self { task })
+        task.raw
+            .state
+            .compare_exchange(0, STATE_SPAWNED | STATE_RUN_QUEUED, Ordering::AcqRel, Ordering::Acquire)
+            .ok()
+            .map(|_| Self { task })
    }

    fn initialize_impl<S>(self, future: impl FnOnce() -> F) -> SpawnToken<S> {
@ -390,7 +394,8 @@ impl SyncExecutor {
                #[cfg(feature = "integrated-timers")]
                task.expires_at.set(Instant::MAX);

-                if !task.state.run_dequeue() {
+                let state = task.state.fetch_and(!STATE_RUN_QUEUED, Ordering::AcqRel);
+                if state & STATE_SPAWNED == 0 {
                    // If task is not running, ignore it. This can happen in the following scenario:
                    //   - Task gets dequeued, poll starts
                    //   - While task is being polled, it gets woken. It gets placed in the queue.
@ -541,7 +546,18 @@ impl Executor {
 /// You can obtain a `TaskRef` from a `Waker` using [`task_from_waker`].
 pub fn wake_task(task: TaskRef) {
    let header = task.header();
-    if header.state.run_enqueue() {
+
+    let res = header.state.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |state| {
+        // If already scheduled, or if not started,
+        if (state & STATE_RUN_QUEUED != 0) || (state & STATE_SPAWNED == 0) {
+            None
+        } else {
+            // Mark it as scheduled
+            Some(state | STATE_RUN_QUEUED)
+        }
+    });
+
+    if res.is_ok() {
        // We have just marked the task as scheduled, so enqueue it.
        unsafe {
            let executor = header.executor.get().unwrap_unchecked();
@ -555,7 +571,18 @@ pub fn wake_task(task: TaskRef) {
 /// You can obtain a `TaskRef` from a `Waker` using [`task_from_waker`].
 pub fn wake_task_no_pend(task: TaskRef) {
    let header = task.header();
-    if header.state.run_enqueue() {
+
+    let res = header.state.fetch_update(Ordering::SeqCst, Ordering::SeqCst, |state| {
+        // If already scheduled, or if not started,
+        if (state & STATE_RUN_QUEUED != 0) || (state & STATE_SPAWNED == 0) {
+            None
+        } else {
+            // Mark it as scheduled
+            Some(state | STATE_RUN_QUEUED)
+        }
+    });
+
+    if res.is_ok() {
        // We have just marked the task as scheduled, so enqueue it.
        unsafe {
            let executor = header.executor.get().unwrap_unchecked();
--- a/embassy-executor/src/raw/run_queue_atomics.rs
+++ b/embassy-executor/src/raw/run_queue_atomics.rs
@ -1,6 +1,7 @@
 use core::ptr;
 use core::ptr::NonNull;
-use core::sync::atomic::{AtomicPtr, Ordering};
+
+use atomic_polyfill::{AtomicPtr, Ordering};

 use super::{TaskHeader, TaskRef};
 use crate::raw::util::SyncUnsafeCell;
--- a/embassy-executor/src/raw/run_queue_critical_section.rs
+++ b/embassy-executor/src/raw/run_queue_critical_section.rs
@ -1,75 +0,0 @@
-use core::cell::Cell;
-
-use critical_section::{CriticalSection, Mutex};
-
-use super::TaskRef;
-
-pub(crate) struct RunQueueItem {
-    next: Mutex<Cell<Option<TaskRef>>>,
-}
-
-impl RunQueueItem {
-    pub const fn new() -> Self {
-        Self {
-            next: Mutex::new(Cell::new(None)),
-        }
-    }
-}
-
-/// Atomic task queue using a very, very simple lock-free linked-list queue:
-///
-/// To enqueue a task, task.next is set to the old head, and head is atomically set to task.
-///
-/// Dequeuing is done in batches: the queue is emptied by atomically replacing head with
-/// null. Then the batch is iterated following the next pointers until null is reached.
-///
-/// Note that batches will be iterated in the reverse order as they were enqueued. This is OK
-/// for our purposes: it can't create fairness problems since the next batch won't run until the
-/// current batch is completely processed, so even if a task enqueues itself instantly (for example
-/// by waking its own waker) can't prevent other tasks from running.
-pub(crate) struct RunQueue {
-    head: Mutex<Cell<Option<TaskRef>>>,
-}
-
-impl RunQueue {
-    pub const fn new() -> Self {
-        Self {
-            head: Mutex::new(Cell::new(None)),
-        }
-    }
-
-    /// Enqueues an item. Returns true if the queue was empty.
-    ///
-    /// # Safety
-    ///
-    /// `item` must NOT be already enqueued in any queue.
-    #[inline(always)]
-    pub(crate) unsafe fn enqueue(&self, task: TaskRef) -> bool {
-        critical_section::with(|cs| {
-            let prev = self.head.borrow(cs).replace(Some(task));
-            task.header().run_queue_item.next.borrow(cs).set(prev);
-
-            prev.is_none()
-        })
-    }
-
-    /// Empty the queue, then call `on_task` for each task that was in the queue.
-    /// NOTE: It is OK for `on_task` to enqueue more tasks. In this case they're left in the queue
-    /// and will be processed by the *next* call to `dequeue_all`, *not* the current one.
-    pub(crate) fn dequeue_all(&self, on_task: impl Fn(TaskRef)) {
-        // Atomically empty the queue.
-        let mut next = critical_section::with(|cs| self.head.borrow(cs).take());
-
-        // Iterate the linked list of tasks that were previously in the queue.
-        while let Some(task) = next {
-            // If the task re-enqueues itself, the `next` pointer will get overwritten.
-            // Therefore, first read the next pointer, and only then process the task.
-
-            // safety: we know if the task is enqueued, no one else will touch the `next` pointer.
-            let cs = unsafe { CriticalSection::new() };
-            next = task.header().run_queue_item.next.borrow(cs).get();
-
-            on_task(task);
-        }
-    }
-}
--- a/embassy-executor/src/raw/state_atomics.rs
+++ b/embassy-executor/src/raw/state_atomics.rs
@ -1,73 +0,0 @@
-use core::sync::atomic::{AtomicU32, Ordering};
-
-/// Task is spawned (has a future)
-pub(crate) const STATE_SPAWNED: u32 = 1 << 0;
-/// Task is in the executor run queue
-pub(crate) const STATE_RUN_QUEUED: u32 = 1 << 1;
-/// Task is in the executor timer queue
-#[cfg(feature = "integrated-timers")]
-pub(crate) const STATE_TIMER_QUEUED: u32 = 1 << 2;
-
-pub(crate) struct State {
-    state: AtomicU32,
-}
-
-impl State {
-    pub const fn new() -> State {
-        Self {
-            state: AtomicU32::new(0),
-        }
-    }
-
-    /// If task is idle, mark it as spawned + run_queued and return true.
-    #[inline(always)]
-    pub fn spawn(&self) -> bool {
-        self.state
-            .compare_exchange(0, STATE_SPAWNED | STATE_RUN_QUEUED, Ordering::AcqRel, Ordering::Acquire)
-            .is_ok()
-    }
-
-    /// Unmark the task as spawned.
-    #[inline(always)]
-    pub fn despawn(&self) {
-        self.state.fetch_and(!STATE_SPAWNED, Ordering::AcqRel);
-    }
-
-    /// Mark the task as run-queued if it's spawned and isn't already run-queued. Return true on success.
-    #[inline(always)]
-    pub fn run_enqueue(&self) -> bool {
-        self.state
-            .fetch_update(Ordering::SeqCst, Ordering::SeqCst, |state| {
-                // If already scheduled, or if not started,
-                if (state & STATE_RUN_QUEUED != 0) || (state & STATE_SPAWNED == 0) {
-                    None
-                } else {
-                    // Mark it as scheduled
-                    Some(state | STATE_RUN_QUEUED)
-                }
-            })
-            .is_ok()
-    }
-
-    /// Unmark the task as run-queued. Return whether the task is spawned.
-    #[inline(always)]
-    pub fn run_dequeue(&self) -> bool {
-        let state = self.state.fetch_and(!STATE_RUN_QUEUED, Ordering::AcqRel);
-        state & STATE_SPAWNED != 0
-    }
-
-    /// Mark the task as timer-queued. Return whether it was newly queued (i.e. not queued before)
-    #[cfg(feature = "integrated-timers")]
-    #[inline(always)]
-    pub fn timer_enqueue(&self) -> bool {
-        let old_state = self.state.fetch_or(STATE_TIMER_QUEUED, Ordering::AcqRel);
-        old_state & STATE_TIMER_QUEUED == 0
-    }
-
-    /// Unmark the task as timer-queued.
-    #[cfg(feature = "integrated-timers")]
-    #[inline(always)]
-    pub fn timer_dequeue(&self) {
-        self.state.fetch_and(!STATE_TIMER_QUEUED, Ordering::AcqRel);
-    }
-}
--- a/embassy-executor/src/raw/state_atomics_arm.rs
+++ b/embassy-executor/src/raw/state_atomics_arm.rs
@ -1,103 +0,0 @@
-use core::arch::asm;
-use core::sync::atomic::{compiler_fence, AtomicBool, AtomicU32, Ordering};
-
-// Must be kept in sync with the layout of `State`!
-pub(crate) const STATE_SPAWNED: u32 = 1 << 0;
-pub(crate) const STATE_RUN_QUEUED: u32 = 1 << 8;
-
-#[repr(C, align(4))]
-pub(crate) struct State {
-    /// Task is spawned (has a future)
-    spawned: AtomicBool,
-    /// Task is in the executor run queue
-    run_queued: AtomicBool,
-    /// Task is in the executor timer queue
-    timer_queued: AtomicBool,
-    pad: AtomicBool,
-}
-
-impl State {
-    pub const fn new() -> State {
-        Self {
-            spawned: AtomicBool::new(false),
-            run_queued: AtomicBool::new(false),
-            timer_queued: AtomicBool::new(false),
-            pad: AtomicBool::new(false),
-        }
-    }
-
-    fn as_u32(&self) -> &AtomicU32 {
-        unsafe { &*(self as *const _ as *const AtomicU32) }
-    }
-
-    /// If task is idle, mark it as spawned + run_queued and return true.
-    #[inline(always)]
-    pub fn spawn(&self) -> bool {
-        compiler_fence(Ordering::Release);
-        let r = self
-            .as_u32()
-            .compare_exchange(
-                0,
-                STATE_SPAWNED | STATE_RUN_QUEUED,
-                Ordering::Relaxed,
-                Ordering::Relaxed,
-            )
-            .is_ok();
-        compiler_fence(Ordering::Acquire);
-        r
-    }
-
-    /// Unmark the task as spawned.
-    #[inline(always)]
-    pub fn despawn(&self) {
-        compiler_fence(Ordering::Release);
-        self.spawned.store(false, Ordering::Relaxed);
-    }
-
-    /// Mark the task as run-queued if it's spawned and isn't already run-queued. Return true on success.
-    #[inline(always)]
-    pub fn run_enqueue(&self) -> bool {
-        unsafe {
-            loop {
-                let state: u32;
-                asm!("ldrex {}, [{}]", out(reg) state, in(reg) self, options(nostack));
-
-                if (state & STATE_RUN_QUEUED != 0) || (state & STATE_SPAWNED == 0) {
-                    asm!("clrex", options(nomem, nostack));
-                    return false;
-                }
-
-                let outcome: usize;
-                let new_state = state | STATE_RUN_QUEUED;
-                asm!("strex {}, {}, [{}]", out(reg) outcome, in(reg) new_state, in(reg) self, options(nostack));
-                if outcome == 0 {
-                    return true;
-                }
-            }
-        }
-    }
-
-    /// Unmark the task as run-queued. Return whether the task is spawned.
-    #[inline(always)]
-    pub fn run_dequeue(&self) -> bool {
-        compiler_fence(Ordering::Release);
-
-        let r = self.spawned.load(Ordering::Relaxed);
-        self.run_queued.store(false, Ordering::Relaxed);
-        r
-    }
-
-    /// Mark the task as timer-queued. Return whether it was newly queued (i.e. not queued before)
-    #[cfg(feature = "integrated-timers")]
-    #[inline(always)]
-    pub fn timer_enqueue(&self) -> bool {
-        !self.timer_queued.swap(true, Ordering::Relaxed)
-    }
-
-    /// Unmark the task as timer-queued.
-    #[cfg(feature = "integrated-timers")]
-    #[inline(always)]
-    pub fn timer_dequeue(&self) {
-        self.timer_queued.store(false, Ordering::Relaxed);
-    }
-}
--- a/embassy-executor/src/raw/state_critical_section.rs
+++ b/embassy-executor/src/raw/state_critical_section.rs
@ -1,93 +0,0 @@
-use core::cell::Cell;
-
-use critical_section::Mutex;
-
-/// Task is spawned (has a future)
-pub(crate) const STATE_SPAWNED: u32 = 1 << 0;
-/// Task is in the executor run queue
-pub(crate) const STATE_RUN_QUEUED: u32 = 1 << 1;
-/// Task is in the executor timer queue
-#[cfg(feature = "integrated-timers")]
-pub(crate) const STATE_TIMER_QUEUED: u32 = 1 << 2;
-
-pub(crate) struct State {
-    state: Mutex<Cell<u32>>,
-}
-
-impl State {
-    pub const fn new() -> State {
-        Self {
-            state: Mutex::new(Cell::new(0)),
-        }
-    }
-
-    fn update<R>(&self, f: impl FnOnce(&mut u32) -> R) -> R {
-        critical_section::with(|cs| {
-            let s = self.state.borrow(cs);
-            let mut val = s.get();
-            let r = f(&mut val);
-            s.set(val);
-            r
-        })
-    }
-
-    /// If task is idle, mark it as spawned + run_queued and return true.
-    #[inline(always)]
-    pub fn spawn(&self) -> bool {
-        self.update(|s| {
-            if *s == 0 {
-                *s = STATE_SPAWNED | STATE_RUN_QUEUED;
-                true
-            } else {
-                false
-            }
-        })
-    }
-
-    /// Unmark the task as spawned.
-    #[inline(always)]
-    pub fn despawn(&self) {
-        self.update(|s| *s &= !STATE_SPAWNED);
-    }
-
-    /// Mark the task as run-queued if it's spawned and isn't already run-queued. Return true on success.
-    #[inline(always)]
-    pub fn run_enqueue(&self) -> bool {
-        self.update(|s| {
-            if (*s & STATE_RUN_QUEUED != 0) || (*s & STATE_SPAWNED == 0) {
-                false
-            } else {
-                *s |= STATE_RUN_QUEUED;
-                true
-            }
-        })
-    }
-
-    /// Unmark the task as run-queued. Return whether the task is spawned.
-    #[inline(always)]
-    pub fn run_dequeue(&self) -> bool {
-        self.update(|s| {
-            let ok = *s & STATE_SPAWNED != 0;
-            *s &= !STATE_RUN_QUEUED;
-            ok
-        })
-    }
-
-    /// Mark the task as timer-queued. Return whether it was newly queued (i.e. not queued before)
-    #[cfg(feature = "integrated-timers")]
-    #[inline(always)]
-    pub fn timer_enqueue(&self) -> bool {
-        self.update(|s| {
-            let ok = *s & STATE_TIMER_QUEUED == 0;
-            *s |= STATE_TIMER_QUEUED;
-            ok
-        })
-    }
-
-    /// Unmark the task as timer-queued.
-    #[cfg(feature = "integrated-timers")]
-    #[inline(always)]
-    pub fn timer_dequeue(&self) {
-        self.update(|s| *s &= !STATE_TIMER_QUEUED);
-    }
-}
--- a/embassy-executor/src/raw/timer_queue.rs
+++ b/embassy-executor/src/raw/timer_queue.rs
@ -1,8 +1,9 @@
 use core::cmp::min;

+use atomic_polyfill::Ordering;
 use embassy_time::Instant;

-use super::TaskRef;
+use super::{TaskRef, STATE_TIMER_QUEUED};
 use crate::raw::util::SyncUnsafeCell;

 pub(crate) struct TimerQueueItem {
@ -31,7 +32,10 @@ impl TimerQueue {
    pub(crate) unsafe fn update(&self, p: TaskRef) {
        let task = p.header();
        if task.expires_at.get() != Instant::MAX {
-            if task.state.timer_enqueue() {
+            let old_state = task.state.fetch_or(STATE_TIMER_QUEUED, Ordering::AcqRel);
+            let is_new = old_state & STATE_TIMER_QUEUED == 0;
+
+            if is_new {
                task.timer_queue_item.next.set(self.head.get());
                self.head.set(Some(p));
            }
@ -71,7 +75,7 @@ impl TimerQueue {
            } else {
                // Remove it
                prev.set(task.timer_queue_item.next.get());
-                task.state.timer_dequeue();
+                task.state.fetch_and(!STATE_TIMER_QUEUED, Ordering::AcqRel);
            }
        }
    }
--- a/embassy-futures/Cargo.toml
+++ b/embassy-futures/Cargo.toml
@ -1,6 +1,6 @@
 [package]
 name = "embassy-futures"
-version = "0.1.1"
+version = "0.1.0"
 edition = "2021"
 description = "no-std, no-alloc utilities for working with futures"
 repository = "https://github.com/embassy-rs/embassy"
--- a/embassy-lora/Cargo.toml
+++ b/embassy-lora/Cargo.toml
@ -21,7 +21,7 @@ defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }

 embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32", default-features = false, optional = true }
 embedded-hal-async = { version = "=1.0.0-rc.1" }
 embedded-hal = { version = "0.2", features = ["unproven"] }
--- a/embassy-lora/src/lib.rs
+++ b/embassy-lora/src/lib.rs
@ -1,6 +1,5 @@
 #![no_std]
-#![feature(async_fn_in_trait, impl_trait_projections)]
-#![allow(stable_features, unknown_lints, async_fn_in_trait)]
+#![feature(async_fn_in_trait)]
 //! embassy-lora holds LoRa-specific functionality.

 pub(crate) mod fmt;
--- a/embassy-macros/src/macros/main.rs
+++ b/embassy-macros/src/macros/main.rs
@ -53,7 +53,8 @@ pub fn wasm() -> TokenStream {
    quote! {
        #[wasm_bindgen::prelude::wasm_bindgen(start)]
        pub fn main() -> Result<(), wasm_bindgen::JsValue> {
-            let executor = ::std::boxed::Box::leak(::std::boxed::Box::new(::embassy_executor::Executor::new()));
+            static EXECUTOR: ::embassy_executor::_export::StaticCell<::embassy_executor::Executor> = ::embassy_executor::_export::StaticCell::new();
+            let executor = EXECUTOR.init(::embassy_executor::Executor::new());

            executor.start(|spawner| {
                spawner.spawn(__embassy_main(spawner)).unwrap();
--- a/embassy-net-adin1110/Cargo.toml
+++ b/embassy-net-adin1110/Cargo.toml
@ -10,7 +10,7 @@ edition = "2021"
 # See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html

 [dependencies]
-heapless = "0.8"
+heapless = "0.7.16"
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4", default-features = false, optional = true }
 embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-rc.1" }
@ -22,7 +22,9 @@ embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 bitfield = "0.14.0"

 [dev-dependencies]
-embedded-hal-mock = { version = "=0.10.0-rc.1", features = ["embedded-hal-async", "eh1"] }
+# reenable when https://github.com/dbrgn/embedded-hal-mock/pull/86 is merged.
+#embedded-hal-mock = { git = "https://github.com/dbrgn/embedded-hal-mock", branch = "1-alpha", features = ["embedded-hal-async", "eh1"] }] }
+embedded-hal-mock = { git = "https://github.com/newAM/embedded-hal-mock", branch = "eh1-rc.1", features = ["embedded-hal-async", "eh1"] }
 crc = "3.0.1"
 env_logger = "0.10"
 critical-section = { version = "1.1.2", features = ["std"] }
--- a/embassy-net-adin1110/src/lib.rs
+++ b/embassy-net-adin1110/src/lib.rs
@ -1,6 +1,5 @@
 #![deny(clippy::pedantic)]
 #![feature(async_fn_in_trait)]
-#![allow(stable_features, unknown_lints, async_fn_in_trait)]
 #![cfg_attr(not(any(test, feature = "std")), no_std)]
 #![allow(clippy::module_name_repetitions)]
 #![allow(clippy::missing_errors_doc)]
--- a/embassy-net-driver-channel/Cargo.toml
+++ b/embassy-net-driver-channel/Cargo.toml
@ -24,6 +24,6 @@ features = ["defmt"]
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }

-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
--- a/embassy-net-esp-hosted/Cargo.toml
+++ b/embassy-net-esp-hosted/Cargo.toml
@ -8,16 +8,16 @@ defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }

 embassy-time = { version = "0.1.5", path = "../embassy-time" }
-embassy-sync = { version = "0.4.0", path = "../embassy-sync"}
+embassy-sync = { version = "0.3.0", path = "../embassy-sync"}
 embassy-futures = { version = "0.1.0", path = "../embassy-futures"}
 embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel"}

 embedded-hal = { version = "1.0.0-rc.1" }
 embedded-hal-async = { version = "=1.0.0-rc.1" }

-noproto = { git="https://github.com/embassy-rs/noproto", rev = "f5e6d1f325b6ad4e344f60452b09576e24671f62", default-features = false, features = ["derive"] }
+noproto = { git="https://github.com/embassy-rs/noproto", default-features = false, features = ["derive"] }
 #noproto = { version = "0.1", path = "/home/dirbaio/noproto", default-features = false, features = ["derive"] }
-heapless = "0.8"
+heapless = "0.7.16"

 [package.metadata.embassy_docs]
 src_base = "https://github.com/embassy-rs/embassy/blob/embassy-net-esp-hosted-v$VERSION/embassy-net-esp-hosted/src/"
--- a/embassy-net-esp-hosted/src/control.rs
+++ b/embassy-net-esp-hosted/src/control.rs
@ -97,8 +97,8 @@ impl<'a> Control<'a> {

    pub async fn connect(&mut self, ssid: &str, password: &str) -> Result<(), Error> {
        let req = proto::CtrlMsgReqConnectAp {
-            ssid: unwrap!(String::try_from(ssid)),
-            pwd: unwrap!(String::try_from(password)),
+            ssid: String::from(ssid),
+            pwd: String::from(password),
            bssid: String::new(),
            listen_interval: 3,
            is_wpa3_supported: false,
--- a/embassy-net-ppp/Cargo.toml
+++ b/embassy-net-ppp/Cargo.toml
@ -19,7 +19,7 @@ embedded-io-async = { version = "0.6.0" }
 embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 ppproto = { version = "0.1.2"}
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }

 [package.metadata.embassy_docs]
 src_base = "https://github.com/embassy-rs/embassy/blob/embassy-net-ppp-v$VERSION/embassy-net-ppp/src/"
--- a/embassy-net-wiznet/src/lib.rs
+++ b/embassy-net-wiznet/src/lib.rs
@ -1,6 +1,5 @@
 #![no_std]
 #![feature(async_fn_in_trait)]
-#![allow(stable_features, unknown_lints, async_fn_in_trait)]
 #![doc = include_str!("../README.md")]

 pub mod chip;
--- a/embassy-net/CHANGELOG.md
+++ b/embassy-net/CHANGELOG.md
@ -5,17 +5,6 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).

-## Unreleased
-
- Avoid never resolving `TcpIo::read` when the output buffer is empty.
- Update to `smoltcp` git.
- Forward constants from `smoltcp` in DNS query results so changing DNS result size in `smoltcp` properly propagates.
-
-## 0.2.1 - 2023-10-31
-
- Re-add impl_trait_projections
- Fix: Reset DHCP socket when the link up is detected 
-
 ## 0.2.0 - 2023-10-18

 - Re-export `smoltcp::wire::IpEndpoint`
--- a/embassy-net/Cargo.toml
+++ b/embassy-net/Cargo.toml
@ -1,6 +1,6 @@
 [package]
 name = "embassy-net"
-version = "0.2.1"
+version = "0.2.0"
 edition = "2021"
 license = "MIT OR Apache-2.0"
 description = "Async TCP/IP network stack for embedded systems"
@ -25,7 +25,7 @@ features = ["nightly", "defmt", "tcp", "udp", "dns", "dhcpv4", "proto-ipv6", "me
 default = []
 std = []

-defmt = ["dep:defmt", "smoltcp/defmt", "embassy-net-driver/defmt", "heapless/defmt-03"]
+defmt = ["dep:defmt", "smoltcp/defmt", "embassy-net-driver/defmt"]

 nightly = ["dep:embedded-io-async", "dep:embedded-nal-async"]

@ -46,21 +46,21 @@ igmp = ["smoltcp/proto-igmp"]
 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }

-smoltcp = { git = "https://github.com/smoltcp-rs/smoltcp.git", rev = "b57e2f9e70e82a13f31d5ea17e55232c11cc2b2d", default-features = false, features = [
+smoltcp = { version = "0.10.0", default-features = false, features = [
  "socket",
  "async",
 ] }

 embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
 embassy-time = { version = "0.1.5", path = "../embassy-time" }
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embedded-io-async = { version = "0.6.0", optional = true }

 managed = { version = "0.8.0", default-features = false, features = [ "map" ] }
-heapless = { version = "0.8", default-features = false }
+heapless = { version = "0.7.5", default-features = false }
 as-slice = "0.2.1"
 generic-array = { version = "0.14.4", default-features = false }
 stable_deref_trait = { version = "1.2.0", default-features = false }
 futures = { version = "0.3.17", default-features = false, features = [ "async-await" ] }
 atomic-pool = "1.0"
-embedded-nal-async = { version = "0.7", optional = true }
+embedded-nal-async = { version = "0.6.0", optional = true }
--- a/embassy-net/README.md
+++ b/embassy-net/README.md
@ -4,7 +4,7 @@

 It builds on [`smoltcp`](https://github.com/smoltcp-rs/smoltcp). It provides a higher-level and more opinionated
 API. It glues together the components provided by `smoltcp`, handling the low-level details with defaults and
-memory management designed to work well for embedded systems, aiming for a more "Just Works" experience.
+memory management designed to work well for embedded systems, aiiming for a more "Just Works" experience.

 ## Features

--- a/embassy-net/src/dns.rs
+++ b/embassy-net/src/dns.rs
@ -63,11 +63,7 @@ where
    }

    /// Make a query for a given name and return the corresponding IP addresses.
-    pub async fn query(
-        &self,
-        name: &str,
-        qtype: DnsQueryType,
-    ) -> Result<Vec<IpAddress, { smoltcp::config::DNS_MAX_RESULT_COUNT }>, Error> {
+    pub async fn query(&self, name: &str, qtype: DnsQueryType) -> Result<Vec<IpAddress, 1>, Error> {
        self.stack.dns_query(name, qtype).await
    }
 }
@ -105,8 +101,7 @@ where
    async fn get_host_by_address(
        &self,
        _addr: embedded_nal_async::IpAddr,
-        _result: &mut [u8],
-    ) -> Result<usize, Self::Error> {
+    ) -> Result<heapless::String<256>, Self::Error> {
        todo!()
    }
 }
--- a/embassy-net/src/lib.rs
+++ b/embassy-net/src/lib.rs
@ -1,6 +1,5 @@
 #![cfg_attr(not(feature = "std"), no_std)]
-#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections))]
-#![cfg_attr(feature = "nightly", allow(stable_features, unknown_lints, async_fn_in_trait))]
+#![cfg_attr(feature = "nightly", feature(async_fn_in_trait))]
 #![warn(missing_docs)]
 #![doc = include_str!("../README.md")]

@ -494,11 +493,7 @@ impl<D: Driver> Stack<D> {

    /// Make a query for a given name and return the corresponding IP addresses.
    #[cfg(feature = "dns")]
-    pub async fn dns_query(
-        &self,
-        name: &str,
-        qtype: dns::DnsQueryType,
-    ) -> Result<Vec<IpAddress, { smoltcp::config::DNS_MAX_RESULT_COUNT }>, dns::Error> {
+    pub async fn dns_query(&self, name: &str, qtype: dns::DnsQueryType) -> Result<Vec<IpAddress, 1>, dns::Error> {
        // For A and AAAA queries we try detect whether `name` is just an IP address
        match qtype {
            #[cfg(feature = "proto-ipv4")]
--- a/embassy-net/src/tcp.rs
+++ b/embassy-net/src/tcp.rs
@ -390,13 +390,6 @@ impl<'d> TcpIo<'d> {
            // CAUTION: smoltcp semantics around EOF are different to what you'd expect
            // from posix-like IO, so we have to tweak things here.
            self.with_mut(|s, _| match s.recv_slice(buf) {
-                // Reading into empty buffer
-                Ok(0) if buf.is_empty() => {
-                    // embedded_io_async::Read's contract is to not block if buf is empty. While
-                    // this function is not a direct implementor of the trait method, we still don't
-                    // want our future to never resolve.
-                    Poll::Ready(Ok(0))
-                }
                // No data ready
                Ok(0) => {
                    s.register_recv_waker(cx.waker());
@ -618,7 +611,10 @@ pub mod client {
        async fn connect<'a>(
            &'a self,
            remote: embedded_nal_async::SocketAddr,
-        ) -> Result<Self::Connection<'a>, Self::Error> {
+        ) -> Result<Self::Connection<'a>, Self::Error>
+        where
+            Self: 'a,
+        {
            let addr: crate::IpAddress = match remote.ip() {
                #[cfg(feature = "proto-ipv4")]
                IpAddr::V4(addr) => crate::IpAddress::Ipv4(crate::Ipv4Address::from_bytes(&addr.octets())),
--- a/embassy-nrf/Cargo.toml
+++ b/embassy-nrf/Cargo.toml
@ -95,7 +95,7 @@ _nrf52832_anomaly_109 = []

 [dependencies]
 embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-3"] }
 embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" }
 embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver", optional=true }
@ -110,6 +110,7 @@ defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
 cortex-m-rt = ">=0.6.15,<0.8"
 cortex-m = "0.7.6"
+futures = { version = "0.3.17", default-features = false }
 critical-section = "1.1"
 rand_core = "0.6.3"
 fixed = "1.10.0"
--- a/embassy-nrf/src/buffered_uarte.rs
+++ b/embassy-nrf/src/buffered_uarte.rs
@ -12,7 +12,7 @@ use core::cmp::min;
 use core::future::poll_fn;
 use core::marker::PhantomData;
 use core::slice;
-use core::sync::atomic::{compiler_fence, AtomicBool, AtomicU8, AtomicUsize, Ordering};
+use core::sync::atomic::{compiler_fence, AtomicU8, AtomicUsize, Ordering};
 use core::task::Poll;

 use embassy_hal_internal::atomic_ring_buffer::RingBuffer;
@ -41,9 +41,7 @@ mod sealed {

        pub rx_waker: AtomicWaker,
        pub rx_buf: RingBuffer,
-        pub rx_started: AtomicBool,
-        pub rx_started_count: AtomicU8,
-        pub rx_ended_count: AtomicU8,
+        pub rx_bufs: AtomicU8,
        pub rx_ppi_ch: AtomicU8,
    }
 }
@ -67,9 +65,7 @@ impl State {

            rx_waker: AtomicWaker::new(),
            rx_buf: RingBuffer::new(),
-            rx_started: AtomicBool::new(false),
-            rx_started_count: AtomicU8::new(0),
-            rx_ended_count: AtomicU8::new(0),
+            rx_bufs: AtomicU8::new(0),
            rx_ppi_ch: AtomicU8::new(0),
        }
    }
@ -108,20 +104,28 @@ impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for Interrupt
            s.rx_waker.wake();
        }

-        if r.events_endrx.read().bits() != 0 {
-            //trace!("  irq_rx: endrx");
-            r.events_endrx.reset();
+        // If not RXing, start.
+        if s.rx_bufs.load(Ordering::Relaxed) == 0 {
+            let (ptr, len) = rx.push_buf();
+            if len >= half_len {
+                //trace!("  irq_rx: starting {:?}", half_len);
+                s.rx_bufs.store(1, Ordering::Relaxed);

-            let val = s.rx_ended_count.load(Ordering::Relaxed);
-            s.rx_ended_count.store(val.wrapping_add(1), Ordering::Relaxed);
+                // Set up the DMA read
+                r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
+                r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(half_len as _) });
+
+                // Start UARTE Receive transaction
+                r.tasks_startrx.write(|w| unsafe { w.bits(1) });
+                rx.push_done(half_len);
+                r.intenset.write(|w| w.rxstarted().set());
+            }
        }

-        if r.events_rxstarted.read().bits() != 0 || !s.rx_started.load(Ordering::Relaxed) {
+        if r.events_rxstarted.read().bits() != 0 {
            //trace!("  irq_rx: rxstarted");
            let (ptr, len) = rx.push_buf();
            if len >= half_len {
-                r.events_rxstarted.reset();
-
                //trace!("  irq_rx: starting second {:?}", half_len);

                // Set up the DMA read
@ -130,50 +134,11 @@ impl<U: UarteInstance> interrupt::typelevel::Handler<U::Interrupt> for Interrupt

                let chn = s.rx_ppi_ch.load(Ordering::Relaxed);

-                // Enable endrx -> startrx PPI channel.
-                // From this point on, if endrx happens, startrx is automatically fired.
                ppi::regs().chenset.write(|w| unsafe { w.bits(1 << chn) });

-                // It is possible that endrx happened BEFORE enabling the PPI. In this case
-                // the PPI channel doesn't trigger, and we'd hang. We have to detect this
-                // and manually start.
-
-                // check again in case endrx has happened between the last check and now.
-                if r.events_endrx.read().bits() != 0 {
-                    //trace!("  irq_rx: endrx");
-                    r.events_endrx.reset();
-
-                    let val = s.rx_ended_count.load(Ordering::Relaxed);
-                    s.rx_ended_count.store(val.wrapping_add(1), Ordering::Relaxed);
-                }
-
-                let rx_ended = s.rx_ended_count.load(Ordering::Relaxed);
-                let rx_started = s.rx_started_count.load(Ordering::Relaxed);
-
-                // If we started the same amount of transfers as ended, the last rxend has
-                // already occured.
-                let rxend_happened = rx_started == rx_ended;
-
-                // Check if the PPI channel is still enabled. The PPI channel disables itself
-                // when it fires, so if it's still enabled it hasn't fired.
-                let ppi_ch_enabled = ppi::regs().chen.read().bits() & (1 << chn) != 0;
-
-                // if rxend happened, and the ppi channel hasn't fired yet, the rxend got missed.
-                // this condition also naturally matches if `!started`, needed to kickstart the DMA.
-                if rxend_happened && ppi_ch_enabled {
-                    //trace!("manually starting.");
-
-                    // disable the ppi ch, it's of no use anymore.
-                    ppi::regs().chenclr.write(|w| unsafe { w.bits(1 << chn) });
-
-                    // manually start
-                    r.tasks_startrx.write(|w| unsafe { w.bits(1) });
-                }
-
                rx.push_done(half_len);

-                s.rx_started_count.store(rx_started.wrapping_add(1), Ordering::Relaxed);
-                s.rx_started.store(true, Ordering::Relaxed);
+                r.events_rxstarted.reset();
            } else {
                //trace!("  irq_rx: rxstarted no buf");
                r.intenclr.write(|w| w.rxstarted().clear());
@ -317,8 +282,6 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {

        let r = U::regs();

-        let hwfc = cts.is_some();
-
        rxd.conf().write(|w| w.input().connect().drive().h0h1());
        r.psel.rxd.write(|w| unsafe { w.bits(rxd.psel_bits()) });

@ -340,8 +303,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
        // Initialize state
        let s = U::buffered_state();
        s.tx_count.store(0, Ordering::Relaxed);
-        s.rx_started_count.store(0, Ordering::Relaxed);
-        s.rx_ended_count.store(0, Ordering::Relaxed);
+        s.rx_bufs.store(0, Ordering::Relaxed);
        let len = tx_buffer.len();
        unsafe { s.tx_buf.init(tx_buffer.as_mut_ptr(), len) };
        let len = rx_buffer.len();
@ -349,7 +311,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {

        // Configure
        r.config.write(|w| {
-            w.hwfc().bit(hwfc);
+            w.hwfc().bit(false);
            w.parity().variant(config.parity);
            w
        });
@ -371,7 +333,6 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
            w.endtx().set();
            w.rxstarted().set();
            w.error().set();
-            w.endrx().set();
            w
        });

--- a/embassy-nrf/src/lib.rs
+++ b/embassy-nrf/src/lib.rs
@ -1,6 +1,5 @@
 #![no_std]
-#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections))]
-#![cfg_attr(feature = "nightly", allow(stable_features, unknown_lints, async_fn_in_trait))]
+#![cfg_attr(feature = "nightly", feature(async_fn_in_trait))]
 #![doc = include_str!("../README.md")]
 #![warn(missing_docs)]

--- a/embassy-nrf/src/pdm.rs
+++ b/embassy-nrf/src/pdm.rs
@ -2,7 +2,6 @@

 #![macro_use]

-use core::future::poll_fn;
 use core::marker::PhantomData;
 use core::sync::atomic::{compiler_fence, Ordering};
 use core::task::Poll;
@ -10,6 +9,7 @@ use core::task::Poll;
 use embassy_hal_internal::drop::OnDrop;
 use embassy_hal_internal::{into_ref, PeripheralRef};
 use fixed::types::I7F1;
+use futures::future::poll_fn;

 use crate::chip::EASY_DMA_SIZE;
 use crate::gpio::sealed::Pin;
--- a/embassy-rp/Cargo.toml
+++ b/embassy-rp/Cargo.toml
@ -59,7 +59,7 @@ nightly = ["embedded-hal-1", "embedded-hal-async", "embedded-storage-async", "em
 unstable-traits = ["embedded-hal-1", "embedded-hal-nb"]

 [dependencies]
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-time = { version = "0.1.5", path = "../embassy-time", features = [ "tick-hz-1_000_000" ] }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-2"] }
@ -94,5 +94,5 @@ pio = {version= "0.2.1" }
 rp2040-boot2 = "0.3"

 [dev-dependencies]
-embassy-executor = { version = "0.3.3", path = "../embassy-executor", features = ["nightly", "arch-std", "executor-thread"] }
-static_cell = { version = "2" }
+embassy-executor = { version = "0.3.0", path = "../embassy-executor", features = ["nightly", "arch-std", "executor-thread"] }
+static_cell = "1.1"
--- a/embassy-rp/src/lib.rs
+++ b/embassy-rp/src/lib.rs
@ -1,6 +1,5 @@
 #![no_std]
-#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections))]
-#![cfg_attr(feature = "nightly", allow(stable_features, unknown_lints, async_fn_in_trait))]
+#![cfg_attr(feature = "nightly", feature(async_fn_in_trait))]

 // This mod MUST go first, so that the others see its macros.
 pub(crate) mod fmt;
--- a/embassy-stm32-wpan/Cargo.toml
+++ b/embassy-stm32-wpan/Cargo.toml
@ -12,7 +12,7 @@ features = ["stm32wb55rg"]

 [dependencies]
 embassy-stm32 = { version = "0.1.0", path = "../embassy-stm32" }
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 embassy-hal-internal = { version = "0.1.0", path = "../embassy-hal-internal" }
@ -21,7 +21,7 @@ embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver", option

 defmt = { version = "0.3", optional = true }
 cortex-m = "0.7.6"
-heapless = "0.8"
+heapless = "0.7.16"
 aligned = "0.4.1"

 bit_field = "0.10.2"
--- a/embassy-stm32-wpan/src/lib.rs
+++ b/embassy-stm32-wpan/src/lib.rs
@ -1,9 +1,5 @@
 #![no_std]
 #![cfg_attr(any(feature = "ble", feature = "mac"), feature(async_fn_in_trait))]
-#![cfg_attr(
-    any(feature = "ble", feature = "mac"),
-    allow(stable_features, unknown_lints, async_fn_in_trait)
-)]
 #![cfg_attr(feature = "mac", feature(type_alias_impl_trait, concat_bytes))]

 // This must go FIRST so that all the other modules see its macros.
--- a/embassy-stm32-wpan/src/mac/driver.rs
+++ b/embassy-stm32-wpan/src/mac/driver.rs
@ -1,3 +1,4 @@
+#![allow(incomplete_features)]
 #![deny(unused_must_use)]

 use core::task::Context;
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@ -18,7 +18,7 @@ flavors = [
    { regex_feature = "stm32f7.*", target = "thumbv7em-none-eabi" },
    { regex_feature = "stm32c0.*", target = "thumbv6m-none-eabi" },
    { regex_feature = "stm32g0.*", target = "thumbv6m-none-eabi" },
-    { regex_feature = "stm32g4.*", target = "thumbv7em-none-eabi", features = ["low-power"] },
+    { regex_feature = "stm32g4.*", target = "thumbv7em-none-eabi" },
    { regex_feature = "stm32h5.*", target = "thumbv8m.main-none-eabihf" },
    { regex_feature = "stm32h7.*", target = "thumbv7em-none-eabi" },
    { regex_feature = "stm32l0.*", target = "thumbv6m-none-eabi", features = ["low-power"] },
@ -32,14 +32,14 @@ flavors = [
 ]

 [dependencies]
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-time = { version = "0.1.5", path = "../embassy-time", optional = true }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 embassy-hal-internal = {version = "0.1.0", path = "../embassy-hal-internal", features = ["cortex-m", "prio-bits-4"] }
 embassy-embedded-hal = {version = "0.1.0", path = "../embassy-embedded-hal" }
 embassy-net-driver = { version = "0.2.0", path = "../embassy-net-driver" }
 embassy-usb-driver = {version = "0.1.0", path = "../embassy-usb-driver", optional = true }
-embassy-executor = { version = "0.3.3", path = "../embassy-executor", optional = true }
+embassy-executor = { version = "0.3.0", path = "../embassy-executor", optional = true }

 embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
 embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-rc.1", optional = true}
@ -58,7 +58,7 @@ rand_core = "0.6.3"
 sdio-host = "0.5.0"
 embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
 critical-section = "1.1"
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f6d1ffc1a25f208b5cd6b1024bff246592da1949" }
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-bcc9b6bf9fa195e91625849efc4ba473d9ace4e9" }
 vcell = "0.1.3"
 bxcan = "0.7.0"
 nb = "1.0.0"
@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] }
 [build-dependencies]
 proc-macro2 = "1.0.36"
 quote = "1.0.15"
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-f6d1ffc1a25f208b5cd6b1024bff246592da1949", default-features = false, features = ["metadata"]}
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-bcc9b6bf9fa195e91625849efc4ba473d9ace4e9", default-features = false, features = ["metadata"]}


 [features]
@ -90,7 +90,6 @@ defmt = ["dep:defmt", "bxcan/unstable-defmt", "embassy-sync/defmt", "embassy-emb

 exti = []
 low-power = [ "dep:embassy-executor", "embassy-executor/arch-cortex-m" ]
-low-power-debug-with-sleep = []
 embassy-executor = []

 ## Automatically generate `memory.x` file using [`stm32-metapac`](https://docs.rs/stm32-metapac/)
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@ -6,7 +6,7 @@ use std::{env, fs};
 use proc_macro2::{Ident, TokenStream};
 use quote::{format_ident, quote};
 use stm32_metapac::metadata::ir::{BlockItemInner, Enum, FieldSet};
-use stm32_metapac::metadata::{MemoryRegionKind, PeripheralRccRegister, StopMode, METADATA};
+use stm32_metapac::metadata::{MemoryRegionKind, PeripheralRccRegister, METADATA};

 fn main() {
    let target = env::var("TARGET").unwrap();
@ -556,31 +556,6 @@ fn main() {
                },
            };

-            /*
-                A refcount leak can result if the same field is shared by peripherals with different stop modes
-
-                This condition should be checked in stm32-data
-            */
-            let stop_refcount = match rcc.stop_mode {
-                StopMode::Standby => None,
-                StopMode::Stop2 => Some(quote! { REFCOUNT_STOP2 }),
-                StopMode::Stop1 => Some(quote! { REFCOUNT_STOP1 }),
-            };
-
-            let (incr_stop_refcount, decr_stop_refcount) = match stop_refcount {
-                Some(stop_refcount) => (
-                    quote! {
-                        #[cfg(feature = "low-power")]
-                        unsafe { crate::rcc::#stop_refcount += 1 };
-                    },
-                    quote! {
-                        #[cfg(feature = "low-power")]
-                        unsafe { crate::rcc::#stop_refcount -= 1 };
-                    },
-                ),
-                None => (TokenStream::new(), TokenStream::new()),
-            };
-
            g.extend(quote! {
                impl crate::rcc::sealed::RccPeripheral for peripherals::#pname {
                    fn frequency() -> crate::time::Hertz {
@ -588,7 +563,8 @@ fn main() {
                    }
                    fn enable_and_reset_with_cs(_cs: critical_section::CriticalSection) {
                        #before_enable
-                        #incr_stop_refcount
+                        #[cfg(feature = "low-power")]
+                        unsafe { crate::rcc::REFCOUNT_STOP2 += 1 };
                        crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(true));
                        #after_enable
                        #rst
@ -596,7 +572,8 @@ fn main() {
                    fn disable_with_cs(_cs: critical_section::CriticalSection) {
                        #before_disable
                        crate::pac::RCC.#en_reg().modify(|w| w.#set_en_field(false));
-                        #decr_stop_refcount
+                        #[cfg(feature = "low-power")]
+                        unsafe { crate::rcc::REFCOUNT_STOP2 -= 1 };
                    }
                }

@ -827,7 +804,7 @@ fn main() {
        (("fmc", "NCE"), quote!(crate::fmc::NCEPin)),
        (("fmc", "NOE"), quote!(crate::fmc::NOEPin)),
        (("fmc", "NWE"), quote!(crate::fmc::NWEPin)),
-        (("fmc", "CLK"), quote!(crate::fmc::ClkPin)),
+        (("fmc", "Clk"), quote!(crate::fmc::ClkPin)),
        (("fmc", "BA0"), quote!(crate::fmc::BA0Pin)),
        (("fmc", "BA1"), quote!(crate::fmc::BA1Pin)),
        (("timer", "CH1"), quote!(crate::timer::Channel1Pin)),
@ -943,23 +920,17 @@ fn main() {
                }

                if regs.kind == "opamp" {
-                    if pin.signal.starts_with("VP") {
-                        // Impl NonInvertingPin for the VP* signals (VP0, VP1, VP2, etc)
-                        let peri = format_ident!("{}", p.name);
-                        let pin_name = format_ident!("{}", pin.pin);
-                        let ch: u8 = pin.signal.strip_prefix("VP").unwrap().parse().unwrap();
-
-                        g.extend(quote! {
-                            impl_opamp_vp_pin!( #peri, #pin_name, #ch);
-                        })
-                    } else if pin.signal == "VOUT" {
-                        // Impl OutputPin for the VOUT pin
-                        let peri = format_ident!("{}", p.name);
-                        let pin_name = format_ident!("{}", pin.pin);
-                        g.extend(quote! {
-                            impl_opamp_vout_pin!( #peri, #pin_name );
-                        })
+                    if !pin.signal.starts_with("VP") {
+                        continue;
                    }
+
+                    let peri = format_ident!("{}", p.name);
+                    let pin_name = format_ident!("{}", pin.pin);
+                    let ch: u8 = pin.signal.strip_prefix("VP").unwrap().parse().unwrap();
+
+                    g.extend(quote! {
+                        impl_opamp_pin!( #peri, #pin_name, #ch);
+                    })
                }

                // DAC is special
@ -1137,23 +1108,6 @@ fn main() {
        }
    }

-    // ========
-    // Write peripheral_interrupts module.
-    let mut mt = TokenStream::new();
-    for p in METADATA.peripherals {
-        let mut pt = TokenStream::new();
-
-        for irq in p.interrupts {
-            let iname = format_ident!("{}", irq.interrupt);
-            let sname = format_ident!("{}", irq.signal);
-            pt.extend(quote!(pub type #sname = crate::interrupt::typelevel::#iname;));
-        }
-
-        let pname = format_ident!("{}", p.name);
-        mt.extend(quote!(pub mod #pname { #pt }));
-    }
-    g.extend(quote!(#[allow(non_camel_case_types)] pub mod peripheral_interrupts { #mt }));
-
    // ========
    // Write foreach_foo! macrotables

@ -1312,9 +1266,6 @@ fn main() {

    let mut m = String::new();

-    // DO NOT ADD more macros like these.
-    // These turned to be a bad idea!
-    // Instead, make build.rs generate the final code.
    make_table(&mut m, "foreach_flash_region", &flash_regions_table);
    make_table(&mut m, "foreach_interrupt", &interrupts_table);
    make_table(&mut m, "foreach_peripheral", &peripherals_table);
--- a/embassy-stm32/src/dma/gpdma.rs
+++ b/embassy-stm32/src/dma/gpdma.rs
@ -299,15 +299,19 @@ impl<'a, C: Channel> Transfer<'a, C> {

    pub fn request_stop(&mut self) {
        let ch = self.channel.regs().ch(self.channel.num());
-        ch.cr().modify(|w| {
-            w.set_susp(true);
+
+        // Disable the channel. Keep the IEs enabled so the irqs still fire.
+        ch.cr().write(|w| {
+            w.set_tcie(true);
+            w.set_useie(true);
+            w.set_dteie(true);
+            w.set_suspie(true);
        })
    }

    pub fn is_running(&mut self) -> bool {
        let ch = self.channel.regs().ch(self.channel.num());
-        let sr = ch.sr().read();
-        !sr.tcf() && !sr.suspf()
+        !ch.sr().read().tcf()
    }

    /// Gets the total remaining transfers for the channel
--- a/embassy-stm32/src/eth/v2/descriptors.rs
+++ b/embassy-stm32/src/eth/v2/descriptors.rs
@ -119,11 +119,13 @@ impl<'a> TDesRing<'a> {
        // "Preceding reads and writes cannot be moved past subsequent writes."
        fence(Ordering::Release);

-        // signal DMA it can try again.
-        // See issue #2129
-        ETH.ethernet_dma().dmactx_dtpr().write(|w| w.0 = &td as *const _ as u32);
+        self.index = self.index + 1;
+        if self.index == self.descriptors.len() {
+            self.index = 0;
+        }

-        self.index = (self.index + 1) % self.descriptors.len();
+        // signal DMA it can try again.
+        ETH.ethernet_dma().dmactx_dtpr().write(|w| w.0 = 0)
    }
 }

@ -235,19 +237,21 @@ impl<'a> RDesRing<'a> {

    /// Pop the packet previously returned by `available`.
    pub(crate) fn pop_packet(&mut self) {
-        let rd = &mut self.descriptors[self.index];
-        assert!(rd.available());
+        let descriptor = &mut self.descriptors[self.index];
+        assert!(descriptor.available());

-        rd.set_ready(self.buffers[self.index].0.as_mut_ptr());
+        self.descriptors[self.index].set_ready(self.buffers[self.index].0.as_mut_ptr());

        // "Preceding reads and writes cannot be moved past subsequent writes."
        fence(Ordering::Release);

        // signal DMA it can try again.
-        // See issue #2129
-        ETH.ethernet_dma().dmacrx_dtpr().write(|w| w.0 = &rd as *const _ as u32);
+        ETH.ethernet_dma().dmacrx_dtpr().write(|w| w.0 = 0);

        // Increment index.
-        self.index = (self.index + 1) % self.descriptors.len();
+        self.index += 1;
+        if self.index == self.descriptors.len() {
+            self.index = 0
+        }
    }
 }
--- a/embassy-stm32/src/exti.rs
+++ b/embassy-stm32/src/exti.rs
@ -47,9 +47,6 @@ pub unsafe fn on_irq() {
    #[cfg(any(exti_c0, exti_g0, exti_l5, exti_u5, exti_h5, exti_h50))]
    let bits = EXTI.rpr(0).read().0 | EXTI.fpr(0).read().0;

-    // We don't handle or change any EXTI lines above 16.
-    let bits = bits & 0x0000FFFF;
-
    // Mask all the channels that fired.
    cpu_regs().imr(0).modify(|w| w.0 &= !bits);

--- a/embassy-stm32/src/fmc.rs
+++ b/embassy-stm32/src/fmc.rs
@ -12,37 +12,6 @@ pub struct Fmc<'d, T: Instance> {

 unsafe impl<'d, T> Send for Fmc<'d, T> where T: Instance {}

-impl<'d, T> Fmc<'d, T>
-where
-    T: Instance,
-{
-    /// Create a raw FMC instance.
-    ///
-    /// **Note:** This is currently used to provide access to some basic FMC functions
-    /// for manual configuration for memory types that stm32-fmc does not support.
-    pub fn new_raw(_instance: impl Peripheral<P = T> + 'd) -> Self {
-        Self { peri: PhantomData }
-    }
-
-    /// Enable the FMC peripheral and reset it.
-    pub fn enable(&mut self) {
-        T::enable_and_reset();
-    }
-
-    /// Enable the memory controller on applicable chips.
-    pub fn memory_controller_enable(&mut self) {
-        // fmc v1 and v2 does not have the fmcen bit
-        // fsmc v1, v2 and v3 does not have the fmcen bit
-        // This is a "not" because it is expected that all future versions have this bit
-        #[cfg(not(any(fmc_v1x3, fmc_v2x1, fsmc_v1x0, fsmc_v1x3, fsmc_v2x3, fsmc_v3x1)))]
-        T::REGS.bcr1().modify(|r| r.set_fmcen(true));
-    }
-
-    pub fn source_clock_hz(&self) -> u32 {
-        <T as crate::rcc::sealed::RccPeripheral>::frequency().0
-    }
-}
-
 unsafe impl<'d, T> stm32_fmc::FmcPeripheral for Fmc<'d, T>
 where
    T: Instance,
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@ -1,14 +1,11 @@
 #![macro_use]

-use core::marker::PhantomData;
-
 use crate::interrupt;

 #[cfg_attr(i2c_v1, path = "v1.rs")]
 #[cfg_attr(i2c_v2, path = "v2.rs")]
 mod _version;
 pub use _version::*;
-use embassy_sync::waitqueue::AtomicWaker;

 use crate::peripherals;

@ -26,20 +23,6 @@ pub enum Error {

 pub(crate) mod sealed {
    use super::*;
-
-    pub struct State {
-        #[allow(unused)]
-        pub waker: AtomicWaker,
-    }
-
-    impl State {
-        pub const fn new() -> Self {
-            Self {
-                waker: AtomicWaker::new(),
-            }
-        }
-    }
-
    pub trait Instance: crate::rcc::RccPeripheral {
        fn regs() -> crate::pac::i2c::I2c;
        fn state() -> &'static State;
@ -47,8 +30,7 @@ pub(crate) mod sealed {
 }

 pub trait Instance: sealed::Instance + 'static {
-    type EventInterrupt: interrupt::typelevel::Interrupt;
-    type ErrorInterrupt: interrupt::typelevel::Interrupt;
+    type Interrupt: interrupt::typelevel::Interrupt;
 }

 pin_trait!(SclPin, Instance);
@ -56,148 +38,21 @@ pin_trait!(SdaPin, Instance);
 dma_trait!(RxDma, Instance);
 dma_trait!(TxDma, Instance);

-/// Interrupt handler.
-pub struct EventInterruptHandler<T: Instance> {
-    _phantom: PhantomData<T>,
-}
-
-impl<T: Instance> interrupt::typelevel::Handler<T::EventInterrupt> for EventInterruptHandler<T> {
-    unsafe fn on_interrupt() {
-        _version::on_interrupt::<T>()
-    }
-}
-
-pub struct ErrorInterruptHandler<T: Instance> {
-    _phantom: PhantomData<T>,
-}
-
-impl<T: Instance> interrupt::typelevel::Handler<T::ErrorInterrupt> for ErrorInterruptHandler<T> {
-    unsafe fn on_interrupt() {
-        _version::on_interrupt::<T>()
-    }
-}
-
-foreach_peripheral!(
-    (i2c, $inst:ident) => {
+foreach_interrupt!(
+    ($inst:ident, i2c, $block:ident, EV, $irq:ident) => {
        impl sealed::Instance for peripherals::$inst {
            fn regs() -> crate::pac::i2c::I2c {
                crate::pac::$inst
            }

-            fn state() -> &'static sealed::State {
-                static STATE: sealed::State = sealed::State::new();
+            fn state() -> &'static State {
+                static STATE: State = State::new();
                &STATE
            }
        }

        impl Instance for peripherals::$inst {
-            type EventInterrupt = crate::_generated::peripheral_interrupts::$inst::EV;
-            type ErrorInterrupt = crate::_generated::peripheral_interrupts::$inst::ER;
+            type Interrupt = crate::interrupt::typelevel::$irq;
        }
    };
 );
-
-mod eh02 {
-    use super::*;
-
-    impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> {
-        type Error = Error;
-
-        fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_read(address, buffer)
-        }
-    }
-
-    impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> {
-        type Error = Error;
-
-        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.blocking_write(address, write)
-        }
-    }
-
-    impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> {
-        type Error = Error;
-
-        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_write_read(address, write, read)
-        }
-    }
-}
-
-#[cfg(feature = "unstable-traits")]
-mod eh1 {
-    use super::*;
-    use crate::dma::NoDma;
-
-    impl embedded_hal_1::i2c::Error for Error {
-        fn kind(&self) -> embedded_hal_1::i2c::ErrorKind {
-            match *self {
-                Self::Bus => embedded_hal_1::i2c::ErrorKind::Bus,
-                Self::Arbitration => embedded_hal_1::i2c::ErrorKind::ArbitrationLoss,
-                Self::Nack => {
-                    embedded_hal_1::i2c::ErrorKind::NoAcknowledge(embedded_hal_1::i2c::NoAcknowledgeSource::Unknown)
-                }
-                Self::Timeout => embedded_hal_1::i2c::ErrorKind::Other,
-                Self::Crc => embedded_hal_1::i2c::ErrorKind::Other,
-                Self::Overrun => embedded_hal_1::i2c::ErrorKind::Overrun,
-                Self::ZeroLengthTransfer => embedded_hal_1::i2c::ErrorKind::Other,
-            }
-        }
-    }
-
-    impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::ErrorType for I2c<'d, T, TXDMA, RXDMA> {
-        type Error = Error;
-    }
-
-    impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> {
-        fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_read(address, read)
-        }
-
-        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.blocking_write(address, write)
-        }
-
-        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-            self.blocking_write_read(address, write, read)
-        }
-
-        fn transaction(
-            &mut self,
-            _address: u8,
-            _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
-        ) -> Result<(), Self::Error> {
-            todo!();
-        }
-    }
-}
-
-#[cfg(all(feature = "unstable-traits", feature = "nightly", feature = "time"))]
-mod eha {
-    use super::*;
-
-    impl<'d, T: Instance, TXDMA: TxDma<T>, RXDMA: RxDma<T>> embedded_hal_async::i2c::I2c for I2c<'d, T, TXDMA, RXDMA> {
-        async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
-            self.read(address, read).await
-        }
-
-        async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
-            self.write(address, write).await
-        }
-
-        async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-            self.write_read(address, write, read).await
-        }
-
-        async fn transaction(
-            &mut self,
-            address: u8,
-            operations: &mut [embedded_hal_1::i2c::Operation<'_>],
-        ) -> Result<(), Self::Error> {
-            let _ = address;
-            let _ = operations;
-            todo!()
-        }
-    }
-}
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@ -1,33 +1,23 @@
-use core::future::poll_fn;
 use core::marker::PhantomData;
-use core::task::Poll;

 use embassy_embedded_hal::SetConfig;
-use embassy_futures::select::{select, Either};
-use embassy_hal_internal::drop::OnDrop;
 use embassy_hal_internal::{into_ref, PeripheralRef};

-use super::*;
-use crate::dma::{NoDma, Transfer};
+use crate::dma::NoDma;
 use crate::gpio::sealed::AFType;
 use crate::gpio::Pull;
-use crate::interrupt::typelevel::Interrupt;
+use crate::i2c::{Error, Instance, SclPin, SdaPin};
 use crate::pac::i2c;
 use crate::time::Hertz;
 use crate::{interrupt, Peripheral};

-pub unsafe fn on_interrupt<T: Instance>() {
-    let regs = T::regs();
-    // i2c v2 only woke the task on transfer complete interrupts. v1 uses interrupts for a bunch of
-    // other stuff, so we wake the task on every interrupt.
-    T::state().waker.wake();
-    critical_section::with(|_| {
-        // Clear event interrupt flag.
-        regs.cr2().modify(|w| {
-            w.set_itevten(false);
-            w.set_iterren(false);
-        });
-    });
+/// Interrupt handler.
+pub struct InterruptHandler<T: Instance> {
+    _phantom: PhantomData<T>,
+}
+
+impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
+    unsafe fn on_interrupt() {}
 }

 #[non_exhaustive]
@ -37,6 +27,14 @@ pub struct Config {
    pub scl_pullup: bool,
 }

+pub struct State {}
+
+impl State {
+    pub(crate) const fn new() -> Self {
+        Self {}
+    }
+}
+
 pub struct I2c<'d, T: Instance, TXDMA = NoDma, RXDMA = NoDma> {
    phantom: PhantomData<&'d mut T>,
    #[allow(dead_code)]
@ -50,9 +48,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        _peri: impl Peripheral<P = T> + 'd,
        scl: impl Peripheral<P = impl SclPin<T>> + 'd,
        sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
-        _irq: impl interrupt::typelevel::Binding<T::EventInterrupt, EventInterruptHandler<T>>
-            + interrupt::typelevel::Binding<T::ErrorInterrupt, ErrorInterruptHandler<T>>
-            + 'd,
+        _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
        tx_dma: impl Peripheral<P = TXDMA> + 'd,
        rx_dma: impl Peripheral<P = RXDMA> + 'd,
        freq: Hertz,
@ -102,9 +98,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
            reg.set_pe(true);
        });

-        unsafe { T::EventInterrupt::enable() };
-        unsafe { T::ErrorInterrupt::enable() };
-
        Self {
            phantom: PhantomData,
            tx_dma,
@ -112,58 +105,40 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        }
    }

-    fn check_and_clear_error_flags() -> Result<i2c::regs::Sr1, Error> {
+    fn check_and_clear_error_flags(&self) -> Result<i2c::regs::Sr1, Error> {
        // Note that flags should only be cleared once they have been registered. If flags are
        // cleared otherwise, there may be an inherent race condition and flags may be missed.
        let sr1 = T::regs().sr1().read();

        if sr1.timeout() {
-            T::regs().sr1().write(|reg| {
-                reg.0 = !0;
-                reg.set_timeout(false);
-            });
+            T::regs().sr1().modify(|reg| reg.set_timeout(false));
            return Err(Error::Timeout);
        }

        if sr1.pecerr() {
-            T::regs().sr1().write(|reg| {
-                reg.0 = !0;
-                reg.set_pecerr(false);
-            });
+            T::regs().sr1().modify(|reg| reg.set_pecerr(false));
            return Err(Error::Crc);
        }

        if sr1.ovr() {
-            T::regs().sr1().write(|reg| {
-                reg.0 = !0;
-                reg.set_ovr(false);
-            });
+            T::regs().sr1().modify(|reg| reg.set_ovr(false));
            return Err(Error::Overrun);
        }

        if sr1.af() {
-            T::regs().sr1().write(|reg| {
-                reg.0 = !0;
-                reg.set_af(false);
-            });
+            T::regs().sr1().modify(|reg| reg.set_af(false));
            return Err(Error::Nack);
        }

        if sr1.arlo() {
-            T::regs().sr1().write(|reg| {
-                reg.0 = !0;
-                reg.set_arlo(false);
-            });
+            T::regs().sr1().modify(|reg| reg.set_arlo(false));
            return Err(Error::Arbitration);
        }

        // The errata indicates that BERR may be incorrectly detected. It recommends ignoring and
        // clearing the BERR bit instead.
        if sr1.berr() {
-            T::regs().sr1().write(|reg| {
-                reg.0 = !0;
-                reg.set_berr(false);
-            });
+            T::regs().sr1().modify(|reg| reg.set_berr(false));
        }

        Ok(sr1)
@ -182,13 +157,13 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        });

        // Wait until START condition was generated
-        while !Self::check_and_clear_error_flags()?.start() {
+        while !self.check_and_clear_error_flags()?.start() {
            check_timeout()?;
        }

        // Also wait until signalled we're master and everything is waiting for us
        while {
-            Self::check_and_clear_error_flags()?;
+            self.check_and_clear_error_flags()?;

            let sr2 = T::regs().sr2().read();
            !sr2.msl() && !sr2.busy()
@ -202,7 +177,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        // Wait until address was sent
        // Wait for the address to be acknowledged
        // Check for any I2C errors. If a NACK occurs, the ADDR bit will never be set.
-        while !Self::check_and_clear_error_flags()?.addr() {
+        while !self.check_and_clear_error_flags()?.addr() {
            check_timeout()?;
        }

@ -222,7 +197,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        // Wait until we're ready for sending
        while {
            // Check for any I2C errors. If a NACK occurs, the ADDR bit will never be set.
-            !Self::check_and_clear_error_flags()?.txe()
+            !self.check_and_clear_error_flags()?.txe()
        } {
            check_timeout()?;
        }
@ -233,7 +208,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        // Wait until byte is transferred
        while {
            // Check for any potential error conditions.
-            !Self::check_and_clear_error_flags()?.btf()
+            !self.check_and_clear_error_flags()?.btf()
        } {
            check_timeout()?;
        }
@ -244,7 +219,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
    fn recv_byte(&self, check_timeout: impl Fn() -> Result<(), Error>) -> Result<u8, Error> {
        while {
            // Check for any potential error conditions.
-            Self::check_and_clear_error_flags()?;
+            self.check_and_clear_error_flags()?;

            !T::regs().sr1().read().rxne()
        } {
@ -269,7 +244,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
            });

            // Wait until START condition was generated
-            while !Self::check_and_clear_error_flags()?.start() {
+            while !self.check_and_clear_error_flags()?.start() {
                check_timeout()?;
            }

@ -286,7 +261,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {

            // Wait until address was sent
            // Wait for the address to be acknowledged
-            while !Self::check_and_clear_error_flags()?.addr() {
+            while !self.check_and_clear_error_flags()?.addr() {
                check_timeout()?;
            }

@ -361,322 +336,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
    pub fn blocking_write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
        self.blocking_write_read_timeout(addr, write, read, || Ok(()))
    }
-
-    // Async
-
-    #[inline] // pretty sure this should always be inlined
-    fn enable_interrupts() -> () {
-        T::regs().cr2().modify(|w| {
-            w.set_iterren(true);
-            w.set_itevten(true);
-        });
-    }
-
-    pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
-    where
-        TXDMA: crate::i2c::TxDma<T>,
-    {
-        let dma_transfer = unsafe {
-            let regs = T::regs();
-            regs.cr2().modify(|w| {
-                // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 register.
-                w.set_dmaen(true);
-                w.set_itbufen(false);
-            });
-            // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved to this address from the memory after each TxE event.
-            let dst = regs.dr().as_ptr() as *mut u8;
-
-            let ch = &mut self.tx_dma;
-            let request = ch.request();
-            Transfer::new_write(ch, request, write, dst, Default::default())
-        };
-
-        let on_drop = OnDrop::new(|| {
-            let regs = T::regs();
-            regs.cr2().modify(|w| {
-                w.set_dmaen(false);
-                w.set_iterren(false);
-                w.set_itevten(false);
-            })
-        });
-
-        Self::enable_interrupts();
-
-        // Send a START condition
-        T::regs().cr1().modify(|reg| {
-            reg.set_start(true);
-        });
-
-        let state = T::state();
-
-        // Wait until START condition was generated
-        poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            match Self::check_and_clear_error_flags() {
-                Err(e) => Poll::Ready(Err(e)),
-                Ok(sr1) => {
-                    if sr1.start() {
-                        Poll::Ready(Ok(()))
-                    } else {
-                        Poll::Pending
-                    }
-                }
-            }
-        })
-        .await?;
-
-        // Also wait until signalled we're master and everything is waiting for us
-        Self::enable_interrupts();
-        poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            match Self::check_and_clear_error_flags() {
-                Err(e) => Poll::Ready(Err(e)),
-                Ok(_) => {
-                    let sr2 = T::regs().sr2().read();
-                    if !sr2.msl() && !sr2.busy() {
-                        Poll::Pending
-                    } else {
-                        Poll::Ready(Ok(()))
-                    }
-                }
-            }
-        })
-        .await?;
-
-        // Set up current address, we're trying to talk to
-        T::regs().dr().write(|reg| reg.set_dr(address << 1));
-        Self::enable_interrupts();
-
-        poll_fn(|cx| {
-            state.waker.register(cx.waker());
-            match Self::check_and_clear_error_flags() {
-                Err(e) => Poll::Ready(Err(e)),
-                Ok(sr1) => {
-                    if sr1.addr() {
-                        // Clear the ADDR condition by reading SR2.
-                        T::regs().sr2().read();
-                        Poll::Ready(Ok(()))
-                    } else {
-                        Poll::Pending
-                    }
-                }
-            }
-        })
-        .await?;
-
-        Self::enable_interrupts();
-        let poll_error = poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            match Self::check_and_clear_error_flags() {
-                // Unclear why the Err turbofish is necessary here? The compiler didn’t require it in the other
-                // identical poll_fn check_and_clear matches.
-                Err(e) => Poll::Ready(Err::<T, Error>(e)),
-                Ok(_) => Poll::Pending,
-            }
-        });
-
-        // Wait for either the DMA transfer to successfully finish, or an I2C error to occur.
-        match select(dma_transfer, poll_error).await {
-            Either::Second(Err(e)) => Err(e),
-            _ => Ok(()),
-        }?;
-
-        // The I2C transfer itself will take longer than the DMA transfer, so wait for that to finish too.
-
-        // 18.3.8 “Master transmitter: In the interrupt routine after the EOT interrupt, disable DMA
-        // requests then wait for a BTF event before programming the Stop condition.”
-
-        // TODO: If this has to be done “in the interrupt routine after the EOT interrupt”, where to put it?
-        T::regs().cr2().modify(|w| {
-            w.set_dmaen(false);
-        });
-
-        Self::enable_interrupts();
-        poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            match Self::check_and_clear_error_flags() {
-                Err(e) => Poll::Ready(Err(e)),
-                Ok(sr1) => {
-                    if sr1.btf() {
-                        T::regs().cr1().modify(|w| {
-                            w.set_stop(true);
-                        });
-                        Poll::Ready(Ok(()))
-                    } else {
-                        Poll::Pending
-                    }
-                }
-            }
-        })
-        .await?;
-        // Wait for STOP condition to transmit.
-        Self::enable_interrupts();
-        poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            if T::regs().cr1().read().stop() {
-                Poll::Pending
-            } else {
-                Poll::Ready(Ok(()))
-            }
-        })
-        .await?;
-
-        drop(on_drop);
-
-        // Fallthrough is success
-        Ok(())
-    }
-
-    pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
-    where
-        RXDMA: crate::i2c::RxDma<T>,
-    {
-        let state = T::state();
-        let buffer_len = buffer.len();
-
-        let dma_transfer = unsafe {
-            let regs = T::regs();
-            regs.cr2().modify(|w| {
-                // DMA mode can be enabled for transmission by setting the DMAEN bit in the I2C_CR2 register.
-                w.set_itbufen(false);
-                w.set_dmaen(true);
-            });
-            // Set the I2C_DR register address in the DMA_SxPAR register. The data will be moved to this address from the memory after each TxE event.
-            let src = regs.dr().as_ptr() as *mut u8;
-
-            let ch = &mut self.rx_dma;
-            let request = ch.request();
-            Transfer::new_read(ch, request, src, buffer, Default::default())
-        };
-
-        let on_drop = OnDrop::new(|| {
-            let regs = T::regs();
-            regs.cr2().modify(|w| {
-                w.set_dmaen(false);
-                w.set_iterren(false);
-                w.set_itevten(false);
-            })
-        });
-
-        Self::enable_interrupts();
-
-        // Send a START condition and set ACK bit
-        T::regs().cr1().modify(|reg| {
-            reg.set_start(true);
-            reg.set_ack(true);
-        });
-
-        // Wait until START condition was generated
-        poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            match Self::check_and_clear_error_flags() {
-                Err(e) => Poll::Ready(Err(e)),
-                Ok(sr1) => {
-                    if sr1.start() {
-                        Poll::Ready(Ok(()))
-                    } else {
-                        Poll::Pending
-                    }
-                }
-            }
-        })
-        .await?;
-
-        // Also wait until signalled we're master and everything is waiting for us
-        Self::enable_interrupts();
-        poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            // blocking read didn’t have a check_and_clear call here, but blocking write did so
-            // I’m adding it here in case that was an oversight.
-            match Self::check_and_clear_error_flags() {
-                Err(e) => Poll::Ready(Err(e)),
-                Ok(_) => {
-                    let sr2 = T::regs().sr2().read();
-                    if !sr2.msl() && !sr2.busy() {
-                        Poll::Pending
-                    } else {
-                        Poll::Ready(Ok(()))
-                    }
-                }
-            }
-        })
-        .await?;
-
-        // Set up current address, we're trying to talk to
-        T::regs().dr().write(|reg| reg.set_dr((address << 1) + 1));
-
-        // Wait for the address to be acknowledged
-
-        Self::enable_interrupts();
-        poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            match Self::check_and_clear_error_flags() {
-                Err(e) => Poll::Ready(Err(e)),
-                Ok(sr1) => {
-                    if sr1.addr() {
-                        // 18.3.8: When a single byte must be received: the NACK must be programmed during EV6
-                        // event, i.e. program ACK=0 when ADDR=1, before clearing ADDR flag. Then the
-                        // user can program the STOP condition either after clearing ADDR flag, or in the
-                        // DMA Transfer Complete interrupt routine.
-                        if buffer_len == 1 {
-                            T::regs().cr1().modify(|w| {
-                                w.set_ack(false);
-                            });
-                        }
-                        Poll::Ready(Ok(()))
-                    } else {
-                        Poll::Pending
-                    }
-                }
-            }
-        })
-        .await?;
-
-        // Clear condition by reading SR2
-        T::regs().sr2().read();
-
-        // Wait for bytes to be received, or an error to occur.
-        Self::enable_interrupts();
-        let poll_error = poll_fn(|cx| {
-            state.waker.register(cx.waker());
-
-            match Self::check_and_clear_error_flags() {
-                Err(e) => Poll::Ready(Err::<T, Error>(e)),
-                _ => Poll::Pending,
-            }
-        });
-
-        match select(dma_transfer, poll_error).await {
-            Either::Second(Err(e)) => Err(e),
-            _ => Ok(()),
-        };
-
-        // v1 blocking waits for STOP to be written, the manual says to write the STOP bit yourself.
-        // what to do…
-        // Wait for the STOP to be sent.
-        // while T::regs().cr1().read().stop() {
-        //     check_timeout()?;
-        // }
-
-        // Fallthrough is success
-        Ok(())
-    }
-
-    pub async fn write_read(&mut self, _address: u8, _write: &[u8], _read: &mut [u8]) -> Result<(), Error>
-    where
-        RXDMA: crate::i2c::RxDma<T>,
-        TXDMA: crate::i2c::TxDma<T>,
-    {
-        todo!()
-    }
 }

 impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> {
@ -685,6 +344,77 @@ impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> {
    }
 }

+impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> {
+    type Error = Error;
+
+    fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_read(addr, read)
+    }
+}
+
+impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> {
+    type Error = Error;
+
+    fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
+        self.blocking_write(addr, write)
+    }
+}
+
+impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> {
+    type Error = Error;
+
+    fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_write_read(addr, write, read)
+    }
+}
+
+#[cfg(feature = "unstable-traits")]
+mod eh1 {
+    use super::*;
+
+    impl embedded_hal_1::i2c::Error for Error {
+        fn kind(&self) -> embedded_hal_1::i2c::ErrorKind {
+            match *self {
+                Self::Bus => embedded_hal_1::i2c::ErrorKind::Bus,
+                Self::Arbitration => embedded_hal_1::i2c::ErrorKind::ArbitrationLoss,
+                Self::Nack => {
+                    embedded_hal_1::i2c::ErrorKind::NoAcknowledge(embedded_hal_1::i2c::NoAcknowledgeSource::Unknown)
+                }
+                Self::Timeout => embedded_hal_1::i2c::ErrorKind::Other,
+                Self::Crc => embedded_hal_1::i2c::ErrorKind::Other,
+                Self::Overrun => embedded_hal_1::i2c::ErrorKind::Overrun,
+                Self::ZeroLengthTransfer => embedded_hal_1::i2c::ErrorKind::Other,
+            }
+        }
+    }
+
+    impl<'d, T: Instance> embedded_hal_1::i2c::ErrorType for I2c<'d, T> {
+        type Error = Error;
+    }
+
+    impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T> {
+        fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
+            self.blocking_read(address, read)
+        }
+
+        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
+            self.blocking_write(address, write)
+        }
+
+        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+            self.blocking_write_read(address, write, read)
+        }
+
+        fn transaction(
+            &mut self,
+            _address: u8,
+            _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
+        ) -> Result<(), Self::Error> {
+            todo!();
+        }
+    }
+}
+
 enum Mode {
    Fast,
    Standard,
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@ -1,53 +1,50 @@
 use core::cmp;
+#[cfg(feature = "time")]
 use core::future::poll_fn;
+use core::marker::PhantomData;
+#[cfg(feature = "time")]
 use core::task::Poll;

 use embassy_embedded_hal::SetConfig;
+#[cfg(feature = "time")]
 use embassy_hal_internal::drop::OnDrop;
 use embassy_hal_internal::{into_ref, PeripheralRef};
+use embassy_sync::waitqueue::AtomicWaker;
 #[cfg(feature = "time")]
 use embassy_time::{Duration, Instant};

-use super::*;
-use crate::dma::{NoDma, Transfer};
+use crate::dma::NoDma;
+#[cfg(feature = "time")]
+use crate::dma::Transfer;
 use crate::gpio::sealed::AFType;
 use crate::gpio::Pull;
+use crate::i2c::{Error, Instance, SclPin, SdaPin};
 use crate::interrupt::typelevel::Interrupt;
 use crate::pac::i2c;
 use crate::time::Hertz;
 use crate::{interrupt, Peripheral};

-#[cfg(feature = "time")]
-fn timeout_fn(timeout: Duration) -> impl Fn() -> Result<(), Error> {
-    let deadline = Instant::now() + timeout;
-    move || {
-        if Instant::now() > deadline {
-            Err(Error::Timeout)
-        } else {
-            Ok(())
+/// Interrupt handler.
+pub struct InterruptHandler<T: Instance> {
+    _phantom: PhantomData<T>,
+}
+
+impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandler<T> {
+    unsafe fn on_interrupt() {
+        let regs = T::regs();
+        let isr = regs.isr().read();
+
+        if isr.tcr() || isr.tc() {
+            T::state().waker.wake();
        }
+        // The flag can only be cleared by writting to nbytes, we won't do that here, so disable
+        // the interrupt
+        critical_section::with(|_| {
+            regs.cr1().modify(|w| w.set_tcie(false));
+        });
    }
 }

-#[cfg(not(feature = "time"))]
-pub fn no_timeout_fn() -> impl Fn() -> Result<(), Error> {
-    move || Ok(())
-}
-
-pub unsafe fn on_interrupt<T: Instance>() {
-    let regs = T::regs();
-    let isr = regs.isr().read();
-
-    if isr.tcr() || isr.tc() {
-        T::state().waker.wake();
-    }
-    // The flag can only be cleared by writting to nbytes, we won't do that here, so disable
-    // the interrupt
-    critical_section::with(|_| {
-        regs.cr1().modify(|w| w.set_tcie(false));
-    });
-}
-
 #[non_exhaustive]
 #[derive(Copy, Clone)]
 pub struct Config {
@ -68,6 +65,18 @@ impl Default for Config {
    }
 }

+pub struct State {
+    waker: AtomicWaker,
+}
+
+impl State {
+    pub(crate) const fn new() -> Self {
+        Self {
+            waker: AtomicWaker::new(),
+        }
+    }
+}
+
 pub struct I2c<'d, T: Instance, TXDMA = NoDma, RXDMA = NoDma> {
    _peri: PeripheralRef<'d, T>,
    #[allow(dead_code)]
@ -83,9 +92,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        peri: impl Peripheral<P = T> + 'd,
        scl: impl Peripheral<P = impl SclPin<T>> + 'd,
        sda: impl Peripheral<P = impl SdaPin<T>> + 'd,
-        _irq: impl interrupt::typelevel::Binding<T::EventInterrupt, EventInterruptHandler<T>>
-            + interrupt::typelevel::Binding<T::ErrorInterrupt, ErrorInterruptHandler<T>>
-            + 'd,
+        _irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
        tx_dma: impl Peripheral<P = TXDMA> + 'd,
        rx_dma: impl Peripheral<P = RXDMA> + 'd,
        freq: Hertz,
@ -131,8 +138,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
            reg.set_pe(true);
        });

-        unsafe { T::EventInterrupt::enable() };
-        unsafe { T::ErrorInterrupt::enable() };
+        T::Interrupt::unpend();
+        unsafe { T::Interrupt::enable() };

        Self {
            _peri: peri,
@ -253,12 +260,21 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
    }

    fn flush_txdr(&self) {
+        //if $i2c.isr.read().txis().bit_is_set() {
+        //$i2c.txdr.write(|w| w.txdata().bits(0));
+        //}
+
        if T::regs().isr().read().txis() {
            T::regs().txdr().write(|w| w.set_txdata(0));
        }
        if !T::regs().isr().read().txe() {
            T::regs().isr().modify(|w| w.set_txe(true))
        }
+
+        // If TXDR is not flagged as empty, write 1 to flush it
+        //if $i2c.isr.read().txe().is_not_empty() {
+        //$i2c.isr.write(|w| w.txe().set_bit());
+        //}
    }

    fn wait_txe(&self, check_timeout: impl Fn() -> Result<(), Error>) -> Result<(), Error> {
@ -421,6 +437,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        result
    }

+    #[cfg(feature = "time")]
    async fn write_dma_internal(
        &mut self,
        address: u8,
@ -511,6 +528,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        Ok(())
    }

+    #[cfg(feature = "time")]
    async fn read_dma_internal(
        &mut self,
        address: u8,
@ -592,38 +610,42 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {

    // =========================
    //  Async public API
+
    #[cfg(feature = "time")]
    pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
+    where
+        TXDMA: crate::i2c::TxDma<T>,
+    {
+        self.write_timeout(address, write, self.timeout).await
+    }
+
+    #[cfg(feature = "time")]
+    pub async fn write_timeout(&mut self, address: u8, write: &[u8], timeout: Duration) -> Result<(), Error>
    where
        TXDMA: crate::i2c::TxDma<T>,
    {
        if write.is_empty() {
-            self.write_internal(address, write, true, timeout_fn(self.timeout))
+            self.write_internal(address, write, true, timeout_fn(timeout))
        } else {
            embassy_time::with_timeout(
-                self.timeout,
-                self.write_dma_internal(address, write, true, true, timeout_fn(self.timeout)),
+                timeout,
+                self.write_dma_internal(address, write, true, true, timeout_fn(timeout)),
            )
            .await
            .unwrap_or(Err(Error::Timeout))
        }
    }

-    #[cfg(not(feature = "time"))]
-    pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
+    #[cfg(feature = "time")]
+    pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
    where
        TXDMA: crate::i2c::TxDma<T>,
    {
-        if write.is_empty() {
-            self.write_internal(address, write, true, no_timeout_fn())
-        } else {
-            self.write_dma_internal(address, write, true, true, no_timeout_fn())
-                .await
-        }
+        self.write_vectored_timeout(address, write, self.timeout).await
    }

    #[cfg(feature = "time")]
-    pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
+    pub async fn write_vectored_timeout(&mut self, address: u8, write: &[&[u8]], timeout: Duration) -> Result<(), Error>
    where
        TXDMA: crate::i2c::TxDma<T>,
    {
@ -639,8 +661,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
            let is_last = next.is_none();

            embassy_time::with_timeout(
-                self.timeout,
-                self.write_dma_internal(address, c, first, is_last, timeout_fn(self.timeout)),
+                timeout,
+                self.write_dma_internal(address, c, first, is_last, timeout_fn(timeout)),
            )
            .await
            .unwrap_or(Err(Error::Timeout))?;
@ -650,79 +672,66 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        Ok(())
    }

-    #[cfg(not(feature = "time"))]
-    pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
-    where
-        TXDMA: crate::i2c::TxDma<T>,
-    {
-        if write.is_empty() {
-            return Err(Error::ZeroLengthTransfer);
-        }
-        let mut iter = write.iter();
-
-        let mut first = true;
-        let mut current = iter.next();
-        while let Some(c) = current {
-            let next = iter.next();
-            let is_last = next.is_none();
-
-            self.write_dma_internal(address, c, first, is_last, no_timeout_fn())
-                .await?;
-            first = false;
-            current = next;
-        }
-        Ok(())
-    }
-
    #[cfg(feature = "time")]
    pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
    where
        RXDMA: crate::i2c::RxDma<T>,
    {
-        if buffer.is_empty() {
-            self.read_internal(address, buffer, false, timeout_fn(self.timeout))
-        } else {
-            embassy_time::with_timeout(
-                self.timeout,
-                self.read_dma_internal(address, buffer, false, timeout_fn(self.timeout)),
-            )
-            .await
-            .unwrap_or(Err(Error::Timeout))
-        }
+        self.read_timeout(address, buffer, self.timeout).await
    }

-    #[cfg(not(feature = "time"))]
-    pub async fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error>
+    #[cfg(feature = "time")]
+    pub async fn read_timeout(&mut self, address: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error>
    where
        RXDMA: crate::i2c::RxDma<T>,
    {
        if buffer.is_empty() {
-            self.read_internal(address, buffer, false, no_timeout_fn())
+            self.read_internal(address, buffer, false, timeout_fn(timeout))
        } else {
-            self.read_dma_internal(address, buffer, false, no_timeout_fn()).await
+            embassy_time::with_timeout(
+                timeout,
+                self.read_dma_internal(address, buffer, false, timeout_fn(timeout)),
+            )
+            .await
+            .unwrap_or(Err(Error::Timeout))
        }
    }

    #[cfg(feature = "time")]
    pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
+    where
+        TXDMA: super::TxDma<T>,
+        RXDMA: super::RxDma<T>,
+    {
+        self.write_read_timeout(address, write, read, self.timeout).await
+    }
+
+    #[cfg(feature = "time")]
+    pub async fn write_read_timeout(
+        &mut self,
+        address: u8,
+        write: &[u8],
+        read: &mut [u8],
+        timeout: Duration,
+    ) -> Result<(), Error>
    where
        TXDMA: super::TxDma<T>,
        RXDMA: super::RxDma<T>,
    {
        let start_instant = Instant::now();
-        let check_timeout = timeout_fn(self.timeout);
+        let check_timeout = timeout_fn(timeout);
        if write.is_empty() {
            self.write_internal(address, write, false, &check_timeout)?;
        } else {
            embassy_time::with_timeout(
-                self.timeout,
+                timeout,
                self.write_dma_internal(address, write, true, true, &check_timeout),
            )
            .await
            .unwrap_or(Err(Error::Timeout))?;
        }

-        let time_left_until_timeout = self.timeout - Instant::now().duration_since(start_instant);
+        let time_left_until_timeout = timeout - Instant::now().duration_since(start_instant);

        if read.is_empty() {
            self.read_internal(address, read, true, &check_timeout)?;
@ -738,28 +747,6 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
        Ok(())
    }

-    #[cfg(not(feature = "time"))]
-    pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
-    where
-        TXDMA: super::TxDma<T>,
-        RXDMA: super::RxDma<T>,
-    {
-        let no_timeout = no_timeout_fn();
-        if write.is_empty() {
-            self.write_internal(address, write, false, &no_timeout)?;
-        } else {
-            self.write_dma_internal(address, write, true, true, &no_timeout).await?;
-        }
-
-        if read.is_empty() {
-            self.read_internal(address, read, true, &no_timeout)?;
-        } else {
-            self.read_dma_internal(address, read, true, &no_timeout).await?;
-        }
-
-        Ok(())
-    }
-
    // =========================
    //  Blocking public API

@ -968,6 +955,35 @@ impl<'d, T: Instance, TXDMA, RXDMA> Drop for I2c<'d, T, TXDMA, RXDMA> {
    }
 }

+#[cfg(feature = "time")]
+mod eh02 {
+    use super::*;
+
+    impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> {
+        type Error = Error;
+
+        fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+            self.blocking_read(address, buffer)
+        }
+    }
+
+    impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> {
+        type Error = Error;
+
+        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
+            self.blocking_write(address, write)
+        }
+    }
+
+    impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> {
+        type Error = Error;
+
+        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+            self.blocking_write_read(address, write, read)
+        }
+    }
+}
+
 /// I2C Stop Configuration
 ///
 /// Peripheral options for generating the STOP condition
@ -1092,6 +1108,83 @@ impl Timings {
    }
 }

+#[cfg(feature = "unstable-traits")]
+mod eh1 {
+    use super::*;
+
+    impl embedded_hal_1::i2c::Error for Error {
+        fn kind(&self) -> embedded_hal_1::i2c::ErrorKind {
+            match *self {
+                Self::Bus => embedded_hal_1::i2c::ErrorKind::Bus,
+                Self::Arbitration => embedded_hal_1::i2c::ErrorKind::ArbitrationLoss,
+                Self::Nack => {
+                    embedded_hal_1::i2c::ErrorKind::NoAcknowledge(embedded_hal_1::i2c::NoAcknowledgeSource::Unknown)
+                }
+                Self::Timeout => embedded_hal_1::i2c::ErrorKind::Other,
+                Self::Crc => embedded_hal_1::i2c::ErrorKind::Other,
+                Self::Overrun => embedded_hal_1::i2c::ErrorKind::Overrun,
+                Self::ZeroLengthTransfer => embedded_hal_1::i2c::ErrorKind::Other,
+            }
+        }
+    }
+
+    impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::ErrorType for I2c<'d, T, TXDMA, RXDMA> {
+        type Error = Error;
+    }
+
+    impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> {
+        fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
+            self.blocking_read(address, read)
+        }
+
+        fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
+            self.blocking_write(address, write)
+        }
+
+        fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+            self.blocking_write_read(address, write, read)
+        }
+
+        fn transaction(
+            &mut self,
+            _address: u8,
+            _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
+        ) -> Result<(), Self::Error> {
+            todo!();
+        }
+    }
+}
+
+#[cfg(all(feature = "unstable-traits", feature = "nightly", feature = "time"))]
+mod eha {
+    use super::super::{RxDma, TxDma};
+    use super::*;
+
+    impl<'d, T: Instance, TXDMA: TxDma<T>, RXDMA: RxDma<T>> embedded_hal_async::i2c::I2c for I2c<'d, T, TXDMA, RXDMA> {
+        async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
+            self.read(address, read).await
+        }
+
+        async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
+            self.write(address, write).await
+        }
+
+        async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+            self.write_read(address, write, read).await
+        }
+
+        async fn transaction(
+            &mut self,
+            address: u8,
+            operations: &mut [embedded_hal_1::i2c::Operation<'_>],
+        ) -> Result<(), Self::Error> {
+            let _ = address;
+            let _ = operations;
+            todo!()
+        }
+    }
+}
+
 impl<'d, T: Instance> SetConfig for I2c<'d, T> {
    type Config = Hertz;
    type ConfigError = ();
@ -1108,3 +1201,15 @@ impl<'d, T: Instance> SetConfig for I2c<'d, T> {
        Ok(())
    }
 }
+
+#[cfg(feature = "time")]
+fn timeout_fn(timeout: Duration) -> impl Fn() -> Result<(), Error> {
+    let deadline = Instant::now() + timeout;
+    move || {
+        if Instant::now() > deadline {
+            Err(Error::Timeout)
+        } else {
+            Ok(())
+        }
+    }
+}
--- a/embassy-stm32/src/lib.rs
+++ b/embassy-stm32/src/lib.rs
@ -1,6 +1,5 @@
 #![cfg_attr(not(test), no_std)]
-#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections))]
-#![cfg_attr(feature = "nightly", allow(stable_features, unknown_lints, async_fn_in_trait))]
+#![cfg_attr(feature = "nightly", feature(async_fn_in_trait))]

 //! ## Feature flags
 #![doc = document_features::document_features!(feature_label = r#"<span class="stab portability"><code>{feature}</code></span>"#)]
@ -228,9 +227,8 @@ pub fn init(config: Config) -> Peripherals {

            #[cfg(feature = "low-power")]
            {
-                crate::rcc::REFCOUNT_STOP2 = 0;
-                crate::rcc::REFCOUNT_STOP1 = 0;
-            }
+                crate::rcc::REFCOUNT_STOP2 = 0
+            };
        }

        p
--- a/embassy-stm32/src/low_power.rs
+++ b/embassy-stm32/src/low_power.rs
@ -1,50 +1,3 @@
-/// The STM32 line of microcontrollers support various deep-sleep modes which exploit clock-gating
-/// to reduce power consumption. `embassy-stm32` provides a low-power executor, [`Executor`] which
-/// can use knowledge of which peripherals are currently blocked upon to transparently and safely
-/// enter such low-power modes (currently, only `STOP2`) when idle.
-///
-/// The executor determines which peripherals are active by their RCC state; consequently,
-/// low-power states can only be entered if all peripherals have been `drop`'d. There are a few
-/// exceptions to this rule:
-///
-///  * `GPIO`
-///  * `RCC`
-///
-/// Since entering and leaving low-power modes typically incurs a significant latency, the
-/// low-power executor will only attempt to enter when the next timer event is at least
-/// [`time_driver::MIN_STOP_PAUSE`] in the future.
-///
-/// Currently there is no macro analogous to `embassy_executor::main` for this executor;
-/// consequently one must define their entrypoint manually. Moveover, you must relinquish control
-/// of the `RTC` peripheral to the executor. This will typically look like
-///
-/// ```rust,no_run
-/// use embassy_executor::Spawner;
-/// use embassy_stm32::low_power::Executor;
-/// use embassy_stm32::rtc::{Rtc, RtcConfig};
-/// use static_cell::make_static;
-///
-/// #[cortex_m_rt::entry]
-/// fn main() -> ! {
-///     Executor::take().run(|spawner| {
-///         unwrap!(spawner.spawn(async_main(spawner)));
-///     });
-/// }
-///
-/// #[embassy_executor::task]
-/// async fn async_main(spawner: Spawner) {
-///     // initialize the platform...
-///     let mut config = embassy_stm32::Config::default();
-///     let p = embassy_stm32::init(config);
-///
-///     // give the RTC to the executor...
-///     let mut rtc = Rtc::new(p.RTC, RtcConfig::default());
-///     let rtc = make_static!(rtc);
-///     embassy_stm32::low_power::stop_with_rtc(rtc);
-///
-///     // your application here...
-/// }
-/// ```
 use core::arch::asm;
 use core::marker::PhantomData;
 use core::sync::atomic::{compiler_fence, Ordering};
@ -80,17 +33,11 @@ pub fn stop_with_rtc(rtc: &'static Rtc) {
 }

 pub fn stop_ready(stop_mode: StopMode) -> bool {
-    match unsafe { EXECUTOR.as_mut().unwrap() }.stop_mode() {
-        Some(StopMode::Stop2) => true,
-        Some(StopMode::Stop1) => stop_mode == StopMode::Stop1,
-        None => false,
-    }
+    unsafe { EXECUTOR.as_mut().unwrap() }.stop_ready(stop_mode)
 }

 #[non_exhaustive]
-#[derive(PartialEq)]
 pub enum StopMode {
-    Stop1,
    Stop2,
 }

@ -114,7 +61,7 @@ pub struct Executor {
 impl Executor {
    /// Create a new Executor.
    pub fn take() -> &'static mut Self {
-        critical_section::with(|_| unsafe {
+        unsafe {
            assert!(EXECUTOR.is_none());

            EXECUTOR = Some(Self {
@ -125,7 +72,7 @@ impl Executor {
            });

            EXECUTOR.as_mut().unwrap()
-        })
+        }
    }

    unsafe fn on_wakeup_irq(&mut self) {
@ -141,39 +88,23 @@ impl Executor {
        trace!("low power: stop with rtc configured");
    }

-    fn stop_mode(&self) -> Option<StopMode> {
-        if unsafe { crate::rcc::REFCOUNT_STOP2 == 0 } && unsafe { crate::rcc::REFCOUNT_STOP1 == 0 } {
-            Some(StopMode::Stop2)
-        } else if unsafe { crate::rcc::REFCOUNT_STOP1 == 0 } {
-            Some(StopMode::Stop1)
-        } else {
-            None
+    fn stop_ready(&self, stop_mode: StopMode) -> bool {
+        match stop_mode {
+            StopMode::Stop2 => unsafe { crate::rcc::REFCOUNT_STOP2 == 0 },
        }
    }

-    fn configure_stop(&mut self, _stop_mode: StopMode) {
-        // TODO: configure chip-specific settings for stop
-    }
-
    fn configure_pwr(&mut self) {
        self.scb.clear_sleepdeep();

        compiler_fence(Ordering::SeqCst);

-        let stop_mode = self.stop_mode();
-        if stop_mode.is_none() {
+        if !self.stop_ready(StopMode::Stop2) {
            trace!("low power: not ready to stop");
        } else if self.time_driver.pause_time().is_err() {
            trace!("low power: failed to pause time");
        } else {
-            let stop_mode = stop_mode.unwrap();
-            match stop_mode {
-                StopMode::Stop1 => trace!("low power: stop 1"),
-                StopMode::Stop2 => trace!("low power: stop 2"),
-            }
-            self.configure_stop(stop_mode);
-
-            #[cfg(not(feature = "low-power-debug-with-sleep"))]
+            trace!("low power: stop");
            self.scb.set_sleepdeep();
        }
    }
--- a/embassy-stm32/src/opamp.rs
+++ b/embassy-stm32/src/opamp.rs
@ -13,50 +13,21 @@ pub enum OpAmpGain {
    Mul16,
 }

-#[derive(Clone, Copy)]
-pub enum OpAmpSpeed {
-    Normal,
-    HighSpeed,
-}
-
-#[cfg(opamp_g4)]
-impl From<OpAmpSpeed> for crate::pac::opamp::vals::OpampCsrOpahsm {
-    fn from(v: OpAmpSpeed) -> Self {
-        match v {
-            OpAmpSpeed::Normal => crate::pac::opamp::vals::OpampCsrOpahsm::NORMAL,
-            OpAmpSpeed::HighSpeed => crate::pac::opamp::vals::OpampCsrOpahsm::HIGHSPEED,
-        }
-    }
-}
-
-/// OpAmp external outputs, wired to a GPIO pad.
-///
-/// The GPIO output pad is held by this struct to ensure it cannot be used elsewhere.
-///
-/// This struct can also be used as an ADC input.
-pub struct OpAmpOutput<'d, 'p, T: Instance, P: OutputPin<T>> {
+pub struct OpAmpOutput<'d, 'p, T: Instance, P: NonInvertingPin<T>> {
    _inner: &'d OpAmp<'d, T>,
-    _output: &'p mut P,
+    _input: &'p mut P,
 }

-/// OpAmp internal outputs, wired directly to ADC inputs.
-///
-/// This struct can be used as an ADC input.
-pub struct OpAmpInternalOutput<'d, T: Instance> {
-    _inner: &'d OpAmp<'d, T>,
-}
-
-/// OpAmp driver.
 pub struct OpAmp<'d, T: Instance> {
    _inner: PeripheralRef<'d, T>,
 }

 impl<'d, T: Instance> OpAmp<'d, T> {
-    /// Create a new driver instance.
-    ///
-    /// Enables the OpAmp and configures the speed, but
-    /// does not set any other configuration.
-    pub fn new(opamp: impl Peripheral<P = T> + 'd, #[cfg(opamp_g4)] speed: OpAmpSpeed) -> Self {
+    pub fn new(opamp: impl Peripheral<P = T> + 'd) -> Self {
+        Self::new_inner(opamp)
+    }
+
+    fn new_inner(opamp: impl Peripheral<P = T> + 'd) -> Self {
        into_ref!(opamp);

        #[cfg(opamp_f3)]
@ -67,34 +38,15 @@ impl<'d, T: Instance> OpAmp<'d, T> {
        #[cfg(opamp_g4)]
        T::regs().opamp_csr().modify(|w| {
            w.set_opaen(true);
-            w.set_opahsm(speed.into());
        });

        Self { _inner: opamp }
    }

-    /// Configure the OpAmp as a buffer for the provided input pin,
-    /// outputting to the provided output pin.
-    ///
-    /// The input pin is configured for analogue mode but not consumed,
-    /// so it may subsequently be used for ADC or comparator inputs.
-    ///
-    /// The output pin is held within the returned [`OpAmpOutput`] struct,
-    /// preventing it being used elsewhere. The `OpAmpOutput` can then be
-    /// directly used as an ADC input.
-    pub fn buffer_ext<'a, 'b, IP, OP>(
-        &'a mut self,
-        in_pin: &IP,
-        out_pin: &'b mut OP,
-        gain: OpAmpGain,
-    ) -> OpAmpOutput<'a, 'b, T, OP>
+    pub fn buffer_for<'a, 'b, P>(&'a mut self, pin: &'b mut P, gain: OpAmpGain) -> OpAmpOutput<'a, 'b, T, P>
    where
-        IP: NonInvertingPin<T> + crate::gpio::sealed::Pin,
-        OP: OutputPin<T> + crate::gpio::sealed::Pin,
+        P: NonInvertingPin<T>,
    {
-        in_pin.set_as_analog();
-        out_pin.set_as_analog();
-
        let (vm_sel, pga_gain) = match gain {
            OpAmpGain::Mul1 => (0b11, 0b00),
            OpAmpGain::Mul2 => (0b10, 0b00),
@ -105,76 +57,25 @@ impl<'d, T: Instance> OpAmp<'d, T> {

        #[cfg(opamp_f3)]
        T::regs().opampcsr().modify(|w| {
-            w.set_vp_sel(in_pin.channel());
+            w.set_vp_sel(pin.channel());
            w.set_vm_sel(vm_sel);
            w.set_pga_gain(pga_gain);
-            w.set_opampen(true);
        });

        #[cfg(opamp_g4)]
        T::regs().opamp_csr().modify(|w| {
            use crate::pac::opamp::vals::*;

-            w.set_vp_sel(OpampCsrVpSel::from_bits(in_pin.channel()));
+            w.set_vp_sel(OpampCsrVpSel::from_bits(pin.channel()));
            w.set_vm_sel(OpampCsrVmSel::from_bits(vm_sel));
            w.set_pga_gain(OpampCsrPgaGain::from_bits(pga_gain));
-            w.set_opaintoen(OpampCsrOpaintoen::OUTPUTPIN);
-            w.set_opaen(true);
        });

        OpAmpOutput {
            _inner: self,
-            _output: out_pin,
+            _input: pin,
        }
    }
-
-    /// Configure the OpAmp as a buffer for the provided input pin,
-    /// with the output only used internally.
-    ///
-    /// The input pin is configured for analogue mode but not consumed,
-    /// so it may be subsequently used for ADC or comparator inputs.
-    ///
-    /// The returned `OpAmpInternalOutput` struct may be used as an ADC input.
-    #[cfg(opamp_g4)]
-    pub fn buffer_int<'a, P>(&'a mut self, pin: &P, gain: OpAmpGain) -> OpAmpInternalOutput<'a, T>
-    where
-        P: NonInvertingPin<T> + crate::gpio::sealed::Pin,
-    {
-        pin.set_as_analog();
-
-        let (vm_sel, pga_gain) = match gain {
-            OpAmpGain::Mul1 => (0b11, 0b00),
-            OpAmpGain::Mul2 => (0b10, 0b00),
-            OpAmpGain::Mul4 => (0b10, 0b01),
-            OpAmpGain::Mul8 => (0b10, 0b10),
-            OpAmpGain::Mul16 => (0b10, 0b11),
-        };
-
-        T::regs().opamp_csr().modify(|w| {
-            use crate::pac::opamp::vals::*;
-            w.set_vp_sel(OpampCsrVpSel::from_bits(pin.channel()));
-            w.set_vm_sel(OpampCsrVmSel::from_bits(vm_sel));
-            w.set_pga_gain(OpampCsrPgaGain::from_bits(pga_gain));
-            w.set_opaintoen(OpampCsrOpaintoen::ADCCHANNEL);
-            w.set_opaen(true);
-        });
-
-        OpAmpInternalOutput { _inner: self }
-    }
-}
-
-impl<'d, T: Instance> Drop for OpAmp<'d, T> {
-    fn drop(&mut self) {
-        #[cfg(opamp_f3)]
-        T::regs().opampcsr().modify(|w| {
-            w.set_opampen(false);
-        });
-
-        #[cfg(opamp_g4)]
-        T::regs().opamp_csr().modify(|w| {
-            w.set_opaen(false);
-        });
-    }
 }

 pub trait Instance: sealed::Instance + 'static {}
@ -191,19 +92,18 @@ pub(crate) mod sealed {
    pub trait InvertingPin<T: Instance> {
        fn channel(&self) -> u8;
    }
-
-    pub trait OutputPin<T: Instance> {}
 }

 pub trait NonInvertingPin<T: Instance>: sealed::NonInvertingPin<T> {}
+
 pub trait InvertingPin<T: Instance>: sealed::InvertingPin<T> {}
-pub trait OutputPin<T: Instance>: sealed::OutputPin<T> {}

-macro_rules! impl_opamp_external_output {
+#[cfg(opamp_f3)]
+macro_rules! impl_opamp_output {
    ($inst:ident, $adc:ident, $ch:expr) => {
        foreach_adc!(
            ($adc, $common_inst:ident, $adc_clock:ident) => {
-                impl<'d, 'p, P: OutputPin<crate::peripherals::$inst>> crate::adc::sealed::AdcPin<crate::peripherals::$adc>
+                impl<'d, 'p, P: NonInvertingPin<crate::peripherals::$inst>> crate::adc::sealed::AdcPin<crate::peripherals::$adc>
                    for OpAmpOutput<'d, 'p, crate::peripherals::$inst, P>
                {
                    fn channel(&self) -> u8 {
@ -211,7 +111,7 @@ macro_rules! impl_opamp_external_output {
                    }
                }

-                impl<'d, 'p, P: OutputPin<crate::peripherals::$inst>> crate::adc::AdcPin<crate::peripherals::$adc>
+                impl<'d, 'p, P: NonInvertingPin<crate::peripherals::$inst>> crate::adc::AdcPin<crate::peripherals::$adc>
                    for OpAmpOutput<'d, 'p, crate::peripherals::$inst, P>
                {
                }
@ -220,79 +120,19 @@ macro_rules! impl_opamp_external_output {
    };
 }

+#[cfg(opamp_f3)]
 foreach_peripheral!(
    (opamp, OPAMP1) => {
-        impl_opamp_external_output!(OPAMP1, ADC1, 3);
+        impl_opamp_output!(OPAMP1, ADC1, 3);
    };
    (opamp, OPAMP2) => {
-        impl_opamp_external_output!(OPAMP2, ADC2, 3);
+        impl_opamp_output!(OPAMP2, ADC2, 3);
    };
    (opamp, OPAMP3) => {
-        impl_opamp_external_output!(OPAMP3, ADC3, 1);
+        impl_opamp_output!(OPAMP3, ADC3, 1);
    };
-    // OPAMP4 only in STM32G4 Cat 3 devices
    (opamp, OPAMP4) => {
-        impl_opamp_external_output!(OPAMP4, ADC4, 3);
-    };
-    // OPAMP5 only in STM32G4 Cat 3 devices
-    (opamp, OPAMP5) => {
-        impl_opamp_external_output!(OPAMP5, ADC5, 1);
-    };
-    // OPAMP6 only in STM32G4 Cat 3/4 devices
-    (opamp, OPAMP6) => {
-        impl_opamp_external_output!(OPAMP6, ADC1, 14);
-    };
-);
-
-#[cfg(opamp_g4)]
-macro_rules! impl_opamp_internal_output {
-    ($inst:ident, $adc:ident, $ch:expr) => {
-        foreach_adc!(
-            ($adc, $common_inst:ident, $adc_clock:ident) => {
-                impl<'d> crate::adc::sealed::AdcPin<crate::peripherals::$adc>
-                    for OpAmpInternalOutput<'d, crate::peripherals::$inst>
-                {
-                    fn channel(&self) -> u8 {
-                        $ch
-                    }
-                }
-
-                impl<'d> crate::adc::AdcPin<crate::peripherals::$adc>
-                    for OpAmpInternalOutput<'d, crate::peripherals::$inst>
-                {
-                }
-            };
-        );
-    };
-}
-
-#[cfg(opamp_g4)]
-foreach_peripheral!(
-    (opamp, OPAMP1) => {
-        impl_opamp_internal_output!(OPAMP1, ADC1, 13);
-    };
-    (opamp, OPAMP2) => {
-        impl_opamp_internal_output!(OPAMP2, ADC2, 16);
-    };
-    (opamp, OPAMP3) => {
-        impl_opamp_internal_output!(OPAMP3, ADC2, 18);
-        // Only in Cat 3/4 devices
-        impl_opamp_internal_output!(OPAMP3, ADC3, 13);
-    };
-    // OPAMP4 only in Cat 3 devices
-    (opamp, OPAMP4) => {
-        impl_opamp_internal_output!(OPAMP4, ADC5, 5);
-    };
-    // OPAMP5 only in Cat 3 devices
-    (opamp, OPAMP5) => {
-        impl_opamp_internal_output!(OPAMP5, ADC5, 3);
-    };
-    // OPAMP6 only in Cat 3/4 devices
-    (opamp, OPAMP6) => {
-        // Only in Cat 3 devices
-        impl_opamp_internal_output!(OPAMP6, ADC4, 17);
-        // Only in Cat 4 devices
-        impl_opamp_internal_output!(OPAMP6, ADC3, 17);
+        impl_opamp_output!(OPAMP4, ADC4, 3);
    };
 );

@ -305,12 +145,13 @@ foreach_peripheral! {
        }

        impl Instance for crate::peripherals::$inst {
+
        }
    };
 }

 #[allow(unused_macros)]
-macro_rules! impl_opamp_vp_pin {
+macro_rules! impl_opamp_pin {
    ($inst:ident, $pin:ident, $ch:expr) => {
        impl crate::opamp::NonInvertingPin<peripherals::$inst> for crate::peripherals::$pin {}
        impl crate::opamp::sealed::NonInvertingPin<peripherals::$inst> for crate::peripherals::$pin {
@ -320,11 +161,3 @@ macro_rules! impl_opamp_vp_pin {
        }
    };
 }
-
-#[allow(unused_macros)]
-macro_rules! impl_opamp_vout_pin {
-    ($inst:ident, $pin:ident) => {
-        impl crate::opamp::OutputPin<peripherals::$inst> for crate::peripherals::$pin {}
-        impl crate::opamp::sealed::OutputPin<peripherals::$inst> for crate::peripherals::$pin {}
-    };
-}
--- a/embassy-stm32/src/rcc/f2.rs
+++ b/embassy-stm32/src/rcc/f2.rs
@ -0,0 +1,320 @@
+use crate::pac::flash::vals::Latency;
+use crate::pac::rcc::vals::Sw;
+pub use crate::pac::rcc::vals::{
+    Hpre as AHBPrescaler, Pllm as PLLPreDiv, Plln as PLLMul, Pllp as PLLPDiv, Pllq as PLLQDiv, Pllsrc as PLLSrc,
+    Ppre as APBPrescaler,
+};
+use crate::pac::{FLASH, RCC};
+use crate::rcc::{set_freqs, Clocks};
+use crate::time::Hertz;
+
+/// HSI speed
+pub const HSI_FREQ: Hertz = Hertz(16_000_000);
+
+#[derive(Clone, Copy)]
+pub struct HSEConfig {
+    pub frequency: Hertz,
+    pub source: HSESrc,
+}
+
+/// System clock mux source
+#[derive(Clone, Copy)]
+pub enum ClockSrc {
+    HSE,
+    HSI,
+    PLL,
+}
+
+/// HSE clock source
+#[derive(Clone, Copy)]
+pub enum HSESrc {
+    /// Crystal/ceramic resonator
+    Crystal,
+    /// External clock source, HSE bypassed
+    Bypass,
+}
+
+#[derive(Clone, Copy)]
+pub struct PLLConfig {
+    pub pre_div: PLLPreDiv,
+    pub mul: PLLMul,
+    pub p_div: PLLPDiv,
+    pub q_div: PLLQDiv,
+}
+
+impl Default for PLLConfig {
+    fn default() -> Self {
+        PLLConfig {
+            pre_div: PLLPreDiv::DIV16,
+            mul: PLLMul::MUL192,
+            p_div: PLLPDiv::DIV2,
+            q_div: PLLQDiv::DIV4,
+        }
+    }
+}
+
+impl PLLConfig {
+    pub fn clocks(&self, src_freq: Hertz) -> PLLClocks {
+        let in_freq = src_freq / self.pre_div;
+        let vco_freq = src_freq / self.pre_div * self.mul;
+        let main_freq = vco_freq / self.p_div;
+        let pll48_freq = vco_freq / self.q_div;
+        PLLClocks {
+            in_freq,
+            vco_freq,
+            main_freq,
+            pll48_freq,
+        }
+    }
+}
+#[derive(Clone, Copy, PartialEq)]
+pub struct PLLClocks {
+    pub in_freq: Hertz,
+    pub vco_freq: Hertz,
+    pub main_freq: Hertz,
+    pub pll48_freq: Hertz,
+}
+
+/// Voltage range of the power supply used.
+///
+/// Used to calculate flash waitstates. See
+/// RM0033 - Table 3. Number of wait states according to Cortex®-M3 clock frequency
+pub enum VoltageScale {
+    /// 2.7 to 3.6 V
+    Range0,
+    /// 2.4 to 2.7 V
+    Range1,
+    /// 2.1 to 2.4 V
+    Range2,
+    /// 1.8 to 2.1 V
+    Range3,
+}
+
+impl VoltageScale {
+    const fn wait_states(&self, ahb_freq: Hertz) -> Option<Latency> {
+        let ahb_freq = ahb_freq.0;
+        // Reference: RM0033 - Table 3. Number of wait states according to Cortex®-M3 clock
+        // frequency
+        match self {
+            VoltageScale::Range3 => {
+                if ahb_freq <= 16_000_000 {
+                    Some(Latency::WS0)
+                } else if ahb_freq <= 32_000_000 {
+                    Some(Latency::WS1)
+                } else if ahb_freq <= 48_000_000 {
+                    Some(Latency::WS2)
+                } else if ahb_freq <= 64_000_000 {
+                    Some(Latency::WS3)
+                } else if ahb_freq <= 80_000_000 {
+                    Some(Latency::WS4)
+                } else if ahb_freq <= 96_000_000 {
+                    Some(Latency::WS5)
+                } else if ahb_freq <= 112_000_000 {
+                    Some(Latency::WS6)
+                } else if ahb_freq <= 120_000_000 {
+                    Some(Latency::WS7)
+                } else {
+                    None
+                }
+            }
+            VoltageScale::Range2 => {
+                if ahb_freq <= 18_000_000 {
+                    Some(Latency::WS0)
+                } else if ahb_freq <= 36_000_000 {
+                    Some(Latency::WS1)
+                } else if ahb_freq <= 54_000_000 {
+                    Some(Latency::WS2)
+                } else if ahb_freq <= 72_000_000 {
+                    Some(Latency::WS3)
+                } else if ahb_freq <= 90_000_000 {
+                    Some(Latency::WS4)
+                } else if ahb_freq <= 108_000_000 {
+                    Some(Latency::WS5)
+                } else if ahb_freq <= 120_000_000 {
+                    Some(Latency::WS6)
+                } else {
+                    None
+                }
+            }
+            VoltageScale::Range1 => {
+                if ahb_freq <= 24_000_000 {
+                    Some(Latency::WS0)
+                } else if ahb_freq <= 48_000_000 {
+                    Some(Latency::WS1)
+                } else if ahb_freq <= 72_000_000 {
+                    Some(Latency::WS2)
+                } else if ahb_freq <= 96_000_000 {
+                    Some(Latency::WS3)
+                } else if ahb_freq <= 120_000_000 {
+                    Some(Latency::WS4)
+                } else {
+                    None
+                }
+            }
+            VoltageScale::Range0 => {
+                if ahb_freq <= 30_000_000 {
+                    Some(Latency::WS0)
+                } else if ahb_freq <= 60_000_000 {
+                    Some(Latency::WS1)
+                } else if ahb_freq <= 90_000_000 {
+                    Some(Latency::WS2)
+                } else if ahb_freq <= 120_000_000 {
+                    Some(Latency::WS3)
+                } else {
+                    None
+                }
+            }
+        }
+    }
+}
+
+/// Clocks configuration
+pub struct Config {
+    pub hse: Option<HSEConfig>,
+    pub hsi: bool,
+    pub pll_mux: PLLSrc,
+    pub pll: PLLConfig,
+    pub mux: ClockSrc,
+    pub voltage: VoltageScale,
+    pub ahb_pre: AHBPrescaler,
+    pub apb1_pre: APBPrescaler,
+    pub apb2_pre: APBPrescaler,
+    pub ls: super::LsConfig,
+}
+
+impl Default for Config {
+    #[inline]
+    fn default() -> Config {
+        Config {
+            hse: None,
+            hsi: true,
+            pll_mux: PLLSrc::HSI,
+            pll: PLLConfig::default(),
+            voltage: VoltageScale::Range3,
+            mux: ClockSrc::HSI,
+            ahb_pre: AHBPrescaler::DIV1,
+            apb1_pre: APBPrescaler::DIV1,
+            apb2_pre: APBPrescaler::DIV1,
+            ls: Default::default(),
+        }
+    }
+}
+
+pub(crate) unsafe fn init(config: Config) {
+    // Make sure HSI is enabled
+    RCC.cr().write(|w| w.set_hsion(true));
+    while !RCC.cr().read().hsirdy() {}
+
+    if let Some(hse_config) = config.hse {
+        RCC.cr().modify(|w| {
+            w.set_hsebyp(match hse_config.source {
+                HSESrc::Bypass => true,
+                HSESrc::Crystal => false,
+            });
+            w.set_hseon(true)
+        });
+        while !RCC.cr().read().hserdy() {}
+    }
+
+    let pll_src_freq = match config.pll_mux {
+        PLLSrc::HSE => {
+            let hse_config = config
+                .hse
+                .unwrap_or_else(|| panic!("HSE must be configured to be used as PLL input"));
+            hse_config.frequency
+        }
+        PLLSrc::HSI => HSI_FREQ,
+    };
+
+    // Reference: STM32F215xx/217xx datasheet Table 33. Main PLL characteristics
+    let pll_clocks = config.pll.clocks(pll_src_freq);
+    assert!(Hertz(950_000) <= pll_clocks.in_freq && pll_clocks.in_freq <= Hertz(2_100_000));
+    assert!(Hertz(192_000_000) <= pll_clocks.vco_freq && pll_clocks.vco_freq <= Hertz(432_000_000));
+    assert!(Hertz(24_000_000) <= pll_clocks.main_freq && pll_clocks.main_freq <= Hertz(120_000_000));
+    // USB actually requires == 48 MHz, but other PLL48 peripherals are fine with <= 48MHz
+    assert!(pll_clocks.pll48_freq <= Hertz(48_000_000));
+
+    RCC.pllcfgr().write(|w| {
+        w.set_pllsrc(config.pll_mux);
+        w.set_pllm(config.pll.pre_div);
+        w.set_plln(config.pll.mul);
+        w.set_pllp(config.pll.p_div);
+        w.set_pllq(config.pll.q_div);
+    });
+
+    let (sys_clk, sw) = match config.mux {
+        ClockSrc::HSI => {
+            assert!(config.hsi, "HSI must be enabled to be used as system clock");
+            (HSI_FREQ, Sw::HSI)
+        }
+        ClockSrc::HSE => {
+            let hse_config = config
+                .hse
+                .unwrap_or_else(|| panic!("HSE must be configured to be used as PLL input"));
+            (hse_config.frequency, Sw::HSE)
+        }
+        ClockSrc::PLL => {
+            RCC.cr().modify(|w| w.set_pllon(true));
+            while !RCC.cr().read().pllrdy() {}
+            (pll_clocks.main_freq, Sw::PLL1_P)
+        }
+    };
+    // RM0033 Figure 9. Clock tree suggests max SYSCLK/HCLK is 168 MHz, but datasheet specifies PLL
+    // max output to be 120 MHz, so there's no way to get higher frequencies
+    assert!(sys_clk <= Hertz(120_000_000));
+
+    let ahb_freq = sys_clk / config.ahb_pre;
+    // Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions
+    assert!(ahb_freq <= Hertz(120_000_000));
+
+    let (apb1_freq, apb1_tim_freq) = match config.apb1_pre {
+        APBPrescaler::DIV1 => (ahb_freq, ahb_freq),
+        pre => {
+            let freq = ahb_freq / pre;
+            (freq, Hertz(freq.0 * 2))
+        }
+    };
+    // Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions
+    assert!(apb1_freq <= Hertz(30_000_000));
+
+    let (apb2_freq, apb2_tim_freq) = match config.apb2_pre {
+        APBPrescaler::DIV1 => (ahb_freq, ahb_freq),
+        pre => {
+            let freq = ahb_freq / pre;
+            (freq, Hertz(freq.0 * 2))
+        }
+    };
+    // Reference: STM32F215xx/217xx datasheet Table 13. General operating conditions
+    assert!(apb2_freq <= Hertz(60_000_000));
+
+    let flash_ws = unwrap!(config.voltage.wait_states(ahb_freq));
+    FLASH.acr().modify(|w| w.set_latency(flash_ws));
+
+    RCC.cfgr().modify(|w| {
+        w.set_sw(sw.into());
+        w.set_hpre(config.ahb_pre);
+        w.set_ppre1(config.apb1_pre);
+        w.set_ppre2(config.apb2_pre);
+    });
+    while RCC.cfgr().read().sws().to_bits() != sw.to_bits() {}
+
+    // Turn off HSI to save power if we don't need it
+    if !config.hsi {
+        RCC.cr().modify(|w| w.set_hsion(false));
+    }
+
+    let rtc = config.ls.init();
+
+    set_freqs(Clocks {
+        sys: sys_clk,
+        hclk1: ahb_freq,
+        hclk2: ahb_freq,
+        hclk3: ahb_freq,
+        pclk1: apb1_freq,
+        pclk1_tim: apb1_tim_freq,
+        pclk2: apb2_freq,
+        pclk2_tim: apb2_tim_freq,
+        pll1_q: Some(pll_clocks.pll48_freq),
+        rtc,
+    });
+}
--- a/embassy-stm32/src/rcc/f4f7.rs
+++ b/embassy-stm32/src/rcc/f4f7.rs
@ -1,11 +1,7 @@
-use stm32_metapac::flash::vals::Latency;
-
 pub use crate::pac::rcc::vals::{
-    Hpre as AHBPrescaler, Pllm as PllPreDiv, Plln as PllMul, Pllp as PllPDiv, Pllq as PllQDiv, Pllr as PllRDiv,
-    Pllsrc as PllSource, Ppre as APBPrescaler, Sw as Sysclk,
+    Hpre as AHBPrescaler, Pllm as PllPreDiv, Plln as PllMul, Pllp, Pllq, Pllr, Pllsrc as PllSource,
+    Ppre as APBPrescaler, Sw as Sysclk,
 };
-#[cfg(any(stm32f4, stm32f7))]
-use crate::pac::PWR;
 use crate::pac::{FLASH, RCC};
 use crate::rcc::{set_freqs, Clocks};
 use crate::time::Hertz;
@ -52,27 +48,11 @@ pub struct Pll {
    pub mul: PllMul,

    /// PLL P division factor. If None, PLL P output is disabled.
-    pub divp: Option<PllPDiv>,
+    pub divp: Option<Pllp>,
    /// PLL Q division factor. If None, PLL Q output is disabled.
-    pub divq: Option<PllQDiv>,
+    pub divq: Option<Pllq>,
    /// PLL R division factor. If None, PLL R output is disabled.
-    pub divr: Option<PllRDiv>,
-}
-
-/// Voltage range of the power supply used.
-///
-/// Used to calculate flash waitstates. See
-/// RM0033 - Table 3. Number of wait states according to Cortex®-M3 clock frequency
-#[cfg(stm32f2)]
-pub enum VoltageScale {
-    /// 2.7 to 3.6 V
-    Range0,
-    /// 2.4 to 2.7 V
-    Range1,
-    /// 2.1 to 2.4 V
-    Range2,
-    /// 1.8 to 2.1 V
-    Range3,
+    pub divr: Option<Pllr>,
 }

 /// Configuration of the core clocks
@ -85,7 +65,7 @@ pub struct Config {
    pub pll_src: PllSource,

    pub pll: Option<Pll>,
-    #[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))]
+    #[cfg(any(all(stm32f4, not(stm32f410)), stm32f7))]
    pub plli2s: Option<Pll>,
    #[cfg(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7))]
    pub pllsai: Option<Pll>,
@ -95,9 +75,6 @@ pub struct Config {
    pub apb2_pre: APBPrescaler,

    pub ls: super::LsConfig,
-
-    #[cfg(stm32f2)]
-    pub voltage: VoltageScale,
 }

 impl Default for Config {
@ -108,7 +85,7 @@ impl Default for Config {
            sys: Sysclk::HSI,
            pll_src: PllSource::HSI,
            pll: None,
-            #[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))]
+            #[cfg(any(all(stm32f4, not(stm32f410)), stm32f7))]
            plli2s: None,
            #[cfg(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7))]
            pllsai: None,
@ -118,24 +95,17 @@ impl Default for Config {
            apb2_pre: APBPrescaler::DIV1,

            ls: Default::default(),
-
-            #[cfg(stm32f2)]
-            voltage: VoltageScale::Range3,
        }
    }
 }

 pub(crate) unsafe fn init(config: Config) {
-    // set VOS to SCALE1, if use PLL
-    // TODO: check real clock speed before set VOS
-    #[cfg(any(stm32f4, stm32f7))]
-    if config.pll.is_some() {
-        PWR.cr1().modify(|w| w.set_vos(crate::pac::pwr::vals::Vos::SCALE1));
-    }
-
    // always enable overdrive for now. Make it configurable in the future.
-    #[cfg(any(stm32f446, stm32f4x9, stm32f427, stm32f437, stm32f7))]
+    #[cfg(not(any(
+        stm32f401, stm32f410, stm32f411, stm32f412, stm32f413, stm32f423, stm32f405, stm32f407, stm32f415, stm32f417
+    )))]
    {
+        use crate::pac::PWR;
        PWR.cr1().modify(|w| w.set_oden(true));
        while !PWR.csr1().read().odrdy() {}

@ -182,9 +152,9 @@ pub(crate) unsafe fn init(config: Config) {
        source: config.pll_src,
    };
    let pll = init_pll(PllInstance::Pll, config.pll, &pll_input);
-    #[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))]
+    #[cfg(any(all(stm32f4, not(any(stm32f410, stm32f429))), stm32f7))]
    let _plli2s = init_pll(PllInstance::Plli2s, config.plli2s, &pll_input);
-    #[cfg(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7))]
+    #[cfg(all(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7), not(stm32f429)))]
    let _pllsai = init_pll(PllInstance::Pllsai, config.pllsai, &pll_input);

    // Configure sysclk
@ -206,48 +176,7 @@ pub(crate) unsafe fn init(config: Config) {

    let rtc = config.ls.init();

-    #[cfg(stm32f2)]
-    let latency = match (config.voltage, hclk.0) {
-        (VoltageScale::Range3, ..=16_000_000) => Latency::WS0,
-        (VoltageScale::Range3, ..=32_000_000) => Latency::WS1,
-        (VoltageScale::Range3, ..=48_000_000) => Latency::WS2,
-        (VoltageScale::Range3, ..=64_000_000) => Latency::WS3,
-        (VoltageScale::Range3, ..=80_000_000) => Latency::WS4,
-        (VoltageScale::Range3, ..=96_000_000) => Latency::WS5,
-        (VoltageScale::Range3, ..=112_000_000) => Latency::WS6,
-        (VoltageScale::Range3, ..=120_000_000) => Latency::WS7,
-        (VoltageScale::Range2, ..=18_000_000) => Latency::WS0,
-        (VoltageScale::Range2, ..=36_000_000) => Latency::WS1,
-        (VoltageScale::Range2, ..=54_000_000) => Latency::WS2,
-        (VoltageScale::Range2, ..=72_000_000) => Latency::WS3,
-        (VoltageScale::Range2, ..=90_000_000) => Latency::WS4,
-        (VoltageScale::Range2, ..=108_000_000) => Latency::WS5,
-        (VoltageScale::Range2, ..=120_000_000) => Latency::WS6,
-        (VoltageScale::Range1, ..=24_000_000) => Latency::WS0,
-        (VoltageScale::Range1, ..=48_000_000) => Latency::WS1,
-        (VoltageScale::Range1, ..=72_000_000) => Latency::WS2,
-        (VoltageScale::Range1, ..=96_000_000) => Latency::WS3,
-        (VoltageScale::Range1, ..=120_000_000) => Latency::WS4,
-        (VoltageScale::Range0, ..=30_000_000) => Latency::WS0,
-        (VoltageScale::Range0, ..=60_000_000) => Latency::WS1,
-        (VoltageScale::Range0, ..=90_000_000) => Latency::WS2,
-        (VoltageScale::Range0, ..=120_000_000) => Latency::WS3,
-        _ => unreachable!(),
-    };
-
-    #[cfg(any(stm32f4, stm32f7))]
-    let latency = {
-        // Be conservative with voltage ranges
-        const FLASH_LATENCY_STEP: u32 = 30_000_000;
-
-        let latency = (hclk.0 - 1) / FLASH_LATENCY_STEP;
-        debug!("flash: latency={}", latency);
-
-        Latency::from_bits(latency as u8)
-    };
-
-    FLASH.acr().write(|w| w.set_latency(latency));
-    while FLASH.acr().read().latency() != latency {}
+    flash_setup(hclk);

    RCC.cfgr().modify(|w| {
        w.set_sw(config.sys);
@ -268,15 +197,25 @@ pub(crate) unsafe fn init(config: Config) {
        pclk2_tim,
        rtc,
        pll1_q: pll.q,
-        #[cfg(all(rcc_f4, not(stm32f410)))]
+        #[cfg(all(rcc_f4, not(any(stm32f410, stm32f429))))]
        plli2s1_q: _plli2s.q,
-        #[cfg(all(rcc_f4, not(stm32f410)))]
+        #[cfg(all(rcc_f4, not(any(stm32f410, stm32f429))))]
        plli2s1_r: _plli2s.r,

-        #[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
+        #[cfg(stm32f429)]
+        plli2s1_q: None,
+        #[cfg(stm32f429)]
+        plli2s1_r: None,
+
+        #[cfg(any(stm32f427, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
        pllsai1_q: _pllsai.q,
-        #[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
+        #[cfg(any(stm32f427, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
        pllsai1_r: _pllsai.r,
+
+        #[cfg(stm32f429)]
+        pllsai1_q: None,
+        #[cfg(stm32f429)]
+        pllsai1_r: None,
    });
 }

@ -294,10 +233,11 @@ struct PllOutput {
    r: Option<Hertz>,
 }

+#[allow(dead_code)]
 #[derive(PartialEq, Eq, Clone, Copy)]
 enum PllInstance {
    Pll,
-    #[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))]
+    #[cfg(any(all(stm32f4, not(stm32f410)), stm32f7))]
    Plli2s,
    #[cfg(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7))]
    Pllsai,
@ -309,7 +249,7 @@ fn pll_enable(instance: PllInstance, enabled: bool) {
            RCC.cr().modify(|w| w.set_pllon(enabled));
            while RCC.cr().read().pllrdy() != enabled {}
        }
-        #[cfg(any(stm32f2, all(stm32f4, not(stm32f410)), stm32f7))]
+        #[cfg(any(all(stm32f4, not(stm32f410)), stm32f7))]
        PllInstance::Plli2s => {
            RCC.cr().modify(|w| w.set_plli2son(enabled));
            while RCC.cr().read().plli2srdy() != enabled {}
@ -340,18 +280,6 @@ fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> Pll
    let vco_freq = in_freq * pll.mul;
    assert!(max::PLL_VCO.contains(&vco_freq));

-    // stm32f2 plls are like swiss cheese
-    #[cfg(stm32f2)]
-    match instance {
-        PllInstance::Pll => {
-            assert!(pll.divr.is_none());
-        }
-        PllInstance::Plli2s => {
-            assert!(pll.divp.is_none());
-            assert!(pll.divq.is_none());
-        }
-    }
-
    let p = pll.divp.map(|div| vco_freq / div);
    let q = pll.divq.map(|div| vco_freq / div);
    let r = pll.divr.map(|div| vco_freq / div);
@ -365,7 +293,6 @@ fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> Pll
            if let Some(divq) = pll.divq {
                $w.set_pllq(divq);
            }
-            #[cfg(any(stm32f4, stm32f7))]
            if let Some(divr) = pll.divr {
                $w.set_pllr(divr);
            }
@ -382,12 +309,6 @@ fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> Pll
        PllInstance::Plli2s => RCC.plli2scfgr().write(|w| {
            write_fields!(w);
        }),
-        #[cfg(stm32f2)]
-        PllInstance::Plli2s => RCC.plli2scfgr().write(|w| {
-            if let Some(divr) = pll.divr {
-                w.set_pllr(divr);
-            }
-        }),
        #[cfg(any(stm32f446, stm32f427, stm32f437, stm32f4x9, stm32f7))]
        PllInstance::Pllsai => RCC.pllsaicfgr().write(|w| {
            write_fields!(w);
@ -400,6 +321,22 @@ fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> Pll
    PllOutput { p, q, r }
 }

+fn flash_setup(clk: Hertz) {
+    use crate::pac::flash::vals::Latency;
+
+    // Be conservative with voltage ranges
+    const FLASH_LATENCY_STEP: u32 = 30_000_000;
+
+    let latency = (clk.0 - 1) / FLASH_LATENCY_STEP;
+    debug!("flash: latency={}", latency);
+
+    let latency = Latency::from_bits(latency as u8);
+    FLASH.acr().write(|w| {
+        w.set_latency(latency);
+    });
+    while FLASH.acr().read().latency() != latency {}
+}
+
 #[cfg(stm32f7)]
 mod max {
    use core::ops::RangeInclusive;
@ -448,22 +385,3 @@ mod max {
    pub(crate) const PLL_IN: RangeInclusive<Hertz> = Hertz(1_000_000)..=Hertz(2_100_000);
    pub(crate) const PLL_VCO: RangeInclusive<Hertz> = Hertz(100_000_000)..=Hertz(432_000_000);
 }
-
-#[cfg(stm32f2)]
-mod max {
-    use core::ops::RangeInclusive;
-
-    use crate::time::Hertz;
-
-    pub(crate) const HSE_OSC: RangeInclusive<Hertz> = Hertz(4_000_000)..=Hertz(26_000_000);
-    pub(crate) const HSE_BYP: RangeInclusive<Hertz> = Hertz(1_000_000)..=Hertz(26_000_000);
-
-    pub(crate) const SYSCLK: RangeInclusive<Hertz> = Hertz(0)..=Hertz(120_000_000);
-
-    pub(crate) const HCLK: RangeInclusive<Hertz> = Hertz(0)..=Hertz(SYSCLK.end().0);
-    pub(crate) const PCLK1: RangeInclusive<Hertz> = Hertz(0)..=Hertz(SYSCLK.end().0 / 4);
-    pub(crate) const PCLK2: RangeInclusive<Hertz> = Hertz(0)..=Hertz(SYSCLK.end().0 / 2);
-
-    pub(crate) const PLL_IN: RangeInclusive<Hertz> = Hertz(0_950_000)..=Hertz(2_100_000);
-    pub(crate) const PLL_VCO: RangeInclusive<Hertz> = Hertz(192_000_000)..=Hertz(432_000_000);
-}
--- a/embassy-stm32/src/rcc/g0.rs
+++ b/embassy-stm32/src/rcc/g0.rs
@ -28,7 +28,7 @@ pub enum ClockSrc {
 #[derive(Clone, Copy)]
 pub struct PllConfig {
    /// The source from which the PLL receives a clock signal
-    pub source: PllSource,
+    pub source: PllSrc,
    /// The initial divisor of that clock signal
    pub m: Pllm,
    /// The PLL VCO multiplier, which must be in the range `8..=86`.
@ -48,7 +48,7 @@ impl Default for PllConfig {
    fn default() -> PllConfig {
        // HSI / 1 * 8 / 2 = 64 MHz
        PllConfig {
-            source: PllSource::HSI,
+            source: PllSrc::HSI,
            m: Pllm::DIV1,
            n: Plln::MUL8,
            r: Pllr::DIV2,
@ -59,7 +59,7 @@ impl Default for PllConfig {
 }

 #[derive(Clone, Copy, Eq, PartialEq)]
-pub enum PllSource {
+pub enum PllSrc {
    HSI,
    HSE(Hertz),
 }
@ -89,8 +89,8 @@ impl Default for Config {
 impl PllConfig {
    pub(crate) fn init(self) -> Hertz {
        let (src, input_freq) = match self.source {
-            PllSource::HSI => (vals::Pllsrc::HSI, HSI_FREQ),
-            PllSource::HSE(freq) => (vals::Pllsrc::HSE, freq),
+            PllSrc::HSI => (vals::Pllsrc::HSI, HSI_FREQ),
+            PllSrc::HSE(freq) => (vals::Pllsrc::HSE, freq),
        };

        let m_freq = input_freq / self.m;
@ -121,11 +121,11 @@ impl PllConfig {
        // > 3. Change the desired parameter.
        // Enable whichever clock source we're using, and wait for it to become ready
        match self.source {
-            PllSource::HSI => {
+            PllSrc::HSI => {
                RCC.cr().write(|w| w.set_hsion(true));
                while !RCC.cr().read().hsirdy() {}
            }
-            PllSource::HSE(_) => {
+            PllSrc::HSE(_) => {
                RCC.cr().write(|w| w.set_hseon(true));
                while !RCC.cr().read().hserdy() {}
            }
--- a/embassy-stm32/src/rcc/g4.rs
+++ b/embassy-stm32/src/rcc/g4.rs
@ -7,6 +7,7 @@ pub use crate::pac::rcc::vals::{
    Pllr as PllR, Ppre as APBPrescaler,
 };
 use crate::pac::{PWR, RCC};
+use crate::rcc::sealed::RccPeripheral;
 use crate::rcc::{set_freqs, Clocks};
 use crate::time::Hertz;

@ -23,16 +24,16 @@ pub enum ClockSrc {

 /// PLL clock input source
 #[derive(Clone, Copy, Debug)]
-pub enum PllSource {
+pub enum PllSrc {
    HSI,
    HSE(Hertz),
 }

-impl Into<Pllsrc> for PllSource {
+impl Into<Pllsrc> for PllSrc {
    fn into(self) -> Pllsrc {
        match self {
-            PllSource::HSE(..) => Pllsrc::HSE,
-            PllSource::HSI => Pllsrc::HSI,
+            PllSrc::HSE(..) => Pllsrc::HSE,
+            PllSrc::HSI => Pllsrc::HSI,
        }
    }
 }
@ -44,7 +45,7 @@ impl Into<Pllsrc> for PllSource {
 /// frequency ranges for each of these settings.
 pub struct Pll {
    /// PLL Source clock selection.
-    pub source: PllSource,
+    pub source: PllSrc,

    /// PLL pre-divider
    pub prediv_m: PllM,
@ -66,13 +67,23 @@ pub struct Pll {
 pub enum Clock48MhzSrc {
    /// Use the High Speed Internal Oscillator. For USB usage, the CRS must be used to calibrate the
    /// oscillator to comply with the USB specification for oscillator tolerance.
-    Hsi48(super::Hsi48Config),
+    Hsi48(Option<CrsConfig>),
    /// Use the PLLQ output. The PLL must be configured to output a 48MHz clock. For USB usage the
    /// PLL needs to be using the HSE source to comply with the USB specification for oscillator
    /// tolerance.
    PllQ,
 }

+/// Sets the sync source for the Clock Recovery System (CRS).
+pub enum CrsSyncSource {
+    /// Use an external GPIO to sync the CRS.
+    Gpio,
+    /// Use the Low Speed External oscillator to sync the CRS.
+    Lse,
+    /// Use the USB SOF to sync the CRS.
+    Usb,
+}
+
 /// Clocks configutation
 pub struct Config {
    pub mux: ClockSrc,
@ -91,6 +102,12 @@ pub struct Config {
    pub ls: super::LsConfig,
 }

+/// Configuration for the Clock Recovery System (CRS) used to trim the HSI48 oscillator.
+pub struct CrsConfig {
+    /// Sync source for the CRS.
+    pub sync_src: CrsSyncSource,
+}
+
 impl Default for Config {
    #[inline]
    fn default() -> Config {
@ -101,7 +118,7 @@ impl Default for Config {
            apb2_pre: APBPrescaler::DIV1,
            low_power_run: false,
            pll: None,
-            clock_48mhz_src: Some(Clock48MhzSrc::Hsi48(Default::default())),
+            clock_48mhz_src: Some(Clock48MhzSrc::Hsi48(None)),
            adc12_clock_source: Adcsel::DISABLE,
            adc345_clock_source: Adcsel::DISABLE,
            ls: Default::default(),
@ -118,13 +135,13 @@ pub struct PllFreq {
 pub(crate) unsafe fn init(config: Config) {
    let pll_freq = config.pll.map(|pll_config| {
        let src_freq = match pll_config.source {
-            PllSource::HSI => {
+            PllSrc::HSI => {
                RCC.cr().write(|w| w.set_hsion(true));
                while !RCC.cr().read().hsirdy() {}

                HSI_FREQ
            }
-            PllSource::HSE(freq) => {
+            PllSrc::HSE(freq) => {
                RCC.cr().write(|w| w.set_hseon(true));
                while !RCC.cr().read().hserdy() {}
                freq
@ -271,8 +288,33 @@ pub(crate) unsafe fn init(config: Config) {

                crate::pac::rcc::vals::Clk48sel::PLL1_Q
            }
-            Clock48MhzSrc::Hsi48(config) => {
-                super::init_hsi48(config);
+            Clock48MhzSrc::Hsi48(crs_config) => {
+                // Enable HSI48
+                RCC.crrcr().modify(|w| w.set_hsi48on(true));
+                // Wait for HSI48 to turn on
+                while RCC.crrcr().read().hsi48rdy() == false {}
+
+                // Enable and setup CRS if needed
+                if let Some(crs_config) = crs_config {
+                    crate::peripherals::CRS::enable_and_reset();
+
+                    let sync_src = match crs_config.sync_src {
+                        CrsSyncSource::Gpio => crate::pac::crs::vals::Syncsrc::GPIO,
+                        CrsSyncSource::Lse => crate::pac::crs::vals::Syncsrc::LSE,
+                        CrsSyncSource::Usb => crate::pac::crs::vals::Syncsrc::USB,
+                    };
+
+                    crate::pac::CRS.cfgr().modify(|w| {
+                        w.set_syncsrc(sync_src);
+                    });
+
+                    // These are the correct settings for standard USB operation. If other settings
+                    // are needed there will need to be additional config options for the CRS.
+                    crate::pac::CRS.cr().modify(|w| {
+                        w.set_autotrimen(true);
+                        w.set_cen(true);
+                    });
+                }
                crate::pac::rcc::vals::Clk48sel::HSI48
            }
        };
--- a/embassy-stm32/src/rcc/h.rs
+++ b/embassy-stm32/src/rcc/h.rs
@ -21,6 +21,9 @@ pub const HSI_FREQ: Hertz = Hertz(64_000_000);
 /// CSI speed
 pub const CSI_FREQ: Hertz = Hertz(4_000_000);

+/// HSI48 speed
+pub const HSI48_FREQ: Hertz = Hertz(48_000_000);
+
 const VCO_RANGE: RangeInclusive<Hertz> = Hertz(150_000_000)..=Hertz(420_000_000);
 #[cfg(any(stm32h5, pwr_h7rm0455))]
 const VCO_WIDE_RANGE: RangeInclusive<Hertz> = Hertz(128_000_000)..=Hertz(560_000_000);
@ -123,7 +126,7 @@ pub struct Config {
    pub hsi: Option<HSIPrescaler>,
    pub hse: Option<Hse>,
    pub csi: bool,
-    pub hsi48: Option<super::Hsi48Config>,
+    pub hsi48: bool,
    pub sys: Sysclk,

    pub pll1: Option<Pll>,
@ -152,7 +155,7 @@ impl Default for Config {
            hsi: Some(HSIPrescaler::DIV1),
            hse: None,
            csi: false,
-            hsi48: Some(Default::default()),
+            hsi48: false,
            sys: Sysclk::HSI,
            pll1: None,
            pll2: None,
@ -298,7 +301,14 @@ pub(crate) unsafe fn init(config: Config) {
    };

    // Configure HSI48.
-    let _hsi48 = config.hsi48.map(super::init_hsi48);
+    RCC.cr().modify(|w| w.set_hsi48on(config.hsi48));
+    let _hsi48 = match config.hsi48 {
+        false => None,
+        true => {
+            while !RCC.cr().read().hsi48rdy() {}
+            Some(CSI_FREQ)
+        }
+    };

    // Configure CSI.
    RCC.cr().modify(|w| w.set_csion(config.csi));
--- a/embassy-stm32/src/rcc/hsi48.rs
+++ b/embassy-stm32/src/rcc/hsi48.rs
@ -1,62 +0,0 @@
-#![allow(unused)]
-
-use crate::pac::crs::vals::Syncsrc;
-use crate::pac::{CRS, RCC};
-use crate::rcc::sealed::RccPeripheral;
-use crate::time::Hertz;
-
-/// HSI48 speed
-pub const HSI48_FREQ: Hertz = Hertz(48_000_000);
-
-/// Configuration for the HSI48 clock
-#[derive(Clone, Copy, Debug)]
-pub struct Hsi48Config {
-    /// Enable CRS Sync from USB Start Of Frame (SOF) events.
-    /// Required if HSI48 is going to be used as USB clock.
-    ///
-    /// Other use cases of CRS are not supported yet.
-    pub sync_from_usb: bool,
-}
-
-impl Default for Hsi48Config {
-    fn default() -> Self {
-        Self { sync_from_usb: false }
-    }
-}
-
-pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz {
-    // Enable VREFINT reference for HSI48 oscillator
-    #[cfg(stm32l0)]
-    crate::pac::SYSCFG.cfgr3().modify(|w| {
-        w.set_enref_hsi48(true);
-        w.set_en_vrefint(true);
-    });
-
-    // Enable HSI48
-    #[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32u5, stm32wba, stm32f0)))]
-    let r = RCC.crrcr();
-    #[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32u5, stm32wba))]
-    let r = RCC.cr();
-    #[cfg(any(stm32f0))]
-    let r = RCC.cr2();
-
-    r.modify(|w| w.set_hsi48on(true));
-    while r.read().hsi48rdy() == false {}
-
-    if config.sync_from_usb {
-        crate::peripherals::CRS::enable_and_reset();
-
-        CRS.cfgr().modify(|w| {
-            w.set_syncsrc(Syncsrc::USB);
-        });
-
-        // These are the correct settings for standard USB operation. If other settings
-        // are needed there will need to be additional config options for the CRS.
-        crate::pac::CRS.cr().modify(|w| {
-            w.set_autotrimen(true);
-            w.set_cen(true);
-        });
-    }
-
-    HSI48_FREQ
-}
--- a/embassy-stm32/src/rcc/l0l1.rs
+++ b/embassy-stm32/src/rcc/l0l1.rs
@ -0,0 +1,205 @@
+pub use crate::pac::pwr::vals::Vos as VoltageScale;
+pub use crate::pac::rcc::vals::{
+    Hpre as AHBPrescaler, Msirange as MSIRange, Plldiv as PLLDiv, Pllmul as PLLMul, Ppre as APBPrescaler,
+};
+use crate::pac::rcc::vals::{Pllsrc, Sw};
+#[cfg(crs)]
+use crate::pac::{crs, CRS, SYSCFG};
+use crate::pac::{FLASH, PWR, RCC};
+use crate::rcc::{set_freqs, Clocks};
+use crate::time::Hertz;
+
+/// HSI speed
+pub const HSI_FREQ: Hertz = Hertz(16_000_000);
+
+/// System clock mux source
+#[derive(Clone, Copy)]
+pub enum ClockSrc {
+    MSI(MSIRange),
+    PLL(PLLSource, PLLMul, PLLDiv),
+    HSE(Hertz),
+    HSI,
+}
+
+/// PLL clock input source
+#[derive(Clone, Copy)]
+pub enum PLLSource {
+    HSI,
+    HSE(Hertz),
+}
+
+impl From<PLLSource> for Pllsrc {
+    fn from(val: PLLSource) -> Pllsrc {
+        match val {
+            PLLSource::HSI => Pllsrc::HSI,
+            PLLSource::HSE(_) => Pllsrc::HSE,
+        }
+    }
+}
+
+/// Clocks configutation
+pub struct Config {
+    pub mux: ClockSrc,
+    pub ahb_pre: AHBPrescaler,
+    pub apb1_pre: APBPrescaler,
+    pub apb2_pre: APBPrescaler,
+    #[cfg(crs)]
+    pub enable_hsi48: bool,
+    pub ls: super::LsConfig,
+    pub voltage_scale: VoltageScale,
+}
+
+impl Default for Config {
+    #[inline]
+    fn default() -> Config {
+        Config {
+            mux: ClockSrc::MSI(MSIRange::RANGE5),
+            ahb_pre: AHBPrescaler::DIV1,
+            apb1_pre: APBPrescaler::DIV1,
+            apb2_pre: APBPrescaler::DIV1,
+            #[cfg(crs)]
+            enable_hsi48: false,
+            voltage_scale: VoltageScale::RANGE1,
+            ls: Default::default(),
+        }
+    }
+}
+
+pub(crate) unsafe fn init(config: Config) {
+    // Set voltage scale
+    while PWR.csr().read().vosf() {}
+    PWR.cr().write(|w| w.set_vos(config.voltage_scale));
+    while PWR.csr().read().vosf() {}
+
+    let (sys_clk, sw) = match config.mux {
+        ClockSrc::MSI(range) => {
+            // Set MSI range
+            RCC.icscr().write(|w| w.set_msirange(range));
+
+            // Enable MSI
+            RCC.cr().write(|w| w.set_msion(true));
+            while !RCC.cr().read().msirdy() {}
+
+            let freq = 32_768 * (1 << (range as u8 + 1));
+            (Hertz(freq), Sw::MSI)
+        }
+        ClockSrc::HSI => {
+            // Enable HSI
+            RCC.cr().write(|w| w.set_hsion(true));
+            while !RCC.cr().read().hsirdy() {}
+
+            (HSI_FREQ, Sw::HSI)
+        }
+        ClockSrc::HSE(freq) => {
+            // Enable HSE
+            RCC.cr().write(|w| w.set_hseon(true));
+            while !RCC.cr().read().hserdy() {}
+
+            (freq, Sw::HSE)
+        }
+        ClockSrc::PLL(src, mul, div) => {
+            let freq = match src {
+                PLLSource::HSE(freq) => {
+                    // Enable HSE
+                    RCC.cr().write(|w| w.set_hseon(true));
+                    while !RCC.cr().read().hserdy() {}
+                    freq
+                }
+                PLLSource::HSI => {
+                    // Enable HSI
+                    RCC.cr().write(|w| w.set_hsion(true));
+                    while !RCC.cr().read().hsirdy() {}
+                    HSI_FREQ
+                }
+            };
+
+            // Disable PLL
+            RCC.cr().modify(|w| w.set_pllon(false));
+            while RCC.cr().read().pllrdy() {}
+
+            let freq = freq * mul / div;
+
+            assert!(freq <= Hertz(32_000_000));
+
+            RCC.cfgr().write(move |w| {
+                w.set_pllmul(mul);
+                w.set_plldiv(div);
+                w.set_pllsrc(src.into());
+            });
+
+            // Enable PLL
+            RCC.cr().modify(|w| w.set_pllon(true));
+            while !RCC.cr().read().pllrdy() {}
+
+            (freq, Sw::PLL1_P)
+        }
+    };
+
+    let rtc = config.ls.init();
+
+    let wait_states = match (config.voltage_scale, sys_clk.0) {
+        (VoltageScale::RANGE1, ..=16_000_000) => 0,
+        (VoltageScale::RANGE2, ..=8_000_000) => 0,
+        (VoltageScale::RANGE3, ..=4_200_000) => 0,
+        _ => 1,
+    };
+
+    #[cfg(stm32l1)]
+    FLASH.acr().write(|w| w.set_acc64(true));
+    FLASH.acr().modify(|w| w.set_prften(true));
+    FLASH.acr().modify(|w| w.set_latency(wait_states != 0));
+
+    RCC.cfgr().modify(|w| {
+        w.set_sw(sw);
+        w.set_hpre(config.ahb_pre);
+        w.set_ppre1(config.apb1_pre);
+        w.set_ppre2(config.apb2_pre);
+    });
+
+    let hclk1 = sys_clk / config.ahb_pre;
+    let (pclk1, pclk1_tim) = super::util::calc_pclk(hclk1, config.apb1_pre);
+    let (pclk2, pclk2_tim) = super::util::calc_pclk(hclk1, config.apb2_pre);
+
+    #[cfg(crs)]
+    if config.enable_hsi48 {
+        // Reset CRS peripheral
+        RCC.apb1rstr().modify(|w| w.set_crsrst(true));
+        RCC.apb1rstr().modify(|w| w.set_crsrst(false));
+
+        // Enable CRS peripheral
+        RCC.apb1enr().modify(|w| w.set_crsen(true));
+
+        // Initialize CRS
+        CRS.cfgr().write(|w|
+
+        // Select LSE as synchronization source
+        w.set_syncsrc(crs::vals::Syncsrc::LSE));
+        CRS.cr().modify(|w| {
+            w.set_autotrimen(true);
+            w.set_cen(true);
+        });
+
+        // Enable VREFINT reference for HSI48 oscillator
+        SYSCFG.cfgr3().modify(|w| {
+            w.set_enref_hsi48(true);
+            w.set_en_vrefint(true);
+        });
+
+        // Select HSI48 as USB clock
+        RCC.ccipr().modify(|w| w.set_hsi48msel(true));
+
+        // Enable dedicated USB clock
+        RCC.crrcr().modify(|w| w.set_hsi48on(true));
+        while !RCC.crrcr().read().hsi48rdy() {}
+    }
+
+    set_freqs(Clocks {
+        sys: sys_clk,
+        hclk1,
+        pclk1,
+        pclk2,
+        pclk1_tim,
+        pclk2_tim,
+        rtc,
+    });
+}
--- a/embassy-stm32/src/rcc/l4l5.rs
+++ b/embassy-stm32/src/rcc/l4l5.rs
@ -1,13 +1,12 @@
-#[cfg(any(stm32l0, stm32l1))]
-pub use crate::pac::pwr::vals::Vos as VoltageScale;
 use crate::pac::rcc::regs::Cfgr;
-#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
-pub use crate::pac::rcc::vals::Adcsel as AdcClockSource;
-#[cfg(any(rcc_l0_v2, stm32l4, stm32l5, stm32wb))]
+#[cfg(any(stm32l4, stm32l5, stm32wb))]
 pub use crate::pac::rcc::vals::Clk48sel as Clk48Src;
 #[cfg(any(stm32wb, stm32wl))]
 pub use crate::pac::rcc::vals::Hsepre as HsePrescaler;
-pub use crate::pac::rcc::vals::{Hpre as AHBPrescaler, Msirange as MSIRange, Ppre as APBPrescaler, Sw as ClockSrc};
+pub use crate::pac::rcc::vals::{
+    Hpre as AHBPrescaler, Msirange as MSIRange, Pllm as PllPreDiv, Plln as PllMul, Pllp as PllPDiv, Pllq as PllQDiv,
+    Pllr as PllRDiv, Pllsrc as PLLSource, Ppre as APBPrescaler, Sw as ClockSrc,
+};
 use crate::pac::{FLASH, RCC};
 use crate::rcc::{set_freqs, Clocks};
 use crate::time::Hertz;
@ -34,14 +33,33 @@ pub struct Hse {
    pub prescaler: HsePrescaler,
 }

-/// Clocks configuration
+#[derive(Clone, Copy)]
+pub struct Pll {
+    /// PLL source
+    pub source: PLLSource,
+
+    /// PLL pre-divider (DIVM).
+    pub prediv: PllPreDiv,
+
+    /// PLL multiplication factor.
+    pub mul: PllMul,
+
+    /// PLL P division factor. If None, PLL P output is disabled.
+    pub divp: Option<PllPDiv>,
+    /// PLL Q division factor. If None, PLL Q output is disabled.
+    pub divq: Option<PllQDiv>,
+    /// PLL R division factor. If None, PLL R output is disabled.
+    pub divr: Option<PllRDiv>,
+}
+
+/// Clocks configutation
 pub struct Config {
    // base clock sources
    pub msi: Option<MSIRange>,
    pub hsi: bool,
    pub hse: Option<Hse>,
-    #[cfg(crs)]
-    pub hsi48: Option<super::Hsi48Config>,
+    #[cfg(any(all(stm32l4, not(any(stm32l47x, stm32l48x))), stm32l5, stm32wb))]
+    pub hsi48: bool,

    // pll
    pub pll: Option<Pll>,
@ -61,17 +79,11 @@ pub struct Config {
    pub shared_ahb_pre: AHBPrescaler,

    // muxes
-    #[cfg(any(rcc_l0_v2, stm32l4, stm32l5, stm32wb))]
+    #[cfg(any(stm32l4, stm32l5, stm32wb))]
    pub clk48_src: Clk48Src,

    // low speed LSI/LSE/RTC
    pub ls: super::LsConfig,
-
-    #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
-    pub adc_clock_source: AdcClockSource,
-
-    #[cfg(any(stm32l0, stm32l1))]
-    pub voltage_scale: VoltageScale,
 }

 impl Default for Config {
@ -94,15 +106,11 @@ impl Default for Config {
            pllsai1: None,
            #[cfg(any(stm32l47x, stm32l48x, stm32l49x, stm32l4ax, rcc_l4plus, stm32l5))]
            pllsai2: None,
-            #[cfg(crs)]
-            hsi48: Some(Default::default()),
-            #[cfg(any(rcc_l0_v2, stm32l4, stm32l5, stm32wb))]
+            #[cfg(any(all(stm32l4, not(any(stm32l47x, stm32l48x))), stm32l5, stm32wb))]
+            hsi48: true,
+            #[cfg(any(stm32l4, stm32l5, stm32wb))]
            clk48_src: Clk48Src::HSI48,
            ls: Default::default(),
-            #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
-            adc_clock_source: AdcClockSource::SYS,
-            #[cfg(any(stm32l0, stm32l1))]
-            voltage_scale: VoltageScale::RANGE1,
        }
    }
 }
@ -115,8 +123,7 @@ pub const WPAN_DEFAULT: Config = Config {
        prescaler: HsePrescaler::DIV1,
    }),
    mux: ClockSrc::PLL1_R,
-    #[cfg(crs)]
-    hsi48: Some(super::Hsi48Config { sync_from_usb: false }),
+    hsi48: true,
    msi: None,
    hsi: false,
    clk48_src: Clk48Src::PLL1_Q,
@ -124,7 +131,7 @@ pub const WPAN_DEFAULT: Config = Config {
    ls: super::LsConfig::default_lse(),

    pll: Some(Pll {
-        source: PllSource::HSE,
+        source: PLLSource::HSE,
        prediv: PllPreDiv::DIV2,
        mul: PllMul::MUL12,
        divp: Some(PllPDiv::DIV3), // 32 / 2 * 12 / 3 = 64Mhz
@ -138,29 +145,22 @@ pub const WPAN_DEFAULT: Config = Config {
    shared_ahb_pre: AHBPrescaler::DIV1,
    apb1_pre: APBPrescaler::DIV1,
    apb2_pre: APBPrescaler::DIV1,
-    adc_clock_source: AdcClockSource::SYS,
 };

-fn msi_enable(range: MSIRange) {
-    #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
-    RCC.cr().modify(|w| {
-        #[cfg(not(stm32wb))]
-        w.set_msirgsel(crate::pac::rcc::vals::Msirgsel::CR);
-        w.set_msirange(range);
-        w.set_msipllen(false);
-    });
-    #[cfg(any(stm32l0, stm32l1))]
-    RCC.icscr().modify(|w| w.set_msirange(range));
-
-    RCC.cr().modify(|w| w.set_msion(true));
-    while !RCC.cr().read().msirdy() {}
-}
-
 pub(crate) unsafe fn init(config: Config) {
    // Switch to MSI to prevent problems with PLL configuration.
    if !RCC.cr().read().msion() {
        // Turn on MSI and configure it to 4MHz.
-        msi_enable(MSIRange::RANGE4M)
+        RCC.cr().modify(|w| {
+            #[cfg(not(stm32wb))]
+            w.set_msirgsel(crate::pac::rcc::vals::Msirgsel::CR);
+            w.set_msirange(MSIRange::RANGE4M);
+            w.set_msipllen(false);
+            w.set_msion(true)
+        });
+
+        // Wait until MSI is running
+        while !RCC.cr().read().msirdy() {}
    }
    if RCC.cfgr().read().sws() != ClockSrc::MSI {
        // Set MSI as a clock source, reset prescalers.
@ -169,14 +169,6 @@ pub(crate) unsafe fn init(config: Config) {
        while RCC.cfgr().read().sws() != ClockSrc::MSI {}
    }

-    // Set voltage scale
-    #[cfg(any(stm32l0, stm32l1))]
-    {
-        while crate::pac::PWR.csr().read().vosf() {}
-        crate::pac::PWR.cr().write(|w| w.set_vos(config.voltage_scale));
-        while crate::pac::PWR.csr().read().vosf() {}
-    }
-
    #[cfg(stm32l5)]
    crate::pac::PWR.cr1().modify(|w| {
        w.set_vos(crate::pac::pwr::vals::Vos::RANGE0);
@ -185,16 +177,24 @@ pub(crate) unsafe fn init(config: Config) {
    let rtc = config.ls.init();

    let msi = config.msi.map(|range| {
-        msi_enable(range);
+        // Enable MSI
+        RCC.cr().modify(|w| {
+            #[cfg(not(stm32wb))]
+            w.set_msirgsel(crate::pac::rcc::vals::Msirgsel::CR);
+            w.set_msirange(range);
+            w.set_msion(true);
+
+            // If LSE is enabled, enable calibration of MSI
+            w.set_msipllen(config.ls.lse.is_some());
+        });
+        while !RCC.cr().read().msirdy() {}
+
+        // Enable as clock source for USB, RNG if running at 48 MHz
+        if range == MSIRange::RANGE48M {}
+
        msirange_to_hertz(range)
    });

-    // If LSE is enabled and the right freq, enable calibration of MSI
-    #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
-    if config.ls.lse.map(|x| x.frequency) == Some(Hertz(32_768)) {
-        RCC.cr().modify(|w| w.set_msipllen(true));
-    }
-
    let hsi = config.hsi.then(|| {
        RCC.cr().modify(|w| w.set_hsion(true));
        while !RCC.cr().read().hsirdy() {}
@ -215,13 +215,15 @@ pub(crate) unsafe fn init(config: Config) {
        hse.freq
    });

-    #[cfg(crs)]
-    let _hsi48 = config.hsi48.map(|config| {
-        //
-        super::init_hsi48(config)
+    #[cfg(any(all(stm32l4, not(any(stm32l47x, stm32l48x))), stm32l5, stm32wb))]
+    let hsi48 = config.hsi48.then(|| {
+        RCC.crrcr().modify(|w| w.set_hsi48on(true));
+        while !RCC.crrcr().read().hsi48rdy() {}
+
+        Hertz(48_000_000)
    });
-    #[cfg(not(crs))]
-    let _hsi48: Option<Hertz> = None;
+    #[cfg(any(stm32l47x, stm32l48x))]
+    let hsi48 = None;

    let _plls = [
        &config.pll,
@ -252,12 +254,7 @@ pub(crate) unsafe fn init(config: Config) {
        }),
    };

-    let pll_input = PllInput {
-        hse,
-        hsi,
-        #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
-        msi,
-    };
+    let pll_input = PllInput { hse, hsi, msi };
    let pll = init_pll(PllInstance::Pll, config.pll, &pll_input);
    #[cfg(any(stm32l4, stm32l5, stm32wb))]
    let pllsai1 = init_pll(PllInstance::Pllsai1, config.pllsai1, &pll_input);
@ -271,16 +268,13 @@ pub(crate) unsafe fn init(config: Config) {
        ClockSrc::PLL1_R => pll.r.unwrap(),
    };

-    #[cfg(any(rcc_l0_v2, stm32l4, stm32l5, stm32wb))]
+    #[cfg(stm32l4)]
    RCC.ccipr().modify(|w| w.set_clk48sel(config.clk48_src));
-    #[cfg(any(rcc_l0_v2))]
-    let _clk48 = match config.clk48_src {
-        Clk48Src::HSI48 => _hsi48,
-        Clk48Src::PLL1_VCO_DIV_2 => pll.clk48,
-    };
+    #[cfg(stm32l5)]
+    RCC.ccipr1().modify(|w| w.set_clk48sel(config.clk48_src));
    #[cfg(any(stm32l4, stm32l5, stm32wb))]
    let _clk48 = match config.clk48_src {
-        Clk48Src::HSI48 => _hsi48,
+        Clk48Src::HSI48 => hsi48,
        Clk48Src::MSI => msi,
        Clk48Src::PLLSAI1_Q => pllsai1.q,
        Clk48Src::PLL1_Q => pll.q,
@ -294,23 +288,16 @@ pub(crate) unsafe fn init(config: Config) {
    let hclk1 = sys_clk / config.ahb_pre;
    let (pclk1, pclk1_tim) = super::util::calc_pclk(hclk1, config.apb1_pre);
    let (pclk2, pclk2_tim) = super::util::calc_pclk(hclk1, config.apb2_pre);
-    #[cfg(any(stm32l4, stm32l5, stm32wlex))]
+    #[cfg(not(any(stm32wl5x, stm32wb)))]
    let hclk2 = hclk1;
    #[cfg(any(stm32wl5x, stm32wb))]
    let hclk2 = sys_clk / config.core2_ahb_pre;
-    #[cfg(any(stm32l4, stm32l5, stm32wlex))]
+    #[cfg(not(any(stm32wl, stm32wb)))]
    let hclk3 = hclk1;
-    #[cfg(any(stm32wl5x, stm32wb))]
+    #[cfg(any(stm32wl, stm32wb))]
    let hclk3 = sys_clk / config.shared_ahb_pre;

    // Set flash wait states
-    #[cfg(any(stm32l0, stm32l1))]
-    let latency = match (config.voltage_scale, sys_clk.0) {
-        (VoltageScale::RANGE1, ..=16_000_000) => false,
-        (VoltageScale::RANGE2, ..=8_000_000) => false,
-        (VoltageScale::RANGE3, ..=4_200_000) => false,
-        _ => true,
-    };
    #[cfg(stm32l4)]
    let latency = match hclk1.0 {
        0..=16_000_000 => 0,
@ -346,10 +333,6 @@ pub(crate) unsafe fn init(config: Config) {
        _ => 4,
    };

-    #[cfg(stm32l1)]
-    FLASH.acr().write(|w| w.set_acc64(true));
-    #[cfg(not(stm32l5))]
-    FLASH.acr().modify(|w| w.set_prften(true));
    FLASH.acr().modify(|w| w.set_latency(latency));
    while FLASH.acr().read().latency() != latency {}

@ -361,9 +344,6 @@ pub(crate) unsafe fn init(config: Config) {
    });
    while RCC.cfgr().read().sws() != config.mux {}

-    #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
-    RCC.ccipr().modify(|w| w.set_adcsel(config.adc_clock_source));
-
    #[cfg(any(stm32wl, stm32wb))]
    {
        RCC.extcfgr().modify(|w| {
@ -379,9 +359,7 @@ pub(crate) unsafe fn init(config: Config) {
    set_freqs(Clocks {
        sys: sys_clk,
        hclk1,
-        #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
        hclk2,
-        #[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
        hclk3,
        pclk1,
        pclk2,
@ -409,12 +387,6 @@ pub(crate) unsafe fn init(config: Config) {
    });
 }

-#[cfg(any(stm32l0, stm32l1))]
-fn msirange_to_hertz(range: MSIRange) -> Hertz {
-    Hertz(32_768 * (1 << (range as u8 + 1)))
-}
-
-#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
 fn msirange_to_hertz(range: MSIRange) -> Hertz {
    match range {
        MSIRange::RANGE100K => Hertz(100_000),
@ -433,6 +405,20 @@ fn msirange_to_hertz(range: MSIRange) -> Hertz {
    }
 }

+struct PllInput {
+    hsi: Option<Hertz>,
+    hse: Option<Hertz>,
+    msi: Option<Hertz>,
+}
+
+#[allow(unused)]
+#[derive(Default)]
+struct PllOutput {
+    p: Option<Hertz>,
+    q: Option<Hertz>,
+    r: Option<Hertz>,
+}
+
 #[derive(PartialEq, Eq, Clone, Copy)]
 enum PllInstance {
    Pll,
@ -461,182 +447,77 @@ fn pll_enable(instance: PllInstance, enabled: bool) {
    }
 }

-pub use pll::*;
+fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> PllOutput {
+    // Disable PLL
+    pll_enable(instance, false);

-#[cfg(any(stm32l0, stm32l1))]
-mod pll {
-    use super::{pll_enable, PllInstance};
-    pub use crate::pac::rcc::vals::{Plldiv as PllDiv, Pllmul as PllMul, Pllsrc as PllSource};
-    use crate::pac::RCC;
-    use crate::time::Hertz;
+    let Some(pll) = config else { return PllOutput::default() };

-    #[derive(Clone, Copy)]
-    pub struct Pll {
-        /// PLL source
-        pub source: PllSource,
-
-        /// PLL multiplication factor.
-        pub mul: PllMul,
-
-        /// PLL main output division factor.
-        pub div: PllDiv,
-    }
-
-    pub(super) struct PllInput {
-        pub hsi: Option<Hertz>,
-        pub hse: Option<Hertz>,
-    }
-
-    #[allow(unused)]
-    #[derive(Default)]
-    pub(super) struct PllOutput {
-        pub r: Option<Hertz>,
-        pub clk48: Option<Hertz>,
-    }
-
-    pub(super) fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> PllOutput {
-        // Disable PLL
-        pll_enable(instance, false);
-
-        let Some(pll) = config else { return PllOutput::default() };
-
-        let pll_src = match pll.source {
-            PllSource::HSE => unwrap!(input.hse),
-            PllSource::HSI => unwrap!(input.hsi),
-        };
-
-        let vco_freq = pll_src * pll.mul;
-
-        let r = vco_freq / pll.div;
-        let clk48 = (vco_freq == Hertz(96_000_000)).then_some(Hertz(48_000_000));
-
-        assert!(r <= Hertz(32_000_000));
-
-        RCC.cfgr().write(move |w| {
-            w.set_pllmul(pll.mul);
-            w.set_plldiv(pll.div);
-            w.set_pllsrc(pll.source);
-        });
-
-        // Enable PLL
-        pll_enable(instance, true);
-
-        PllOutput { r: Some(r), clk48 }
-    }
-}
-
-#[cfg(any(stm32l4, stm32l5, stm32wb, stm32wl))]
-mod pll {
-    use super::{pll_enable, PllInstance};
-    pub use crate::pac::rcc::vals::{
-        Pllm as PllPreDiv, Plln as PllMul, Pllp as PllPDiv, Pllq as PllQDiv, Pllr as PllRDiv, Pllsrc as PllSource,
+    let pll_src = match pll.source {
+        PLLSource::DISABLE => panic!("must not select PLL source as DISABLE"),
+        PLLSource::HSE => input.hse,
+        PLLSource::HSI => input.hsi,
+        PLLSource::MSI => input.msi,
    };
-    use crate::pac::RCC;
-    use crate::time::Hertz;

-    #[derive(Clone, Copy)]
-    pub struct Pll {
-        /// PLL source
-        pub source: PllSource,
+    let pll_src = pll_src.unwrap();

-        /// PLL pre-divider (DIVM).
-        pub prediv: PllPreDiv,
+    let vco_freq = pll_src / pll.prediv * pll.mul;

-        /// PLL multiplication factor.
-        pub mul: PllMul,
+    let p = pll.divp.map(|div| vco_freq / div);
+    let q = pll.divq.map(|div| vco_freq / div);
+    let r = pll.divr.map(|div| vco_freq / div);

-        /// PLL P division factor. If None, PLL P output is disabled.
-        pub divp: Option<PllPDiv>,
-        /// PLL Q division factor. If None, PLL Q output is disabled.
-        pub divq: Option<PllQDiv>,
-        /// PLL R division factor. If None, PLL R output is disabled.
-        pub divr: Option<PllRDiv>,
+    #[cfg(stm32l5)]
+    if instance == PllInstance::Pllsai2 {
+        assert!(q.is_none(), "PLLSAI2_Q is not available on L5");
+        assert!(r.is_none(), "PLLSAI2_R is not available on L5");
    }

-    pub(super) struct PllInput {
-        pub hsi: Option<Hertz>,
-        pub hse: Option<Hertz>,
-        pub msi: Option<Hertz>,
-    }
-
-    #[allow(unused)]
-    #[derive(Default)]
-    pub(super) struct PllOutput {
-        pub p: Option<Hertz>,
-        pub q: Option<Hertz>,
-        pub r: Option<Hertz>,
-    }
-
-    pub(super) fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> PllOutput {
-        // Disable PLL
-        pll_enable(instance, false);
-
-        let Some(pll) = config else { return PllOutput::default() };
-
-        let pll_src = match pll.source {
-            PllSource::DISABLE => panic!("must not select PLL source as DISABLE"),
-            PllSource::HSE => unwrap!(input.hse),
-            PllSource::HSI => unwrap!(input.hsi),
-            PllSource::MSI => unwrap!(input.msi),
+    macro_rules! write_fields {
+        ($w:ident) => {
+            $w.set_plln(pll.mul);
+            if let Some(divp) = pll.divp {
+                $w.set_pllp(divp);
+                $w.set_pllpen(true);
+            }
+            if let Some(divq) = pll.divq {
+                $w.set_pllq(divq);
+                $w.set_pllqen(true);
+            }
+            if let Some(divr) = pll.divr {
+                $w.set_pllr(divr);
+                $w.set_pllren(true);
+            }
        };
-
-        let vco_freq = pll_src / pll.prediv * pll.mul;
-
-        let p = pll.divp.map(|div| vco_freq / div);
-        let q = pll.divq.map(|div| vco_freq / div);
-        let r = pll.divr.map(|div| vco_freq / div);
-
-        #[cfg(stm32l5)]
-        if instance == PllInstance::Pllsai2 {
-            assert!(q.is_none(), "PLLSAI2_Q is not available on L5");
-            assert!(r.is_none(), "PLLSAI2_R is not available on L5");
-        }
-
-        macro_rules! write_fields {
-            ($w:ident) => {
-                $w.set_plln(pll.mul);
-                if let Some(divp) = pll.divp {
-                    $w.set_pllp(divp);
-                    $w.set_pllpen(true);
-                }
-                if let Some(divq) = pll.divq {
-                    $w.set_pllq(divq);
-                    $w.set_pllqen(true);
-                }
-                if let Some(divr) = pll.divr {
-                    $w.set_pllr(divr);
-                    $w.set_pllren(true);
-                }
-            };
-        }
-
-        match instance {
-            PllInstance::Pll => RCC.pllcfgr().write(|w| {
-                w.set_pllm(pll.prediv);
-                w.set_pllsrc(pll.source);
-                write_fields!(w);
-            }),
-            #[cfg(any(stm32l4, stm32l5, stm32wb))]
-            PllInstance::Pllsai1 => RCC.pllsai1cfgr().write(|w| {
-                #[cfg(any(rcc_l4plus, stm32l5))]
-                w.set_pllm(pll.prediv);
-                #[cfg(stm32l5)]
-                w.set_pllsrc(pll.source);
-                write_fields!(w);
-            }),
-            #[cfg(any(stm32l47x, stm32l48x, stm32l49x, stm32l4ax, rcc_l4plus, stm32l5))]
-            PllInstance::Pllsai2 => RCC.pllsai2cfgr().write(|w| {
-                #[cfg(any(rcc_l4plus, stm32l5))]
-                w.set_pllm(pll.prediv);
-                #[cfg(stm32l5)]
-                w.set_pllsrc(pll.source);
-                write_fields!(w);
-            }),
-        }
-
-        // Enable PLL
-        pll_enable(instance, true);
-
-        PllOutput { p, q, r }
    }
+
+    match instance {
+        PllInstance::Pll => RCC.pllcfgr().write(|w| {
+            w.set_pllm(pll.prediv);
+            w.set_pllsrc(pll.source);
+            write_fields!(w);
+        }),
+        #[cfg(any(stm32l4, stm32l5, stm32wb))]
+        PllInstance::Pllsai1 => RCC.pllsai1cfgr().write(|w| {
+            #[cfg(any(rcc_l4plus, stm32l5))]
+            w.set_pllm(pll.prediv);
+            #[cfg(stm32l5)]
+            w.set_pllsrc(pll.source);
+            write_fields!(w);
+        }),
+        #[cfg(any(stm32l47x, stm32l48x, stm32l49x, stm32l4ax, rcc_l4plus, stm32l5))]
+        PllInstance::Pllsai2 => RCC.pllsai2cfgr().write(|w| {
+            #[cfg(any(rcc_l4plus, stm32l5))]
+            w.set_pllm(pll.prediv);
+            #[cfg(stm32l5)]
+            w.set_pllsrc(pll.source);
+            write_fields!(w);
+        }),
+    }
+
+    // Enable PLL
+    pll_enable(instance, true);
+
+    PllOutput { p, q, r }
 }
--- a/embassy-stm32/src/rcc/mod.rs
+++ b/embassy-stm32/src/rcc/mod.rs
@ -9,20 +9,17 @@ mod mco;
 pub use bd::*;
 pub use mco::*;

-#[cfg(crs)]
-mod hsi48;
-#[cfg(crs)]
-pub use hsi48::*;
-
 #[cfg_attr(rcc_f0, path = "f0.rs")]
-#[cfg_attr(any(stm32f1), path = "f1.rs")]
-#[cfg_attr(any(stm32f3), path = "f3.rs")]
-#[cfg_attr(any(stm32f2, stm32f4, stm32f7), path = "f.rs")]
+#[cfg_attr(any(rcc_f1, rcc_f100, rcc_f1cl), path = "f1.rs")]
+#[cfg_attr(rcc_f2, path = "f2.rs")]
+#[cfg_attr(any(rcc_f3, rcc_f3_v2), path = "f3.rs")]
+#[cfg_attr(any(rcc_f4, rcc_f410, rcc_f7), path = "f4f7.rs")]
 #[cfg_attr(rcc_c0, path = "c0.rs")]
 #[cfg_attr(rcc_g0, path = "g0.rs")]
 #[cfg_attr(rcc_g4, path = "g4.rs")]
-#[cfg_attr(any(stm32h5, stm32h7), path = "h.rs")]
-#[cfg_attr(any(stm32l0, stm32l1, stm32l4, stm32l5, stm32wb, stm32wl), path = "l.rs")]
+#[cfg_attr(any(rcc_h5, rcc_h50, rcc_h7, rcc_h7rm0433, rcc_h7ab), path = "h.rs")]
+#[cfg_attr(any(rcc_l0, rcc_l0_v2, rcc_l1), path = "l0l1.rs")]
+#[cfg_attr(any(rcc_l4, rcc_l4plus, rcc_l5, rcc_wl5, rcc_wle, rcc_wb), path = "l4l5.rs")]
 #[cfg_attr(rcc_u5, path = "u5.rs")]
 #[cfg_attr(rcc_wba, path = "wba.rs")]
 mod _version;
@ -184,15 +181,6 @@ pub struct Clocks {
 }

 #[cfg(feature = "low-power")]
-/// Must be written within a critical section
-///
-/// May be read without a critical section
-pub(crate) static mut REFCOUNT_STOP1: u32 = 0;
-
-#[cfg(feature = "low-power")]
-/// Must be written within a critical section
-///
-/// May be read without a critical section
 pub(crate) static mut REFCOUNT_STOP2: u32 = 0;

 /// Frozen clock frequencies
--- a/embassy-stm32/src/rcc/u5.rs
+++ b/embassy-stm32/src/rcc/u5.rs
@ -35,7 +35,7 @@ impl Default for ClockSrc {
 #[derive(Clone, Copy)]
 pub struct PllConfig {
    /// The clock source for the PLL.
-    pub source: PllSource,
+    pub source: PllSrc,
    /// The PLL prescaler.
    ///
    /// The clock speed of the `source` divided by `m` must be between 4 and 16 MHz.
@ -57,7 +57,7 @@ impl PllConfig {
    /// A configuration for HSI / 1 * 10 / 1 = 160 MHz
    pub const fn hsi_160mhz() -> Self {
        PllConfig {
-            source: PllSource::HSI,
+            source: PllSrc::HSI,
            m: Pllm::DIV1,
            n: Plln::MUL10,
            r: Plldiv::DIV1,
@ -67,7 +67,7 @@ impl PllConfig {
    /// A configuration for MSIS @ 48 MHz / 3 * 10 / 1 = 160 MHz
    pub const fn msis_160mhz() -> Self {
        PllConfig {
-            source: PllSource::MSIS(Msirange::RANGE_48MHZ),
+            source: PllSrc::MSIS(Msirange::RANGE_48MHZ),
            m: Pllm::DIV3,
            n: Plln::MUL10,
            r: Plldiv::DIV1,
@ -76,7 +76,7 @@ impl PllConfig {
 }

 #[derive(Clone, Copy)]
-pub enum PllSource {
+pub enum PllSrc {
    /// Use an internal medium speed oscillator as the PLL source.
    MSIS(Msirange),
    /// Use the external high speed clock as the system PLL source.
@ -88,12 +88,12 @@ pub enum PllSource {
    HSI,
 }

-impl Into<Pllsrc> for PllSource {
+impl Into<Pllsrc> for PllSrc {
    fn into(self) -> Pllsrc {
        match self {
-            PllSource::MSIS(..) => Pllsrc::MSIS,
-            PllSource::HSE(..) => Pllsrc::HSE,
-            PllSource::HSI => Pllsrc::HSI,
+            PllSrc::MSIS(..) => Pllsrc::MSIS,
+            PllSrc::HSE(..) => Pllsrc::HSE,
+            PllSrc::HSI => Pllsrc::HSI,
        }
    }
 }
@ -115,7 +115,7 @@ pub struct Config {
    pub apb1_pre: APBPrescaler,
    pub apb2_pre: APBPrescaler,
    pub apb3_pre: APBPrescaler,
-    pub hsi48: Option<super::Hsi48Config>,
+    pub hsi48: bool,
    /// The voltage range influences the maximum clock frequencies for different parts of the
    /// device. In particular, system clocks exceeding 110 MHz require `RANGE1`, and system clocks
    /// exceeding 55 MHz require at least `RANGE2`.
@ -189,7 +189,7 @@ impl Default for Config {
            apb1_pre: APBPrescaler::DIV1,
            apb2_pre: APBPrescaler::DIV1,
            apb3_pre: APBPrescaler::DIV1,
-            hsi48: Some(Default::default()),
+            hsi48: true,
            voltage_range: VoltageScale::RANGE3,
            ls: Default::default(),
        }
@ -216,9 +216,9 @@ pub(crate) unsafe fn init(config: Config) {
        ClockSrc::PLL1_R(pll) => {
            // Configure the PLL source
            let source_clk = match pll.source {
-                PllSource::MSIS(range) => config.init_msis(range),
-                PllSource::HSE(hertz) => config.init_hse(hertz),
-                PllSource::HSI => config.init_hsi(),
+                PllSrc::MSIS(range) => config.init_msis(range),
+                PllSrc::HSE(hertz) => config.init_hse(hertz),
+                PllSrc::HSI => config.init_hsi(),
            };

            // Calculate the reference clock, which is the source divided by m
@ -322,7 +322,10 @@ pub(crate) unsafe fn init(config: Config) {
        }
    };

-    let _hsi48 = config.hsi48.map(super::init_hsi48);
+    if config.hsi48 {
+        RCC.cr().modify(|w| w.set_hsi48on(true));
+        while !RCC.cr().read().hsi48rdy() {}
+    }

    // The clock source is ready
    // Calculate and set the flash wait states
--- a/embassy-stm32/src/rcc/wba.rs
+++ b/embassy-stm32/src/rcc/wba.rs
@ -17,16 +17,16 @@ pub enum ClockSrc {
 }

 #[derive(Clone, Copy, Debug)]
-pub enum PllSource {
+pub enum PllSrc {
    HSE(Hertz),
    HSI,
 }

-impl Into<Pllsrc> for PllSource {
+impl Into<Pllsrc> for PllSrc {
    fn into(self) -> Pllsrc {
        match self {
-            PllSource::HSE(..) => Pllsrc::HSE,
-            PllSource::HSI => Pllsrc::HSI,
+            PllSrc::HSE(..) => Pllsrc::HSE,
+            PllSrc::HSI => Pllsrc::HSI,
        }
    }
 }
--- a/embassy-stm32/src/rtc/datetime.rs
+++ b/embassy-stm32/src/rtc/datetime.rs
@ -18,13 +18,9 @@ pub struct RtcInstant {
 }

 impl RtcInstant {
-    #[cfg(not(rtc_v2f2))]
-    pub(super) const fn from(second: u8, subsecond: u16) -> Result<Self, Error> {
-        if second > 59 {
-            Err(Error::InvalidSecond)
-        } else {
-            Ok(Self { second, subsecond })
-        }
+    #[allow(dead_code)]
+    pub(super) fn from(second: u8, subsecond: u16) -> Result<Self, super::RtcError> {
+        Ok(Self { second, subsecond })
    }
 }

@ -199,13 +195,13 @@ impl From<DateTime> for chrono::NaiveDateTime {
 #[derive(Copy, Clone, Debug, PartialEq, Eq, Ord, PartialOrd, Hash)]
 #[allow(missing_docs)]
 pub enum DayOfWeek {
-    Monday = 1,
-    Tuesday = 2,
-    Wednesday = 3,
-    Thursday = 4,
-    Friday = 5,
-    Saturday = 6,
-    Sunday = 7,
+    Monday = 0,
+    Tuesday = 1,
+    Wednesday = 2,
+    Thursday = 3,
+    Friday = 4,
+    Saturday = 5,
+    Sunday = 6,
 }

 #[cfg(feature = "chrono")]
@ -230,19 +226,37 @@ impl From<DayOfWeek> for chrono::Weekday {
    }
 }

-pub(super) const fn day_of_week_from_u8(v: u8) -> Result<DayOfWeek, Error> {
+fn day_of_week_from_u8(v: u8) -> Result<DayOfWeek, Error> {
    Ok(match v {
-        1 => DayOfWeek::Monday,
-        2 => DayOfWeek::Tuesday,
-        3 => DayOfWeek::Wednesday,
-        4 => DayOfWeek::Thursday,
-        5 => DayOfWeek::Friday,
-        6 => DayOfWeek::Saturday,
-        7 => DayOfWeek::Sunday,
+        0 => DayOfWeek::Monday,
+        1 => DayOfWeek::Tuesday,
+        2 => DayOfWeek::Wednesday,
+        3 => DayOfWeek::Thursday,
+        4 => DayOfWeek::Friday,
+        5 => DayOfWeek::Saturday,
+        6 => DayOfWeek::Sunday,
        x => return Err(Error::InvalidDayOfWeek(x)),
    })
 }

-pub(super) const fn day_of_week_to_u8(dotw: DayOfWeek) -> u8 {
+pub(super) fn day_of_week_to_u8(dotw: DayOfWeek) -> u8 {
    dotw as u8
 }
+
+pub(super) fn validate_datetime(dt: &DateTime) -> Result<(), Error> {
+    if dt.year > 4095 {
+        Err(Error::InvalidYear)
+    } else if dt.month < 1 || dt.month > 12 {
+        Err(Error::InvalidMonth)
+    } else if dt.day < 1 || dt.day > 31 {
+        Err(Error::InvalidDay)
+    } else if dt.hour > 23 {
+        Err(Error::InvalidHour)
+    } else if dt.minute > 59 {
+        Err(Error::InvalidMinute)
+    } else if dt.second > 59 {
+        Err(Error::InvalidSecond)
+    } else {
+        Ok(())
+    }
+}
--- a/embassy-stm32/src/rtc/mod.rs
+++ b/embassy-stm32/src/rtc/mod.rs
@ -9,11 +9,8 @@ use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
 #[cfg(feature = "low-power")]
 use embassy_sync::blocking_mutex::Mutex;

-use self::datetime::day_of_week_to_u8;
-#[cfg(not(rtc_v2f2))]
-use self::datetime::RtcInstant;
-pub use self::datetime::{DateTime, DayOfWeek, Error as DateTimeError};
-use crate::pac::rtc::regs::{Dr, Tr};
+pub use self::datetime::{DateTime, DayOfWeek, Error as DateTimeError, RtcInstant};
+use crate::rtc::datetime::day_of_week_to_u8;
 use crate::time::Hertz;

 /// refer to AN4759 to compare features of RTC2 and RTC3
@ -33,71 +30,12 @@ use embassy_hal_internal::Peripheral;
 use crate::peripherals::RTC;
 use crate::rtc::sealed::Instance;

-#[allow(dead_code)]
-#[repr(u8)]
-#[derive(Clone, Copy, Debug)]
-pub(crate) enum WakeupPrescaler {
-    Div2 = 2,
-    Div4 = 4,
-    Div8 = 8,
-    Div16 = 16,
-}
-
-#[cfg(any(stm32wb, stm32f4, stm32l0, stm32g4))]
-impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel {
-    fn from(val: WakeupPrescaler) -> Self {
-        use crate::pac::rtc::vals::Wucksel;
-
-        match val {
-            WakeupPrescaler::Div2 => Wucksel::DIV2,
-            WakeupPrescaler::Div4 => Wucksel::DIV4,
-            WakeupPrescaler::Div8 => Wucksel::DIV8,
-            WakeupPrescaler::Div16 => Wucksel::DIV16,
-        }
-    }
-}
-
-#[cfg(any(stm32wb, stm32f4, stm32l0, stm32g4))]
-impl From<crate::pac::rtc::vals::Wucksel> for WakeupPrescaler {
-    fn from(val: crate::pac::rtc::vals::Wucksel) -> Self {
-        use crate::pac::rtc::vals::Wucksel;
-
-        match val {
-            Wucksel::DIV2 => WakeupPrescaler::Div2,
-            Wucksel::DIV4 => WakeupPrescaler::Div4,
-            Wucksel::DIV8 => WakeupPrescaler::Div8,
-            Wucksel::DIV16 => WakeupPrescaler::Div16,
-            _ => unreachable!(),
-        }
-    }
-}
-
-#[cfg(feature = "low-power")]
-impl WakeupPrescaler {
-    pub fn compute_min(val: u32) -> Self {
-        *[
-            WakeupPrescaler::Div2,
-            WakeupPrescaler::Div4,
-            WakeupPrescaler::Div8,
-            WakeupPrescaler::Div16,
-        ]
-        .iter()
-        .skip_while(|psc| **psc as u32 <= val)
-        .next()
-        .unwrap_or(&WakeupPrescaler::Div16)
-    }
-}
-
 /// Errors that can occur on methods on [RtcClock]
-#[non_exhaustive]
 #[derive(Clone, Debug, PartialEq, Eq)]
 pub enum RtcError {
    /// An invalid DateTime was given or stored on the hardware.
    InvalidDateTime(DateTimeError),

-    /// The current time could not be read
-    ReadFailure,
-
    /// The RTC clock is not running
    NotRunning,
 }
@ -107,25 +45,48 @@ pub struct RtcTimeProvider {
 }

 impl RtcTimeProvider {
-    #[cfg(not(rtc_v2f2))]
-    pub(crate) fn instant(&self) -> Result<RtcInstant, RtcError> {
-        self.read(|_, tr, ss| {
-            let second = bcd2_to_byte((tr.st(), tr.su()));
-
-            RtcInstant::from(second, ss).map_err(RtcError::InvalidDateTime)
-        })
-    }
-
    /// Return the current datetime.
    ///
    /// # Errors
    ///
    /// Will return an `RtcError::InvalidDateTime` if the stored value in the system is not a valid [`DayOfWeek`].
    pub fn now(&self) -> Result<DateTime, RtcError> {
-        self.read(|dr, tr, _| {
+        // For RM0433 we use BYPSHAD=1 to work around errata ES0392 2.19.1
+        #[cfg(rcc_h7rm0433)]
+        loop {
+            let r = RTC::regs();
+            let ss = r.ssr().read().ss();
+            let dr = r.dr().read();
+            let tr = r.tr().read();
+
+            // If an RTCCLK edge occurs during read we may see inconsistent values
+            // so read ssr again and see if it has changed. (see RM0433 Rev 7 46.3.9)
+            let ss_after = r.ssr().read().ss();
+            if ss == ss_after {
+                let second = bcd2_to_byte((tr.st(), tr.su()));
+                let minute = bcd2_to_byte((tr.mnt(), tr.mnu()));
+                let hour = bcd2_to_byte((tr.ht(), tr.hu()));
+
+                let weekday = dr.wdu();
+                let day = bcd2_to_byte((dr.dt(), dr.du()));
+                let month = bcd2_to_byte((dr.mt() as u8, dr.mu()));
+                let year = bcd2_to_byte((dr.yt(), dr.yu())) as u16 + 1970_u16;
+
+                return DateTime::from(year, month, day, weekday, hour, minute, second)
+                    .map_err(RtcError::InvalidDateTime);
+            }
+        }
+
+        #[cfg(not(rcc_h7rm0433))]
+        {
+            let r = RTC::regs();
+            let tr = r.tr().read();
            let second = bcd2_to_byte((tr.st(), tr.su()));
            let minute = bcd2_to_byte((tr.mnt(), tr.mnu()));
            let hour = bcd2_to_byte((tr.ht(), tr.hu()));
+            // Reading either RTC_SSR or RTC_TR locks the values in the higher-order
+            // calendar shadow registers until RTC_DR is read.
+            let dr = r.dr().read();

            let weekday = dr.wdu();
            let day = bcd2_to_byte((dr.dt(), dr.du()));
@ -133,33 +94,7 @@ impl RtcTimeProvider {
            let year = bcd2_to_byte((dr.yt(), dr.yu())) as u16 + 1970_u16;

            DateTime::from(year, month, day, weekday, hour, minute, second).map_err(RtcError::InvalidDateTime)
-        })
-    }
-
-    fn read<R>(&self, mut f: impl FnMut(Dr, Tr, u16) -> Result<R, RtcError>) -> Result<R, RtcError> {
-        let r = RTC::regs();
-
-        #[cfg(not(rtc_v2f2))]
-        let read_ss = || r.ssr().read().ss();
-        #[cfg(rtc_v2f2)]
-        let read_ss = || 0;
-
-        let mut ss = read_ss();
-        for _ in 0..5 {
-            let tr = r.tr().read();
-            let dr = r.dr().read();
-            let ss_after = read_ss();
-
-            // If an RTCCLK edge occurs during read we may see inconsistent values
-            // so read ssr again and see if it has changed. (see RM0433 Rev 7 46.3.9)
-            if ss == ss_after {
-                return f(dr, tr, ss.try_into().unwrap());
-            } else {
-                ss = ss_after
-            }
        }
-
-        return Err(RtcError::ReadFailure);
    }
 }

@ -208,7 +143,13 @@ impl Default for RtcCalibrationCyclePeriod {
 impl Rtc {
    pub fn new(_rtc: impl Peripheral<P = RTC>, rtc_config: RtcConfig) -> Self {
        #[cfg(not(any(stm32l0, stm32f3, stm32l1, stm32f0, stm32f2)))]
-        <RTC as crate::rcc::sealed::RccPeripheral>::enable_and_reset();
+        critical_section::with(|cs| {
+            <RTC as crate::rcc::sealed::RccPeripheral>::enable_and_reset_with_cs(cs);
+            #[cfg(feature = "low-power")]
+            unsafe {
+                crate::rcc::REFCOUNT_STOP2 -= 1
+            };
+        });

        let mut this = Self {
            #[cfg(feature = "low-power")]
@ -223,14 +164,6 @@ impl Rtc {

        this.configure(async_psc, sync_psc);

-        // Wait for the clock to update after initialization
-        #[cfg(not(rtc_v2f2))]
-        {
-            let now = this.instant().unwrap();
-
-            while this.instant().unwrap().subsecond == now.subsecond {}
-        }
-
        this
    }

@ -250,6 +183,7 @@ impl Rtc {
    ///
    /// Will return `RtcError::InvalidDateTime` if the datetime is not a valid range.
    pub fn set_datetime(&mut self, t: DateTime) -> Result<(), RtcError> {
+        self::datetime::validate_datetime(&t).map_err(RtcError::InvalidDateTime)?;
        self.write(true, |rtc| {
            let (ht, hu) = byte_to_bcd2(t.hour() as u8);
            let (mnt, mnu) = byte_to_bcd2(t.minute() as u8);
@ -289,8 +223,16 @@ impl Rtc {

    #[cfg(not(rtc_v2f2))]
    /// Return the current instant.
-    fn instant(&self) -> Result<RtcInstant, RtcError> {
-        self.time_provider().instant()
+    pub fn instant(&self) -> Result<RtcInstant, RtcError> {
+        let r = RTC::regs();
+        let tr = r.tr().read();
+        let subsecond = r.ssr().read().ss();
+        let second = bcd2_to_byte((tr.st(), tr.su()));
+
+        // Unlock the registers
+        r.dr().read();
+
+        RtcInstant::from(second, subsecond.try_into().unwrap())
    }

    /// Return the current datetime.
@ -332,114 +274,6 @@ impl Rtc {
    pub fn write_backup_register(&self, register: usize, value: u32) {
        RTC::write_backup_register(&RTC::regs(), register, value)
    }
-
-    #[cfg(feature = "low-power")]
-    /// start the wakeup alarm and wtih a duration that is as close to but less than
-    /// the requested duration, and record the instant the wakeup alarm was started
-    pub(crate) fn start_wakeup_alarm(
-        &self,
-        requested_duration: embassy_time::Duration,
-        cs: critical_section::CriticalSection,
-    ) {
-        use embassy_time::{Duration, TICK_HZ};
-
-        #[cfg(any(rtc_v3, rtc_v3u5))]
-        use crate::pac::rtc::vals::Calrf;
-
-        // Panic if the rcc mod knows we're not using low-power rtc
-        #[cfg(any(rcc_wb, rcc_f4, rcc_f410))]
-        unsafe { crate::rcc::get_freqs() }.rtc.unwrap();
-
-        let requested_duration = requested_duration.as_ticks().clamp(0, u32::MAX as u64);
-        let rtc_hz = Self::frequency().0 as u64;
-        let rtc_ticks = requested_duration * rtc_hz / TICK_HZ;
-        let prescaler = WakeupPrescaler::compute_min((rtc_ticks / u16::MAX as u64) as u32);
-
-        // adjust the rtc ticks to the prescaler and subtract one rtc tick
-        let rtc_ticks = rtc_ticks / prescaler as u64;
-        let rtc_ticks = rtc_ticks.clamp(0, (u16::MAX - 1) as u64).saturating_sub(1) as u16;
-
-        self.write(false, |regs| {
-            regs.cr().modify(|w| w.set_wute(false));
-
-            #[cfg(any(
-                rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
-            ))]
-            {
-                regs.isr().modify(|w| w.set_wutf(false));
-                while !regs.isr().read().wutwf() {}
-            }
-
-            #[cfg(any(rtc_v3, rtc_v3u5))]
-            {
-                regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR));
-                while !regs.icsr().read().wutwf() {}
-            }
-
-            regs.cr().modify(|w| w.set_wucksel(prescaler.into()));
-            regs.wutr().write(|w| w.set_wut(rtc_ticks));
-            regs.cr().modify(|w| w.set_wute(true));
-            regs.cr().modify(|w| w.set_wutie(true));
-        });
-
-        let instant = self.instant().unwrap();
-        trace!(
-            "rtc: start wakeup alarm for {} ms (psc: {}, ticks: {}) at {}",
-            Duration::from_ticks(rtc_ticks as u64 * TICK_HZ * prescaler as u64 / rtc_hz).as_millis(),
-            prescaler as u32,
-            rtc_ticks,
-            instant,
-        );
-
-        assert!(self.stop_time.borrow(cs).replace(Some(instant)).is_none())
-    }
-
-    #[cfg(feature = "low-power")]
-    /// stop the wakeup alarm and return the time elapsed since `start_wakeup_alarm`
-    /// was called, otherwise none
-    pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option<embassy_time::Duration> {
-        use crate::interrupt::typelevel::Interrupt;
-        #[cfg(any(rtc_v3, rtc_v3u5))]
-        use crate::pac::rtc::vals::Calrf;
-
-        let instant = self.instant().unwrap();
-        if RTC::regs().cr().read().wute() {
-            trace!("rtc: stop wakeup alarm at {}", instant);
-
-            self.write(false, |regs| {
-                regs.cr().modify(|w| w.set_wutie(false));
-                regs.cr().modify(|w| w.set_wute(false));
-
-                #[cfg(any(
-                    rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb
-                ))]
-                regs.isr().modify(|w| w.set_wutf(false));
-
-                #[cfg(any(rtc_v3, rtc_v3u5))]
-                regs.scr().write(|w| w.set_cwutf(Calrf::CLEAR));
-
-                crate::pac::EXTI
-                    .pr(0)
-                    .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
-
-                <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::unpend();
-            });
-        }
-
-        self.stop_time.borrow(cs).take().map(|stop_time| instant - stop_time)
-    }
-
-    #[cfg(feature = "low-power")]
-    pub(crate) fn enable_wakeup_line(&self) {
-        use crate::interrupt::typelevel::Interrupt;
-        use crate::pac::EXTI;
-
-        <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::unpend();
-        unsafe { <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::enable() };
-
-        EXTI.rtsr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
-        EXTI.imr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
-    }
 }

 pub(crate) fn byte_to_bcd2(byte: u8) -> (u8, u8) {
--- a/embassy-stm32/src/rtc/v2.rs
+++ b/embassy-stm32/src/rtc/v2.rs
@ -6,20 +6,158 @@ use crate::peripherals::RTC;
 use crate::rtc::sealed::Instance;

 #[allow(dead_code)]
+#[repr(u8)]
+#[derive(Clone, Copy, Debug)]
+pub(crate) enum WakeupPrescaler {
+    Div2 = 2,
+    Div4 = 4,
+    Div8 = 8,
+    Div16 = 16,
+}
+
+#[cfg(any(stm32wb, stm32f4, stm32l0))]
+impl From<WakeupPrescaler> for crate::pac::rtc::vals::Wucksel {
+    fn from(val: WakeupPrescaler) -> Self {
+        use crate::pac::rtc::vals::Wucksel;
+
+        match val {
+            WakeupPrescaler::Div2 => Wucksel::DIV2,
+            WakeupPrescaler::Div4 => Wucksel::DIV4,
+            WakeupPrescaler::Div8 => Wucksel::DIV8,
+            WakeupPrescaler::Div16 => Wucksel::DIV16,
+        }
+    }
+}
+
+#[cfg(any(stm32wb, stm32f4, stm32l0))]
+impl From<crate::pac::rtc::vals::Wucksel> for WakeupPrescaler {
+    fn from(val: crate::pac::rtc::vals::Wucksel) -> Self {
+        use crate::pac::rtc::vals::Wucksel;
+
+        match val {
+            Wucksel::DIV2 => WakeupPrescaler::Div2,
+            Wucksel::DIV4 => WakeupPrescaler::Div4,
+            Wucksel::DIV8 => WakeupPrescaler::Div8,
+            Wucksel::DIV16 => WakeupPrescaler::Div16,
+            _ => unreachable!(),
+        }
+    }
+}
+
+#[allow(dead_code)]
+impl WakeupPrescaler {
+    pub fn compute_min(val: u32) -> Self {
+        *[
+            WakeupPrescaler::Div2,
+            WakeupPrescaler::Div4,
+            WakeupPrescaler::Div8,
+            WakeupPrescaler::Div16,
+        ]
+        .iter()
+        .skip_while(|psc| **psc as u32 <= val)
+        .next()
+        .unwrap_or(&WakeupPrescaler::Div16)
+    }
+}
+
 impl super::Rtc {
+    #[cfg(feature = "low-power")]
+    /// start the wakeup alarm and wtih a duration that is as close to but less than
+    /// the requested duration, and record the instant the wakeup alarm was started
+    pub(crate) fn start_wakeup_alarm(
+        &self,
+        requested_duration: embassy_time::Duration,
+        cs: critical_section::CriticalSection,
+    ) {
+        use embassy_time::{Duration, TICK_HZ};
+
+        // Panic if the rcc mod knows we're not using low-power rtc
+        #[cfg(any(rcc_wb, rcc_f4, rcc_f410))]
+        unsafe { crate::rcc::get_freqs() }.rtc.unwrap();
+
+        let requested_duration = requested_duration.as_ticks().clamp(0, u32::MAX as u64);
+        let rtc_hz = Self::frequency().0 as u64;
+        let rtc_ticks = requested_duration * rtc_hz / TICK_HZ;
+        let prescaler = WakeupPrescaler::compute_min((rtc_ticks / u16::MAX as u64) as u32);
+
+        // adjust the rtc ticks to the prescaler and subtract one rtc tick
+        let rtc_ticks = rtc_ticks / prescaler as u64;
+        let rtc_ticks = rtc_ticks.clamp(0, (u16::MAX - 1) as u64).saturating_sub(1) as u16;
+
+        self.write(false, |regs| {
+            regs.cr().modify(|w| w.set_wute(false));
+            regs.isr().modify(|w| w.set_wutf(false));
+            while !regs.isr().read().wutwf() {}
+
+            regs.cr().modify(|w| w.set_wucksel(prescaler.into()));
+            regs.wutr().write(|w| w.set_wut(rtc_ticks));
+            regs.cr().modify(|w| w.set_wute(true));
+            regs.cr().modify(|w| w.set_wutie(true));
+        });
+
+        let instant = self.instant().unwrap();
+        trace!(
+            "rtc: start wakeup alarm for {} ms (psc: {}, ticks: {}) at {}",
+            Duration::from_ticks(rtc_ticks as u64 * TICK_HZ * prescaler as u64 / rtc_hz).as_millis(),
+            prescaler as u32,
+            rtc_ticks,
+            instant,
+        );
+
+        assert!(self.stop_time.borrow(cs).replace(Some(instant)).is_none())
+    }
+
+    #[cfg(feature = "low-power")]
+    /// stop the wakeup alarm and return the time elapsed since `start_wakeup_alarm`
+    /// was called, otherwise none
+    pub(crate) fn stop_wakeup_alarm(&self, cs: critical_section::CriticalSection) -> Option<embassy_time::Duration> {
+        use crate::interrupt::typelevel::Interrupt;
+
+        let instant = self.instant().unwrap();
+        if RTC::regs().cr().read().wute() {
+            trace!("rtc: stop wakeup alarm at {}", instant);
+
+            self.write(false, |regs| {
+                regs.cr().modify(|w| w.set_wutie(false));
+                regs.cr().modify(|w| w.set_wute(false));
+                regs.isr().modify(|w| w.set_wutf(false));
+
+                crate::pac::EXTI
+                    .pr(0)
+                    .modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
+
+                <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::unpend();
+            });
+        }
+
+        self.stop_time.borrow(cs).take().map(|stop_time| instant - stop_time)
+    }
+
+    #[cfg(feature = "low-power")]
+    pub(crate) fn enable_wakeup_line(&self) {
+        use crate::interrupt::typelevel::Interrupt;
+        use crate::pac::EXTI;
+
+        <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::unpend();
+        unsafe { <RTC as crate::rtc::sealed::Instance>::WakeupInterrupt::enable() };
+
+        EXTI.rtsr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
+        EXTI.imr(0).modify(|w| w.set_line(RTC::EXTI_WAKEUP_LINE, true));
+    }
+
    /// Applies the RTC config
    /// It this changes the RTC clock source the time will be reset
    pub(super) fn configure(&mut self, async_psc: u8, sync_psc: u16) {
        self.write(true, |rtc| {
            rtc.cr().modify(|w| {
-                #[cfg(not(rtc_v2f2))]
-                w.set_bypshad(true);
                #[cfg(rtc_v2f2)]
                w.set_fmt(false);
                #[cfg(not(rtc_v2f2))]
                w.set_fmt(stm32_metapac::rtc::vals::Fmt::TWENTY_FOUR_HOUR);
                w.set_osel(Osel::DISABLED);
                w.set_pol(Pol::HIGH);
+                #[cfg(rcc_h7rm0433)]
+                w.set_bypshad(true);
            });

            rtc.prer().modify(|w| {
--- a/embassy-stm32/src/rtc/v3.rs
+++ b/embassy-stm32/src/rtc/v3.rs
@ -11,7 +11,6 @@ impl super::Rtc {
    pub(super) fn configure(&mut self, async_psc: u8, sync_psc: u16) {
        self.write(true, |rtc| {
            rtc.cr().modify(|w| {
-                w.set_bypshad(true);
                w.set_fmt(Fmt::TWENTYFOURHOUR);
                w.set_osel(Osel::DISABLED);
                w.set_pol(Pol::HIGH);
@ -95,7 +94,7 @@ impl super::Rtc {
        })
    }

-    pub(super) fn write<F, R>(&self, init_mode: bool, f: F) -> R
+    pub(super) fn write<F, R>(&mut self, init_mode: bool, f: F) -> R
    where
        F: FnOnce(&crate::pac::rtc::Rtc) -> R,
    {
@ -129,12 +128,6 @@ impl super::Rtc {
 impl sealed::Instance for crate::peripherals::RTC {
    const BACKUP_REGISTER_COUNT: usize = 32;

-    #[cfg(all(feature = "low-power", stm32g4))]
-    const EXTI_WAKEUP_LINE: usize = 20;
-
-    #[cfg(all(feature = "low-power", stm32g4))]
-    type WakeupInterrupt = crate::interrupt::typelevel::RTC_WKUP;
-
    fn read_backup_register(_rtc: &Rtc, register: usize) -> Option<u32> {
        #[allow(clippy::if_same_then_else)]
        if register < Self::BACKUP_REGISTER_COUNT {
--- a/embassy-stm32/src/time_driver.rs
+++ b/embassy-stm32/src/time_driver.rs
@ -345,10 +345,6 @@ impl RtcDriver {
        });
    }

-    #[cfg(feature = "low-power")]
-    /// The minimum pause time beyond which the executor will enter a low-power state.
-    pub(crate) const MIN_STOP_PAUSE: embassy_time::Duration = embassy_time::Duration::from_millis(250);
-
    #[cfg(feature = "low-power")]
    /// Pause the timer if ready; return err if not
    pub(crate) fn pause_time(&self) -> Result<(), ()> {
@ -361,7 +357,7 @@ impl RtcDriver {
            self.stop_wakeup_alarm(cs);

            let time_until_next_alarm = self.time_until_next_alarm(cs);
-            if time_until_next_alarm < Self::MIN_STOP_PAUSE {
+            if time_until_next_alarm < embassy_time::Duration::from_millis(250) {
                Err(())
            } else {
                self.rtc
--- a/embassy-stm32/src/usb_otg/usb.rs
+++ b/embassy-stm32/src/usb_otg/usb.rs
@ -40,7 +40,6 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
        // Handle RX
        while r.gintsts().read().rxflvl() {
            let status = r.grxstsp().read();
-            trace!("=== status {:08x}", status.0);
            let ep_num = status.epnum() as usize;
            let len = status.bcnt() as usize;

@ -52,15 +51,6 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
                    assert!(len == 8, "invalid SETUP packet length={}", len);
                    assert!(ep_num == 0, "invalid SETUP packet endpoint={}", ep_num);

-                    // flushing TX if something stuck in control endpoint
-                    if r.dieptsiz(ep_num).read().pktcnt() != 0 {
-                        r.grstctl().modify(|w| {
-                            w.set_txfnum(ep_num as _);
-                            w.set_txfflsh(true);
-                        });
-                        while r.grstctl().read().txfflsh() {}
-                    }
-
                    if state.ep0_setup_ready.load(Ordering::Relaxed) == false {
                        // SAFETY: exclusive access ensured by atomic bool
                        let data = unsafe { &mut *state.ep0_setup_data.get() };
@ -106,11 +96,6 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
                }
                vals::Pktstsd::SETUP_DATA_DONE => {
                    trace!("SETUP_DATA_DONE ep={}", ep_num);
-
-                    if quirk_setup_late_cnak(r) {
-                        // Clear NAK to indicate we are ready to receive more data
-                        r.doepctl(ep_num).modify(|w| w.set_cnak(true));
-                    }
                }
                x => trace!("unknown PKTSTS: {}", x.to_bits()),
            }
@ -926,9 +911,11 @@ impl<'d, T: Instance> embassy_usb_driver::Bus for Bus<'d, T> {
                trace!("enumdne");

                let speed = r.dsts().read().enumspd();
-                let trdt = calculate_trdt(speed, T::frequency());
-                trace!("  speed={} trdt={}", speed.to_bits(), trdt);
-                r.gusbcfg().modify(|w| w.set_trdt(trdt));
+                trace!("  speed={}", speed.to_bits());
+
+                r.gusbcfg().modify(|w| {
+                    w.set_trdt(calculate_trdt(speed, T::frequency()));
+                });

                r.gintsts().write(|w| w.set_enumdne(true)); // clear
                Self::restore_irqs();
@ -1317,22 +1304,20 @@ impl<'d, T: Instance> embassy_usb_driver::ControlPipe for ControlPipe<'d, T> {

            state.ep_out_wakers[0].register(cx.waker());

-            let r = T::regs();
-
            if state.ep0_setup_ready.load(Ordering::Relaxed) {
                let data = unsafe { *state.ep0_setup_data.get() };
                state.ep0_setup_ready.store(false, Ordering::Release);

                // EP0 should not be controlled by `Bus` so this RMW does not need a critical section
                // Receive 1 SETUP packet
-                r.doeptsiz(self.ep_out.info.addr.index()).modify(|w| {
+                T::regs().doeptsiz(self.ep_out.info.addr.index()).modify(|w| {
                    w.set_rxdpid_stupcnt(1);
                });

                // Clear NAK to indicate we are ready to receive more data
-                if !quirk_setup_late_cnak(r) {
-                    r.doepctl(self.ep_out.info.addr.index()).modify(|w| w.set_cnak(true));
-                }
+                T::regs().doepctl(self.ep_out.info.addr.index()).modify(|w| {
+                    w.set_cnak(true);
+                });

                trace!("SETUP received: {:?}", data);
                Poll::Ready(data)
@ -1468,7 +1453,3 @@ fn calculate_trdt(speed: vals::Dspd, ahb_freq: Hertz) -> u8 {
        _ => unimplemented!(),
    }
 }
-
-fn quirk_setup_late_cnak(r: crate::pac::otg::Otg) -> bool {
-    r.cid().read().0 & 0xf000 == 0x1000
-}
--- a/embassy-sync/CHANGELOG.md
+++ b/embassy-sync/CHANGELOG.md
@ -5,14 +5,9 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
 and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).

-## 0.4.0 - 2023-10-31
-
- Re-add impl_trait_projections
- switch to `embedded-io 0.6`
-
 ## 0.3.0 - 2023-09-14

- switch to `embedded-io 0.5`
+- switch to embedded-io 0.5
 - add api for polling channels with context
 - standardise fn names on channels
 - add zero-copy channel
--- a/embassy-sync/Cargo.toml
+++ b/embassy-sync/Cargo.toml
@ -1,6 +1,6 @@
 [package]
 name = "embassy-sync"
-version = "0.4.0"
+version = "0.3.0"
 edition = "2021"
 description = "no-std, no-alloc synchronization primitives with async support"
 repository = "https://github.com/embassy-rs/embassy"
@ -33,7 +33,7 @@ log = { version = "0.4.14", optional = true }

 futures-util = { version = "0.3.17", default-features = false }
 critical-section = "1.1"
-heapless = "0.8"
+heapless = "0.7.5"
 cfg-if = "1.0.0"
 embedded-io-async = { version = "0.6.0", optional = true }

@ -45,4 +45,4 @@ futures-util = { version = "0.3.17", features = [ "channel" ] }

 # Enable critical-section implementation for std, for tests
 critical-section = { version = "1.1", features = ["std"] }
-static_cell = { version = "2" }
+static_cell = "1.1"
--- a/embassy-sync/src/lib.rs
+++ b/embassy-sync/src/lib.rs
@ -1,6 +1,5 @@
 #![cfg_attr(not(any(feature = "std", feature = "wasm")), no_std)]
-#![cfg_attr(feature = "nightly", feature(async_fn_in_trait, impl_trait_projections))]
-#![cfg_attr(feature = "nightly", allow(stable_features, unknown_lints, async_fn_in_trait))]
+#![cfg_attr(feature = "nightly", feature(async_fn_in_trait))]
 #![allow(clippy::new_without_default)]
 #![doc = include_str!("../README.md")]
 #![warn(missing_docs)]
--- a/embassy-time/Cargo.toml
+++ b/embassy-time/Cargo.toml
@ -59,9 +59,6 @@ generic-queue-32 = ["generic-queue"]
 generic-queue-64 = ["generic-queue"]
 generic-queue-128 = ["generic-queue"]

-# Create a `MockDriver` that can be manually advanced for testing purposes.
-mock-driver = ["tick-hz-1_000_000"]
-
 # Set the `embassy_time` tick rate.
 #
 # At most 1 `tick-*` feature can be enabled. If none is enabled, a default of 1MHz is used.
@ -248,7 +245,7 @@ embedded-hal-async = { version = "=1.0.0-rc.1", optional = true}
 futures-util = { version = "0.3.17", default-features = false }
 critical-section = "1.1"
 cfg-if = "1.0.0"
-heapless = "0.8"
+heapless = "0.7"

 # WASM dependencies
 wasm-bindgen = { version = "0.2.81", optional = true }
@ -258,4 +255,4 @@ wasm-timer = { version = "0.2.5", optional = true }
 [dev-dependencies]
 serial_test = "0.9"
 critical-section = { version = "1.1", features = ["std"] }
-embassy-executor = { version = "0.3.3", path = "../embassy-executor", features = ["nightly"] }
+embassy-executor = { version = "0.3.0", path = "../embassy-executor", features = ["nightly"] }
--- a/embassy-time/src/driver_mock.rs
+++ b/embassy-time/src/driver_mock.rs
@ -1,68 +0,0 @@
-use core::cell::Cell;
-
-use critical_section::Mutex as CsMutex;
-
-use crate::driver::{AlarmHandle, Driver};
-use crate::{Duration, Instant};
-
-/// A mock driver that can be manually advanced.
-/// This is useful for testing code that works with [`Instant`] and [`Duration`].
-///
-/// This driver cannot currently be used to test runtime functionality, such as
-/// timers, delays, etc.
-///
-/// # Example
-///
-/// ```ignore
-/// fn has_a_second_passed(reference: Instant) -> bool {
-///     Instant::now().duration_since(reference) >= Duration::from_secs(1)
-/// }
-///
-/// fn test_second_passed() {
-///     let driver = embassy_time::MockDriver::get();
-///     let reference = Instant::now();
-///     assert_eq!(false, has_a_second_passed(reference));
-///     driver.advance(Duration::from_secs(1));
-///     assert_eq!(true, has_a_second_passed(reference));
-/// }
-/// ```
-pub struct MockDriver {
-    now: CsMutex<Cell<Instant>>,
-}
-
-crate::time_driver_impl!(static DRIVER: MockDriver = MockDriver {
-    now: CsMutex::new(Cell::new(Instant::from_ticks(0))),
-});
-
-impl MockDriver {
-    /// Gets a reference to the global mock driver.
-    pub fn get() -> &'static MockDriver {
-        &DRIVER
-    }
-
-    /// Advances the time by the specified [`Duration`].
-    pub fn advance(&self, duration: Duration) {
-        critical_section::with(|cs| {
-            let now = self.now.borrow(cs).get().as_ticks();
-            self.now.borrow(cs).set(Instant::from_ticks(now + duration.as_ticks()));
-        });
-    }
-}
-
-impl Driver for MockDriver {
-    fn now(&self) -> u64 {
-        critical_section::with(|cs| self.now.borrow(cs).get().as_ticks() as u64)
-    }
-
-    unsafe fn allocate_alarm(&self) -> Option<AlarmHandle> {
-        unimplemented!("MockDriver does not support runtime features that require an executor");
-    }
-
-    fn set_alarm_callback(&self, _alarm: AlarmHandle, _callback: fn(*mut ()), _ctx: *mut ()) {
-        unimplemented!("MockDriver does not support runtime features that require an executor");
-    }
-
-    fn set_alarm(&self, _alarm: AlarmHandle, _timestamp: u64) -> bool {
-        unimplemented!("MockDriver does not support runtime features that require an executor");
-    }
-}
--- a/embassy-time/src/lib.rs
+++ b/embassy-time/src/lib.rs
@ -1,6 +1,5 @@
 #![cfg_attr(not(any(feature = "std", feature = "wasm", test)), no_std)]
 #![cfg_attr(feature = "nightly", feature(async_fn_in_trait))]
-#![cfg_attr(feature = "nightly", allow(stable_features, unknown_lints, async_fn_in_trait))]
 #![doc = include_str!("../README.md")]
 #![allow(clippy::new_without_default)]
 #![warn(missing_docs)]
@ -16,12 +15,6 @@ pub mod queue;
 mod tick;
 mod timer;

-#[cfg(feature = "mock-driver")]
-mod driver_mock;
-
-#[cfg(feature = "mock-driver")]
-pub use driver_mock::MockDriver;
-
 #[cfg(feature = "std")]
 mod driver_std;
 #[cfg(feature = "wasm")]
--- a/embassy-usb-driver/src/lib.rs
+++ b/embassy-usb-driver/src/lib.rs
@ -1,6 +1,5 @@
 #![no_std]
 #![feature(async_fn_in_trait)]
-#![allow(stable_features, unknown_lints, async_fn_in_trait)]
 #![doc = include_str!("../README.md")]
 #![warn(missing_docs)]

--- a/embassy-usb-logger/Cargo.toml
+++ b/embassy-usb-logger/Cargo.toml
@ -10,9 +10,9 @@ target = "thumbv7em-none-eabi"

 [dependencies]
 embassy-usb = { version = "0.1.0", path = "../embassy-usb" }
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 futures = { version = "0.3", default-features = false }
-static_cell = { version = "2" }
+static_cell = "1"
 usbd-hid = "0.6.0"
 log = "0.4"
--- a/embassy-usb-logger/src/lib.rs
+++ b/embassy-usb-logger/src/lib.rs
@ -19,7 +19,6 @@ pub struct LoggerState<'d> {
    device_descriptor: [u8; 32],
    config_descriptor: [u8; 128],
    bos_descriptor: [u8; 16],
-    msos_descriptor: [u8; 256],
    control_buf: [u8; 64],
 }

@ -31,7 +30,6 @@ impl<'d> LoggerState<'d> {
            device_descriptor: [0; 32],
            config_descriptor: [0; 128],
            bos_descriptor: [0; 16],
-            msos_descriptor: [0; 256],
            control_buf: [0; 64],
        }
    }
@ -75,7 +73,6 @@ impl<const N: usize> UsbLogger<N> {
            &mut state.device_descriptor,
            &mut state.config_descriptor,
            &mut state.bos_descriptor,
-            &mut state.msos_descriptor,
            &mut state.control_buf,
        );

--- a/embassy-usb/Cargo.toml
+++ b/embassy-usb/Cargo.toml
@ -13,6 +13,7 @@ target = "thumbv7em-none-eabi"
 [features]
 defmt = ["dep:defmt", "embassy-usb-driver/defmt"]
 usbd-hid = ["dep:usbd-hid", "dep:ssmarshal"]
+msos-descriptor = []
 default = ["usbd-hid"]

 # BEGIN AUTOGENERATED CONFIG FEATURES
@ -40,12 +41,12 @@ max-handler-count-8 = []
 [dependencies]
 embassy-futures = { version = "0.1.0", path = "../embassy-futures" }
 embassy-usb-driver = { version = "0.1.0", path = "../embassy-usb-driver" }
-embassy-sync = { version = "0.4.0", path = "../embassy-sync" }
+embassy-sync = { version = "0.3.0", path = "../embassy-sync" }
 embassy-net-driver-channel = { version = "0.2.0", path = "../embassy-net-driver-channel" }

 defmt = { version = "0.3", optional = true }
 log = { version = "0.4.14", optional = true }
-heapless = "0.8"
+heapless = "0.7.10"

 # for HID
 usbd-hid = { version = "0.6.0", optional = true }
--- a/embassy-usb/src/builder.rs
+++ b/embassy-usb/src/builder.rs
@ -3,6 +3,7 @@ use heapless::Vec;
 use crate::config::MAX_HANDLER_COUNT;
 use crate::descriptor::{BosWriter, DescriptorWriter};
 use crate::driver::{Driver, Endpoint, EndpointType};
+#[cfg(feature = "msos-descriptor")]
 use crate::msos::{DeviceLevelDescriptor, FunctionLevelDescriptor, MsOsDescriptorWriter};
 use crate::types::{InterfaceNumber, StringIndex};
 use crate::{Handler, Interface, UsbDevice, MAX_INTERFACE_COUNT, STRING_INDEX_CUSTOM_START};
@ -132,6 +133,7 @@ pub struct Builder<'d, D: Driver<'d>> {
    config_descriptor: DescriptorWriter<'d>,
    bos_descriptor: BosWriter<'d>,

+    #[cfg(feature = "msos-descriptor")]
    msos_descriptor: MsOsDescriptorWriter<'d>,
 }

@ -147,7 +149,7 @@ impl<'d, D: Driver<'d>> Builder<'d, D> {
        device_descriptor_buf: &'d mut [u8],
        config_descriptor_buf: &'d mut [u8],
        bos_descriptor_buf: &'d mut [u8],
-        msos_descriptor_buf: &'d mut [u8],
+        #[cfg(feature = "msos-descriptor")] msos_descriptor_buf: &'d mut [u8],
        control_buf: &'d mut [u8],
    ) -> Self {
        // Magic values specified in USB-IF ECN on IADs.
@ -187,12 +189,14 @@ impl<'d, D: Driver<'d>> Builder<'d, D> {
            config_descriptor,
            bos_descriptor,

+            #[cfg(feature = "msos-descriptor")]
            msos_descriptor: MsOsDescriptorWriter::new(msos_descriptor_buf),
        }
    }

    /// Creates the [`UsbDevice`] instance with the configuration in this builder.
    pub fn build(mut self) -> UsbDevice<'d, D> {
+        #[cfg(feature = "msos-descriptor")]
        let msos_descriptor = self.msos_descriptor.build(&mut self.bos_descriptor);

        self.config_descriptor.end_configuration();
@ -202,6 +206,7 @@ impl<'d, D: Driver<'d>> Builder<'d, D> {
        info!("USB: device_descriptor used: {}", self.device_descriptor.position());
        info!("USB: config_descriptor used: {}", self.config_descriptor.position());
        info!("USB: bos_descriptor used: {}", self.bos_descriptor.writer.position());
+        #[cfg(feature = "msos-descriptor")]
        info!("USB: msos_descriptor used: {}", msos_descriptor.len());
        info!("USB: control_buf size: {}", self.control_buf.len());

@ -212,9 +217,10 @@ impl<'d, D: Driver<'d>> Builder<'d, D> {
            self.device_descriptor.into_buf(),
            self.config_descriptor.into_buf(),
            self.bos_descriptor.writer.into_buf(),
-            msos_descriptor,
            self.interfaces,
            self.control_buf,
+            #[cfg(feature = "msos-descriptor")]
+            msos_descriptor,
        )
    }

@ -245,6 +251,7 @@ impl<'d, D: Driver<'d>> Builder<'d, D> {
            builder: self,
            iface_count_index,

+            #[cfg(feature = "msos-descriptor")]
            first_interface,
        }
    }
@ -268,6 +275,7 @@ impl<'d, D: Driver<'d>> Builder<'d, D> {
        StringIndex::new(index)
    }

+    #[cfg(feature = "msos-descriptor")]
    /// Add an MS OS 2.0 Descriptor Set.
    ///
    /// Panics if called more than once.
@ -275,11 +283,13 @@ impl<'d, D: Driver<'d>> Builder<'d, D> {
        self.msos_descriptor.header(windows_version, vendor_code);
    }

+    #[cfg(feature = "msos-descriptor")]
    /// Add an MS OS 2.0 Device Level Feature Descriptor.
    pub fn msos_feature<T: DeviceLevelDescriptor>(&mut self, desc: T) {
        self.msos_descriptor.device_feature(desc);
    }

+    #[cfg(feature = "msos-descriptor")]
    /// Gets the underlying [`MsOsDescriptorWriter`] to allow adding subsets and features for classes that
    /// do not add their own.
    pub fn msos_writer(&mut self) -> &mut MsOsDescriptorWriter<'d> {
@ -296,11 +306,13 @@ pub struct FunctionBuilder<'a, 'd, D: Driver<'d>> {
    builder: &'a mut Builder<'d, D>,
    iface_count_index: Option<usize>,

+    #[cfg(feature = "msos-descriptor")]
    first_interface: InterfaceNumber,
 }

 impl<'a, 'd, D: Driver<'d>> Drop for FunctionBuilder<'a, 'd, D> {
    fn drop(&mut self) {
+        #[cfg(feature = "msos-descriptor")]
        self.builder.msos_descriptor.end_function();
    }
 }
@ -332,6 +344,7 @@ impl<'a, 'd, D: Driver<'d>> FunctionBuilder<'a, 'd, D> {
        }
    }

+    #[cfg(feature = "msos-descriptor")]
    /// Add an MS OS 2.0 Function Level Feature Descriptor.
    pub fn msos_feature<T: FunctionLevelDescriptor>(&mut self, desc: T) {
        if !self.builder.msos_descriptor.is_in_config_subset() {
@ -342,6 +355,7 @@ impl<'a, 'd, D: Driver<'d>> FunctionBuilder<'a, 'd, D> {
            self.builder.msos_descriptor.function(self.first_interface);
        }

+        #[cfg(feature = "msos-descriptor")]
        self.builder.msos_descriptor.function_feature(desc);
    }
 }
--- a/embassy-usb/src/lib.rs
+++ b/embassy-usb/src/lib.rs
@ -175,7 +175,10 @@ pub struct UsbBufferReport {
    /// Number of bos descriptor bytes used
    pub bos_descriptor_used: usize,
    /// Number of msos descriptor bytes used
-    pub msos_descriptor_used: usize,
+    ///
+    /// Will be `None` if the "msos-descriptor" feature is not active.
+    /// Otherwise will return Some(bytes).
+    pub msos_descriptor_used: Option<usize>,
    /// Size of the control buffer
    pub control_buffer_size: usize,
 }
@ -194,7 +197,6 @@ struct Inner<'d, D: Driver<'d>> {
    device_descriptor: &'d [u8],
    config_descriptor: &'d [u8],
    bos_descriptor: &'d [u8],
-    msos_descriptor: crate::msos::MsOsDescriptorSet<'d>,

    device_state: UsbDeviceState,
    suspended: bool,
@ -210,6 +212,9 @@ struct Inner<'d, D: Driver<'d>> {

    interfaces: Vec<Interface, MAX_INTERFACE_COUNT>,
    handlers: Vec<&'d mut dyn Handler, MAX_HANDLER_COUNT>,
+
+    #[cfg(feature = "msos-descriptor")]
+    msos_descriptor: crate::msos::MsOsDescriptorSet<'d>,
 }

 impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
@ -220,9 +225,9 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
        device_descriptor: &'d [u8],
        config_descriptor: &'d [u8],
        bos_descriptor: &'d [u8],
-        msos_descriptor: crate::msos::MsOsDescriptorSet<'d>,
        interfaces: Vec<Interface, MAX_INTERFACE_COUNT>,
        control_buf: &'d mut [u8],
+        #[cfg(feature = "msos-descriptor")] msos_descriptor: crate::msos::MsOsDescriptorSet<'d>,
    ) -> UsbDevice<'d, D> {
        // Start the USB bus.
        // This prevent further allocation by consuming the driver.
@ -237,7 +242,6 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
                device_descriptor,
                config_descriptor,
                bos_descriptor,
-                msos_descriptor,

                device_state: UsbDeviceState::Unpowered,
                suspended: false,
@ -247,6 +251,8 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
                set_address_pending: false,
                interfaces,
                handlers,
+                #[cfg(feature = "msos-descriptor")]
+                msos_descriptor,
            },
        }
    }
@ -255,11 +261,16 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
    ///
    /// Useful for tuning buffer sizes for actual usage
    pub fn buffer_usage(&self) -> UsbBufferReport {
+        #[cfg(not(feature = "msos-descriptor"))]
+        let mdu = None;
+        #[cfg(feature = "msos-descriptor")]
+        let mdu = Some(self.inner.msos_descriptor.len());
+
        UsbBufferReport {
            device_descriptor_used: self.inner.device_descriptor.len(),
            config_descriptor_used: self.inner.config_descriptor.len(),
            bos_descriptor_used: self.inner.bos_descriptor.len(),
-            msos_descriptor_used: self.inner.msos_descriptor.len(),
+            msos_descriptor_used: mdu,
            control_buffer_size: self.control_buf.len(),
        }
    }
@ -395,16 +406,6 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
        let max_packet_size = self.control.max_packet_size();
        let mut total = 0;

-        if req_length > self.control_buf.len() {
-            warn!(
-                "got CONTROL OUT with length {} higher than the control_buf len {}, rejecting.",
-                req_length,
-                self.control_buf.len()
-            );
-            self.control.reject().await;
-            return;
-        }
-
        let chunks = self.control_buf[..req_length].chunks_mut(max_packet_size);
        for (first, last, chunk) in first_last(chunks) {
            let size = match self.control.data_out(chunk, first, last).await {
@ -673,7 +674,7 @@ impl<'d, D: Driver<'d>> Inner<'d, D> {
                }
                _ => InResponse::Rejected,
            },
-
+            #[cfg(feature = "msos-descriptor")]
            (RequestType::Vendor, Recipient::Device) => {
                if !self.msos_descriptor.is_empty()
                    && req.request == self.msos_descriptor.vendor_code()
--- a/embassy-usb/src/msos.rs
+++ b/embassy-usb/src/msos.rs
@ -1,3 +1,5 @@
+#![cfg(feature = "msos-descriptor")]
+
 //! Microsoft OS Descriptors
 //!
 //! <https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-os-2-0-descriptors-specification>
--- a/examples/boot/application/nrf/Cargo.toml
+++ b/examples/boot/application/nrf/Cargo.toml
@ -5,8 +5,8 @@ version = "0.1.0"
 license = "MIT OR Apache-2.0"

 [dependencies]
-embassy-sync = { version = "0.4.0", path = "../../../../embassy-sync" }
-embassy-executor = { version = "0.3.3", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers", "arch-cortex-m", "executor-thread"] }
+embassy-sync = { version = "0.3.0", path = "../../../../embassy-sync" }
+embassy-executor = { version = "0.3.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers", "arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.1.5", path = "../../../../embassy-time", features = ["nightly"] }
 embassy-nrf = { version = "0.1.0", path = "../../../../embassy-nrf", features = ["time-driver-rtc1", "gpiote", "nightly"] }
 embassy-boot = { version = "0.1.0", path = "../../../../embassy-boot/boot", features = ["nightly"] }
--- a/examples/boot/application/rp/Cargo.toml
+++ b/examples/boot/application/rp/Cargo.toml
@ -5,8 +5,8 @@ version = "0.1.0"
 license = "MIT OR Apache-2.0"

 [dependencies]
-embassy-sync = { version = "0.4.0", path = "../../../../embassy-sync" }
-embassy-executor = { version = "0.3.3", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers", "arch-cortex-m", "executor-thread"] }
+embassy-sync = { version = "0.3.0", path = "../../../../embassy-sync" }
+embassy-executor = { version = "0.3.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers", "arch-cortex-m", "executor-thread"] }
 embassy-time = { version = "0.1.5", path = "../../../../embassy-time", features = ["nightly"] }
 embassy-rp = { version = "0.1.0", path = "../../../../embassy-rp", features = ["time-driver", "unstable-traits", "nightly"] }
 embassy-boot-rp = { version = "0.1.0", path = "../../../../embassy-boot/rp", features = ["nightly"] }
--- a/examples/boot/application/stm32f3/Cargo.toml
+++ b/examples/boot/application/stm32f3/Cargo.toml
@ -5,8 +5,8 @@ version = "0.1.0"
 license = "MIT OR Apache-2.0"

 [dependencies]
-embassy-sync = { version = "0.4.0", path = "../../../../embassy-sync" }
-embassy-executor = { version = "0.3.3", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers"] }
+embassy-sync = { version = "0.3.0", path = "../../../../embassy-sync" }
+embassy-executor = { version = "0.3.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers"] }
 embassy-time = { version = "0.1.5", path = "../../../../embassy-time", features = ["nightly", "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["unstable-traits", "nightly", "stm32f303re", "time-driver-any", "exti"]  }
 embassy-boot-stm32 = { version = "0.1.0", path = "../../../../embassy-boot/stm32", features = ["nightly"] }
--- a/examples/boot/application/stm32f7/Cargo.toml
+++ b/examples/boot/application/stm32f7/Cargo.toml
@ -5,8 +5,8 @@ version = "0.1.0"
 license = "MIT OR Apache-2.0"

 [dependencies]
-embassy-sync = { version = "0.4.0", path = "../../../../embassy-sync" }
-embassy-executor = { version = "0.3.3", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers"] }
+embassy-sync = { version = "0.3.0", path = "../../../../embassy-sync" }
+embassy-executor = { version = "0.3.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers"] }
 embassy-time = { version = "0.1.5", path = "../../../../embassy-time", features = ["nightly", "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["unstable-traits", "nightly", "stm32f767zi", "time-driver-any", "exti"]  }
 embassy-boot-stm32 = { version = "0.1.0", path = "../../../../embassy-boot/stm32", features = ["nightly"] }
--- a/examples/boot/application/stm32h7/Cargo.toml
+++ b/examples/boot/application/stm32h7/Cargo.toml
@ -5,8 +5,8 @@ version = "0.1.0"
 license = "MIT OR Apache-2.0"

 [dependencies]
-embassy-sync = { version = "0.4.0", path = "../../../../embassy-sync" }
-embassy-executor = { version = "0.3.3", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers"] }
+embassy-sync = { version = "0.3.0", path = "../../../../embassy-sync" }
+embassy-executor = { version = "0.3.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers"] }
 embassy-time = { version = "0.1.5", path = "../../../../embassy-time", features = ["nightly", "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["unstable-traits", "nightly", "stm32h743zi", "time-driver-any", "exti"]  }
 embassy-boot-stm32 = { version = "0.1.0", path = "../../../../embassy-boot/stm32", features = ["nightly"] }
--- a/examples/boot/application/stm32l0/Cargo.toml
+++ b/examples/boot/application/stm32l0/Cargo.toml
@ -5,8 +5,8 @@ version = "0.1.0"
 license = "MIT OR Apache-2.0"

 [dependencies]
-embassy-sync = { version = "0.4.0", path = "../../../../embassy-sync" }
-embassy-executor = { version = "0.3.3", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers"] }
+embassy-sync = { version = "0.3.0", path = "../../../../embassy-sync" }
+embassy-executor = { version = "0.3.0", path = "../../../../embassy-executor", features = ["arch-cortex-m", "executor-thread", "nightly", "integrated-timers"] }
 embassy-time = { version = "0.1.5", path = "../../../../embassy-time", features = ["nightly", "tick-hz-32_768"] }
 embassy-stm32 = { version = "0.1.0", path = "../../../../embassy-stm32", features = ["unstable-traits", "nightly", "stm32l072cz", "time-driver-any", "exti", "memory-x"]  }
 embassy-boot-stm32 = { version = "0.1.0", path = "../../../../embassy-boot/stm32", features = ["nightly"] }
--- a/Show More
+++ b/Show More