216 lines
5.8 KiB
Rust
216 lines
5.8 KiB
Rust
#![no_std]
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#![feature(generic_associated_types)]
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#![feature(asm)]
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#![feature(min_type_alias_impl_trait)]
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#![feature(impl_trait_in_bindings)]
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#![feature(type_alias_impl_trait)]
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#![allow(incomplete_features)]
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#[cfg(not(any(
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feature = "52810",
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feature = "52811",
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feature = "52832",
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feature = "52833",
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feature = "52840",
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)))]
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compile_error!("No chip feature activated. You must activate exactly one of the following features: 52810, 52811, 52832, 52833, 52840");
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#[cfg(any(
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all(feature = "52810", feature = "52811"),
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all(feature = "52810", feature = "52832"),
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all(feature = "52810", feature = "52833"),
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all(feature = "52810", feature = "52840"),
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all(feature = "52811", feature = "52832"),
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all(feature = "52811", feature = "52833"),
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all(feature = "52811", feature = "52840"),
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all(feature = "52832", feature = "52833"),
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all(feature = "52832", feature = "52840"),
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all(feature = "52833", feature = "52840"),
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))]
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compile_error!("Multile chip features activated. You must activate exactly one of the following features: 52810, 52811, 52832, 52833, 52840");
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#[cfg(feature = "52810")]
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pub use nrf52810_pac as pac;
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#[cfg(feature = "52811")]
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pub use nrf52811_pac as pac;
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#[cfg(feature = "52832")]
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pub use nrf52832_pac as pac;
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#[cfg(feature = "52833")]
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pub use nrf52833_pac as pac;
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#[cfg(feature = "52840")]
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pub use nrf52840_pac as pac;
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#[cfg(feature = "52810")]
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pub use nrf52810_hal as hal;
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#[cfg(feature = "52811")]
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pub use nrf52811_hal as hal;
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#[cfg(feature = "52832")]
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pub use nrf52832_hal as hal;
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#[cfg(feature = "52833")]
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pub use nrf52833_hal as hal;
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#[cfg(feature = "52840")]
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pub use nrf52840_hal as hal;
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/// Length of Nordic EasyDMA differs for MCUs
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#[cfg(any(
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feature = "52810",
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feature = "52811",
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feature = "52832",
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feature = "51"
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))]
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pub mod target_constants {
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// NRF52832 8 bits1..0xFF
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pub const EASY_DMA_SIZE: usize = 255;
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// Easy DMA can only read from data ram
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pub const SRAM_LOWER: usize = 0x2000_0000;
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pub const SRAM_UPPER: usize = 0x3000_0000;
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}
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#[cfg(any(feature = "52840", feature = "52833", feature = "9160"))]
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pub mod target_constants {
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// NRF52840 and NRF9160 16 bits 1..0xFFFF
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pub const EASY_DMA_SIZE: usize = 65535;
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// Limits for Easy DMA - it can only read from data ram
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pub const SRAM_LOWER: usize = 0x2000_0000;
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pub const SRAM_UPPER: usize = 0x3000_0000;
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}
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/// Does this slice reside entirely within RAM?
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pub(crate) fn slice_in_ram(slice: &[u8]) -> bool {
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let ptr = slice.as_ptr() as usize;
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ptr >= target_constants::SRAM_LOWER && (ptr + slice.len()) < target_constants::SRAM_UPPER
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}
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/// Return an error if slice is not in RAM.
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#[cfg(not(feature = "51"))]
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pub(crate) fn slice_in_ram_or<T>(slice: &[u8], err: T) -> Result<(), T> {
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if slice.len() == 0 || slice_in_ram(slice) {
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Ok(())
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} else {
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Err(err)
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}
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}
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// This mod MUST go first, so that the others see its macros.
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pub(crate) mod fmt;
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pub mod buffered_uarte;
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pub mod gpio;
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pub mod gpiote;
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pub mod interrupt;
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#[cfg(feature = "52840")]
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pub mod qspi;
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pub mod rtc;
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pub mod saadc;
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pub mod spim;
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pub mod uarte;
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embassy_extras::peripherals! {
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// RTC
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rtc0: RTC0,
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rtc1: RTC1,
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#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
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rtc2: RTC2,
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// QSPI
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#[cfg(feature = "52840")]
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qspi: QSPI,
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// UARTE
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uarte0: UARTE0,
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#[cfg(any(feature = "52833", feature = "52840", feature = "9160"))]
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uarte1: UARTE1,
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// SPIM
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// TODO this is actually shared with SPI, SPIM, SPIS, TWI, TWIS, TWIS.
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// When they're all implemented, they should be only one peripheral here.
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spim0: SPIM0,
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#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
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spim1: SPIM1,
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#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
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spim2: SPIM2,
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#[cfg(any(feature = "52833", feature = "52840"))]
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spim3: SPIM3,
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// SAADC
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saadc: SAADC,
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// GPIOTE
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gpiote: GPIOTE,
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gpiote_ch_0: GPIOTE_CH0,
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gpiote_ch_1: GPIOTE_CH1,
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gpiote_ch_2: GPIOTE_CH2,
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gpiote_ch_3: GPIOTE_CH3,
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gpiote_ch_4: GPIOTE_CH4,
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gpiote_ch_5: GPIOTE_CH5,
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gpiote_ch_6: GPIOTE_CH6,
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gpiote_ch_7: GPIOTE_CH7,
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// GPIO port 0
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p0_00: P0_00,
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p0_01: P0_01,
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p0_02: P0_02,
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p0_03: P0_03,
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p0_04: P0_04,
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p0_05: P0_05,
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p0_06: P0_06,
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p0_07: P0_07,
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p0_08: P0_08,
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p0_09: P0_09,
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p0_10: P0_10,
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p0_11: P0_11,
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p0_12: P0_12,
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p0_13: P0_13,
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p0_14: P0_14,
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p0_15: P0_15,
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p0_16: P0_16,
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p0_17: P0_17,
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p0_18: P0_18,
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p0_19: P0_19,
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p0_20: P0_20,
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p0_21: P0_21,
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p0_22: P0_22,
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p0_23: P0_23,
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p0_24: P0_24,
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p0_25: P0_25,
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p0_26: P0_26,
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p0_27: P0_27,
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p0_28: P0_28,
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p0_29: P0_29,
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p0_30: P0_30,
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p0_31: P0_31,
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// GPIO port 1
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_00: P1_00,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_01: P1_01,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_02: P1_02,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_03: P1_03,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_04: P1_04,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_05: P1_05,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_06: P1_06,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_07: P1_07,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_08: P1_08,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_09: P1_09,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_10: P1_10,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_11: P1_11,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_12: P1_12,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_13: P1_13,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_14: P1_14,
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#[cfg(any(feature = "52833", feature = "52840"))]
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p1_15: P1_15,
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}
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