550 lines
16 KiB
Rust
550 lines
16 KiB
Rust
use core::marker::PhantomData;
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use atomic_polyfill::{AtomicU8, Ordering};
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use embedded_hal_02::blocking::delay::DelayUs;
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use pac::adc::vals::{Adcaldif, Boost, Difsel, Exten, Pcsel};
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use pac::adccommon::vals::Presc;
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use super::{AdcPin, Instance};
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use crate::time::Hertz;
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use crate::{pac, Peripheral};
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/// Default VREF voltage used for sample conversion to millivolts.
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pub const VREF_DEFAULT_MV: u32 = 3300;
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/// VREF voltage used for factory calibration of VREFINTCAL register.
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pub const VREF_CALIB_MV: u32 = 3300;
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pub enum Resolution {
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SixteenBit,
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FourteenBit,
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TwelveBit,
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TenBit,
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EightBit,
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}
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impl Default for Resolution {
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fn default() -> Self {
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Self::SixteenBit
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}
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}
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impl Resolution {
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fn res(&self) -> pac::adc::vals::Res {
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match self {
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Resolution::SixteenBit => pac::adc::vals::Res::SIXTEENBIT,
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Resolution::FourteenBit => pac::adc::vals::Res::FOURTEENBITV,
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Resolution::TwelveBit => pac::adc::vals::Res::TWELVEBITV,
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Resolution::TenBit => pac::adc::vals::Res::TENBIT,
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Resolution::EightBit => pac::adc::vals::Res::EIGHTBIT,
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}
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}
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pub fn to_max_count(&self) -> u32 {
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match self {
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Resolution::SixteenBit => (1 << 16) - 1,
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Resolution::FourteenBit => (1 << 14) - 1,
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Resolution::TwelveBit => (1 << 12) - 1,
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Resolution::TenBit => (1 << 10) - 1,
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Resolution::EightBit => (1 << 8) - 1,
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}
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}
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}
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pub trait InternalChannel<T>: sealed::InternalChannel<T> {}
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mod sealed {
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pub trait InternalChannel<T> {
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fn channel(&self) -> u8;
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}
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}
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// NOTE: Vrefint/Temperature/Vbat are only available on ADC3 on H7, this currently cannot be modeled with stm32-data, so these are available from the software on all ADCs
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pub struct VrefInt;
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impl<T: Instance> InternalChannel<T> for VrefInt {}
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impl<T: Instance> sealed::InternalChannel<T> for VrefInt {
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fn channel(&self) -> u8 {
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19
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}
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}
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pub struct Temperature;
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impl<T: Instance> InternalChannel<T> for Temperature {}
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impl<T: Instance> sealed::InternalChannel<T> for Temperature {
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fn channel(&self) -> u8 {
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18
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}
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}
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pub struct Vbat;
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impl<T: Instance> InternalChannel<T> for Vbat {}
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impl<T: Instance> sealed::InternalChannel<T> for Vbat {
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fn channel(&self) -> u8 {
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// TODO this should be 14 for H7a/b/35
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17
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}
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}
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static ADC12_ENABLE_COUNTER: AtomicU8 = AtomicU8::new(0);
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#[cfg(stm32h7)]
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foreach_peripheral!(
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(adc, ADC1) => {
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impl crate::rcc::sealed::RccPeripheral for crate::peripherals::ADC1 {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| unsafe {
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match crate::rcc::get_freqs().adc {
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Some(ck) => ck,
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None => panic!("Invalid ADC clock configuration, AdcClockSource was likely not properly configured.")
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}
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})
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}
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fn enable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb1enr().modify(|w| w.set_adc12en(true))
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});
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ADC12_ENABLE_COUNTER.fetch_add(1, Ordering::SeqCst);
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}
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fn disable() {
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if ADC12_ENABLE_COUNTER.load(Ordering::SeqCst) == 1 {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb1enr().modify(|w| w.set_adc12en(false));
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})
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}
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ADC12_ENABLE_COUNTER.fetch_sub(1, Ordering::SeqCst);
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}
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fn reset() {
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if ADC12_ENABLE_COUNTER.load(Ordering::SeqCst) == 1 {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb1rstr().modify(|w| w.set_adc12rst(true));
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crate::pac::RCC.ahb1rstr().modify(|w| w.set_adc12rst(false));
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});
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}
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}
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}
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impl crate::rcc::RccPeripheral for crate::peripherals::ADC1 {}
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};
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(adc, ADC2) => {
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impl crate::rcc::sealed::RccPeripheral for crate::peripherals::ADC2 {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| unsafe {
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match crate::rcc::get_freqs().adc {
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Some(ck) => ck,
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None => panic!("Invalid ADC clock configuration, AdcClockSource was likely not properly configured.")
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}
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})
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}
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fn enable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb1enr().modify(|w| w.set_adc12en(true))
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});
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ADC12_ENABLE_COUNTER.fetch_add(1, Ordering::SeqCst);
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}
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fn disable() {
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if ADC12_ENABLE_COUNTER.load(Ordering::SeqCst) == 1 {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb1enr().modify(|w| w.set_adc12en(false));
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})
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}
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ADC12_ENABLE_COUNTER.fetch_sub(1, Ordering::SeqCst);
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}
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fn reset() {
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if ADC12_ENABLE_COUNTER.load(Ordering::SeqCst) == 1 {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb1rstr().modify(|w| w.set_adc12rst(true));
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crate::pac::RCC.ahb1rstr().modify(|w| w.set_adc12rst(false));
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});
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}
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}
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}
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impl crate::rcc::RccPeripheral for crate::peripherals::ADC2 {}
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};
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(adc, ADC3) => {
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impl crate::rcc::sealed::RccPeripheral for crate::peripherals::ADC3 {
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fn frequency() -> crate::time::Hertz {
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critical_section::with(|_| unsafe {
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match crate::rcc::get_freqs().adc {
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Some(ck) => ck,
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None => panic!("Invalid ADC clock configuration, AdcClockSource was likely not properly configured.")
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}
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})
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}
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fn enable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb4enr().modify(|w| w.set_adc3en(true))
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});
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}
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fn disable() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb4enr().modify(|w| w.set_adc3en(false));
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})
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}
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fn reset() {
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critical_section::with(|_| unsafe {
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crate::pac::RCC.ahb4rstr().modify(|w| w.set_adc3rst(true));
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crate::pac::RCC.ahb4rstr().modify(|w| w.set_adc3rst(false));
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});
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}
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}
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impl crate::rcc::RccPeripheral for crate::peripherals::ADC3 {}
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};
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);
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/// ADC sample time
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///
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/// The default setting is 2.5 ADC clock cycles.
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#[derive(Clone, Copy, Debug, Eq, PartialEq, Ord, PartialOrd)]
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pub enum SampleTime {
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/// 1.5 ADC clock cycles
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Cycles1_5,
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/// 2.5 ADC clock cycles
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Cycles2_5,
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/// 8.5 ADC clock cycles
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Cycles8_5,
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/// 16.5 ADC clock cycles
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Cycles16_5,
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/// 32.5 ADC clock cycles
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Cycles32_5,
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/// 64.5 ADC clock cycles
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Cycles64_5,
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/// 387.5 ADC clock cycles
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Cycles387_5,
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/// 810.5 ADC clock cycles
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Cycles810_5,
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}
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impl SampleTime {
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pub(crate) fn sample_time(&self) -> pac::adc::vals::Smp {
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match self {
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SampleTime::Cycles1_5 => pac::adc::vals::Smp::CYCLES1_5,
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SampleTime::Cycles2_5 => pac::adc::vals::Smp::CYCLES2_5,
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SampleTime::Cycles8_5 => pac::adc::vals::Smp::CYCLES8_5,
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SampleTime::Cycles16_5 => pac::adc::vals::Smp::CYCLES16_5,
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SampleTime::Cycles32_5 => pac::adc::vals::Smp::CYCLES32_5,
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SampleTime::Cycles64_5 => pac::adc::vals::Smp::CYCLES64_5,
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SampleTime::Cycles387_5 => pac::adc::vals::Smp::CYCLES387_5,
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SampleTime::Cycles810_5 => pac::adc::vals::Smp::CYCLES810_5,
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}
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}
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}
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impl Default for SampleTime {
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fn default() -> Self {
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Self::Cycles1_5
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}
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}
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// NOTE (unused): The prescaler enum closely copies the hardware capabilities,
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// but high prescaling doesn't make a lot of sense in the current implementation and is ommited.
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#[allow(unused)]
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enum Prescaler {
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NotDivided,
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DividedBy2,
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DividedBy4,
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DividedBy6,
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DividedBy8,
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DividedBy10,
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DividedBy12,
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DividedBy16,
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DividedBy32,
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DividedBy64,
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DividedBy128,
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DividedBy256,
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}
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impl Prescaler {
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fn from_ker_ck(frequency: Hertz) -> Self {
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let raw_prescaler = frequency.0 / 50_000_000;
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match raw_prescaler {
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0 => Self::NotDivided,
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1 => Self::DividedBy2,
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2..=3 => Self::DividedBy4,
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4..=5 => Self::DividedBy6,
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6..=7 => Self::DividedBy8,
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8..=9 => Self::DividedBy10,
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10..=11 => Self::DividedBy12,
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_ => unimplemented!(),
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}
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}
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fn divisor(&self) -> u32 {
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match self {
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Prescaler::NotDivided => 1,
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Prescaler::DividedBy2 => 2,
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Prescaler::DividedBy4 => 4,
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Prescaler::DividedBy6 => 6,
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Prescaler::DividedBy8 => 8,
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Prescaler::DividedBy10 => 10,
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Prescaler::DividedBy12 => 12,
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Prescaler::DividedBy16 => 16,
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Prescaler::DividedBy32 => 32,
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Prescaler::DividedBy64 => 64,
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Prescaler::DividedBy128 => 128,
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Prescaler::DividedBy256 => 256,
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}
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}
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fn presc(&self) -> Presc {
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match self {
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Prescaler::NotDivided => Presc::DIV1,
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Prescaler::DividedBy2 => Presc::DIV2,
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Prescaler::DividedBy4 => Presc::DIV4,
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Prescaler::DividedBy6 => Presc::DIV6,
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Prescaler::DividedBy8 => Presc::DIV8,
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Prescaler::DividedBy10 => Presc::DIV10,
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Prescaler::DividedBy12 => Presc::DIV12,
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Prescaler::DividedBy16 => Presc::DIV16,
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Prescaler::DividedBy32 => Presc::DIV32,
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Prescaler::DividedBy64 => Presc::DIV64,
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Prescaler::DividedBy128 => Presc::DIV128,
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Prescaler::DividedBy256 => Presc::DIV256,
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}
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}
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}
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pub struct Adc<'d, T: Instance> {
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sample_time: SampleTime,
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vref_mv: u32,
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resolution: Resolution,
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phantom: PhantomData<&'d mut T>,
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}
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impl<'d, T: Instance + crate::rcc::RccPeripheral> Adc<'d, T> {
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pub fn new(_peri: impl Peripheral<P = T> + 'd, delay: &mut impl DelayUs<u16>) -> Self {
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embassy_hal_common::into_ref!(_peri);
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T::enable();
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T::reset();
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let prescaler = Prescaler::from_ker_ck(T::frequency());
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unsafe {
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T::common_regs().ccr().modify(|w| w.set_presc(prescaler.presc()));
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}
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let frequency = Hertz(T::frequency().0 / prescaler.divisor());
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info!("ADC frequency set to {} Hz", frequency.0);
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if frequency > Hertz::mhz(50) {
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panic!("Maximal allowed frequency for the ADC is 50 MHz and it varies with different packages, refer to ST docs for more information.");
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}
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let boost = if frequency < Hertz::khz(6_250) {
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Boost::LT6_25
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} else if frequency < Hertz::khz(12_500) {
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Boost::LT12_5
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} else if frequency < Hertz::mhz(25) {
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Boost::LT25
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} else {
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Boost::LT50
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};
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unsafe {
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T::regs().cr().modify(|w| w.set_boost(boost));
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}
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let mut s = Self {
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sample_time: Default::default(),
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vref_mv: VREF_DEFAULT_MV,
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resolution: Resolution::default(),
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phantom: PhantomData,
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};
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s.power_up(delay);
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s.configure_differential_inputs();
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s.calibrate();
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delay.delay_us(1);
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s.enable();
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s.configure();
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s
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}
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fn power_up(&mut self, delay: &mut impl DelayUs<u16>) {
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unsafe {
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T::regs().cr().modify(|reg| {
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reg.set_deeppwd(false);
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reg.set_advregen(true);
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});
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}
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delay.delay_us(10);
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}
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fn configure_differential_inputs(&mut self) {
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unsafe {
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T::regs().difsel().modify(|w| {
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for n in 0..20 {
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w.set_difsel(n, Difsel::SINGLEENDED);
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}
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})
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};
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}
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fn calibrate(&mut self) {
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unsafe {
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T::regs().cr().modify(|w| {
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w.set_adcaldif(Adcaldif::SINGLEENDED);
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w.set_adcallin(true);
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});
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T::regs().cr().modify(|w| w.set_adcal(true));
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while T::regs().cr().read().adcal() {}
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}
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}
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fn enable(&mut self) {
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unsafe {
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T::regs().isr().write(|w| w.set_adrdy(true));
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T::regs().cr().modify(|w| w.set_aden(true));
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while !T::regs().isr().read().adrdy() {}
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T::regs().isr().write(|w| w.set_adrdy(true));
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}
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}
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fn configure(&mut self) {
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// single conversion mode, software trigger
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unsafe {
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T::regs().cfgr().modify(|w| {
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w.set_cont(false);
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w.set_exten(Exten::DISABLED);
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})
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}
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}
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pub fn enable_vrefint(&self) -> VrefInt {
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unsafe {
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T::common_regs().ccr().modify(|reg| {
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reg.set_vrefen(true);
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});
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}
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VrefInt {}
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}
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pub fn enable_temperature(&self) -> Temperature {
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unsafe {
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T::common_regs().ccr().modify(|reg| {
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reg.set_vsenseen(true);
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});
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}
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Temperature {}
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}
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pub fn enable_vbat(&self) -> Vbat {
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unsafe {
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T::common_regs().ccr().modify(|reg| {
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reg.set_vbaten(true);
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});
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}
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Vbat {}
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}
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pub fn set_sample_time(&mut self, sample_time: SampleTime) {
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self.sample_time = sample_time;
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}
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pub fn set_resolution(&mut self, resolution: Resolution) {
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self.resolution = resolution;
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}
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/// Set VREF value in millivolts. This value is used for [to_millivolts()] sample conversion.
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///
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/// Use this if you have a known precise VREF (VDDA) pin reference voltage.
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pub fn set_vref_mv(&mut self, vref_mv: u32) {
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self.vref_mv = vref_mv;
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}
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/// Convert a measurement to millivolts
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pub fn to_millivolts(&self, sample: u16) -> u16 {
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((u32::from(sample) * self.vref_mv) / self.resolution.to_max_count()) as u16
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}
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/// Perform a single conversion.
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fn convert(&mut self) -> u16 {
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unsafe {
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T::regs().isr().modify(|reg| {
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reg.set_eos(true);
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reg.set_eoc(true);
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});
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// Start conversion
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T::regs().cr().modify(|reg| {
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reg.set_adstart(true);
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});
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while !T::regs().isr().read().eos() {
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// spin
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}
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T::regs().dr().read().0 as u16
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}
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}
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pub fn read<P>(&mut self, pin: &mut P) -> u16
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where
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P: AdcPin<T>,
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P: crate::gpio::sealed::Pin,
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{
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unsafe {
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pin.set_as_analog();
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self.read_channel(pin.channel())
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}
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}
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pub fn read_internal(&mut self, channel: &mut impl InternalChannel<T>) -> u16 {
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unsafe { self.read_channel(channel.channel()) }
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}
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unsafe fn read_channel(&mut self, channel: u8) -> u16 {
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// Configure ADC
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T::regs().cfgr().modify(|reg| reg.set_res(self.resolution.res()));
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// Configure channel
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Self::set_channel_sample_time(channel, self.sample_time);
|
|
|
|
T::regs().cfgr2().modify(|w| w.set_lshift(0));
|
|
T::regs()
|
|
.pcsel()
|
|
.write(|w| w.set_pcsel(channel as _, Pcsel::PRESELECTED));
|
|
T::regs().sqr1().write(|reg| {
|
|
reg.set_sq(0, channel);
|
|
reg.set_l(0);
|
|
});
|
|
|
|
self.convert()
|
|
}
|
|
|
|
unsafe fn set_channel_sample_time(ch: u8, sample_time: SampleTime) {
|
|
if ch <= 9 {
|
|
T::regs()
|
|
.smpr(0)
|
|
.modify(|reg| reg.set_smp(ch as _, sample_time.sample_time()));
|
|
} else {
|
|
T::regs()
|
|
.smpr(1)
|
|
.modify(|reg| reg.set_smp((ch - 10) as _, sample_time.sample_time()));
|
|
}
|
|
}
|
|
}
|