bors[bot] 01e5376b25 Merge #456 ... 456: Fix L4 clock setup for MSI and PLL to allow RNG operation r=Dirbaio a=lulf Example is tested on STM32L475VG. Co-authored-by: Ulf Lilleengen <lulf@redhat.com>		2021-10-26 11:59:14 +00:00
..
adc	stm32/adc: Add IN0 channel	2021-09-29 00:32:40 -04:00
can	partial alternate function configuration on STM32f1	2021-10-11 22:57:10 +02:00
crc	Pub use version-specific CRC symbols, not just the CRC struct.	2021-09-27 11:17:31 -07:00
dac	stm32/dac: Ensure that clock is enabled	2021-09-29 00:32:40 -04:00
dbgmcu	Add a Dbgmcu struct capable of enabling all relevant DBGMCU.cr fields.	2021-07-22 14:18:48 -04:00
dma	embassy: Refactor module structure to remove kitchen-sink util.	2021-09-11 02:35:35 +02:00
eth	partial alternate function configuration on STM32f1	2021-10-11 22:57:10 +02:00
i2c	Add implementation of async trait for STM32 I2C v2	2021-10-21 12:30:02 +02:00
pwr	Add pwr for L1 and update RCC to new reg block	2021-09-23 14:51:16 +02:00
rcc	Fix clock setup for MSI and PLL to allow RNG opereation	2021-10-26 13:45:53 +02:00
sdmmc	embassy: Refactor module structure to remove kitchen-sink util.	2021-09-11 02:35:35 +02:00
spi	Configure the correct pin instances	2021-10-21 11:57:00 +02:00
subghz	Updates	2021-09-15 12:46:20 +02:00
usart	Generate USART pin definitions for stm32f1	2021-10-11 22:57:21 +02:00
exti.rs	Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill)	2021-09-28 18:31:04 +02:00
fmt.rs	fmt: Add dunmy use to avoid "unused variable" errors when no log is enabled.	2021-06-07 03:21:37 +02:00
gpio.rs	Add AFType::Input for input configurations.	2021-10-11 22:57:21 +02:00
interrupt.rs	Rename embassy-extras to embassy-hal-common	2021-07-29 13:44:51 +02:00
lib.rs	First pass at CRC_V1	2021-09-26 16:46:17 -07:00
rng.rs	embassy: Refactor module structure to remove kitchen-sink util.	2021-09-11 02:35:35 +02:00
time_driver.rs	time: allow storing state inside the driver struct.	2021-08-25 21:06:27 +02:00
time.rs	More work on H7 RCC	2021-05-21 20:13:39 -03:00