2021-06-02 16:34:37 +02:00
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#![macro_use]
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2021-05-27 09:50:11 +02:00
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use core::mem::MaybeUninit;
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2021-06-14 10:48:14 +02:00
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2022-06-12 22:15:44 +02:00
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use crate::time::Hertz;
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2023-10-11 03:53:27 +02:00
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mod bd;
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2023-09-19 04:22:57 +02:00
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mod mco;
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2023-10-11 03:53:27 +02:00
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pub use bd::*;
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2023-09-19 04:22:57 +02:00
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pub use mco::*;
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2023-11-05 23:35:01 +01:00
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#[cfg(crs)]
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mod hsi48;
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#[cfg(crs)]
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pub use hsi48::*;
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2022-02-14 02:12:06 +01:00
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#[cfg_attr(rcc_f0, path = "f0.rs")]
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2023-11-13 01:56:28 +01:00
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#[cfg_attr(any(stm32f1), path = "f1.rs")]
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#[cfg_attr(any(stm32f3), path = "f3.rs")]
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#[cfg_attr(any(stm32f2, stm32f4, stm32f7), path = "f.rs")]
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2023-01-17 18:54:23 +01:00
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#[cfg_attr(rcc_c0, path = "c0.rs")]
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2022-01-04 19:25:50 +01:00
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#[cfg_attr(rcc_g0, path = "g0.rs")]
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#[cfg_attr(rcc_g4, path = "g4.rs")]
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2023-11-13 01:56:28 +01:00
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#[cfg_attr(any(stm32h5, stm32h7), path = "h.rs")]
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2023-11-13 01:05:07 +01:00
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#[cfg_attr(any(stm32l0, stm32l1, stm32l4, stm32l5, stm32wb, stm32wl), path = "l.rs")]
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2022-01-04 19:25:50 +01:00
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#[cfg_attr(rcc_u5, path = "u5.rs")]
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2023-09-16 03:44:01 +02:00
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#[cfg_attr(rcc_wba, path = "wba.rs")]
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2022-01-04 19:25:50 +01:00
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mod _version;
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2023-10-12 01:16:42 +02:00
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pub use _version::*;
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2022-01-04 19:25:50 +01:00
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2023-09-18 01:41:45 +02:00
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// Model Clock Configuration
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//
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// pub struct Clocks {
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// hse: Option<Hertz>,
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// hsi: bool,
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// lse: Option<Hertz>,
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// lsi: bool,
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// rtc: RtcSource,
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// }
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2023-01-20 16:31:04 +01:00
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#[derive(Clone, Copy, Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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2021-06-14 10:48:14 +02:00
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pub struct Clocks {
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pub sys: Hertz,
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2021-07-30 22:48:13 +02:00
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2022-02-14 02:12:06 +01:00
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// APB
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2023-10-16 02:51:35 +02:00
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pub pclk1: Hertz,
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pub pclk1_tim: Hertz,
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2023-01-17 18:54:23 +01:00
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#[cfg(not(any(rcc_c0, rcc_g0)))]
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2023-10-16 02:51:35 +02:00
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pub pclk2: Hertz,
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2023-01-17 18:54:23 +01:00
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#[cfg(not(any(rcc_c0, rcc_g0)))]
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2023-10-16 02:51:35 +02:00
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pub pclk2_tim: Hertz,
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2023-10-03 23:45:05 +02:00
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#[cfg(any(rcc_wl5, rcc_wle, rcc_h5, rcc_h50, rcc_h7, rcc_h7rm0433, rcc_h7ab, rcc_u5))]
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2023-10-16 02:51:35 +02:00
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pub pclk3: Hertz,
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2023-10-14 19:51:45 +02:00
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#[cfg(any(rcc_h7, rcc_h7rm0433, rcc_h7ab, stm32h5))]
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2023-10-16 02:51:35 +02:00
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pub pclk4: Hertz,
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2023-09-16 03:44:01 +02:00
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#[cfg(any(rcc_wba))]
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2023-10-16 02:51:35 +02:00
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pub pclk7: Hertz,
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2021-06-23 01:07:48 +02:00
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2022-02-14 02:12:06 +01:00
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// AHB
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2023-10-16 02:51:35 +02:00
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pub hclk1: Hertz,
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2022-01-24 00:50:35 +01:00
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#[cfg(any(
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2023-10-03 23:45:05 +02:00
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rcc_l4,
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2023-10-16 03:09:33 +02:00
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rcc_l4plus,
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2023-10-03 23:45:05 +02:00
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rcc_l5,
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rcc_f2,
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rcc_f4,
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rcc_f410,
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rcc_f7,
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rcc_h5,
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rcc_h50,
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rcc_h7,
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rcc_h7rm0433,
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rcc_h7ab,
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rcc_g4,
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rcc_u5,
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rcc_wb,
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rcc_wba,
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rcc_wl5,
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rcc_wle
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2022-01-24 00:50:35 +01:00
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))]
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2023-10-16 02:51:35 +02:00
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pub hclk2: Hertz,
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2022-02-24 05:59:42 +01:00
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#[cfg(any(
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2023-10-03 23:45:05 +02:00
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rcc_l4,
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2023-10-16 03:09:33 +02:00
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rcc_l4plus,
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2023-10-03 23:45:05 +02:00
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rcc_l5,
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rcc_f2,
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rcc_f4,
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rcc_f410,
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rcc_f7,
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rcc_h5,
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rcc_h50,
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rcc_h7,
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rcc_h7rm0433,
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rcc_h7ab,
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rcc_u5,
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rcc_wb,
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rcc_wl5,
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2023-04-06 18:53:51 +02:00
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rcc_wle
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2022-02-24 05:59:42 +01:00
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))]
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2023-10-16 02:51:35 +02:00
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pub hclk3: Hertz,
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2023-10-03 23:45:05 +02:00
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#[cfg(any(rcc_h5, rcc_h50, rcc_h7, rcc_h7rm0433, rcc_h7ab, rcc_wba))]
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2023-10-16 02:51:35 +02:00
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pub hclk4: Hertz,
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2021-07-09 15:33:17 +02:00
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2023-04-15 04:28:27 +02:00
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#[cfg(all(rcc_f4, not(stm32f410)))]
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2023-10-15 22:10:42 +02:00
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pub plli2s1_q: Option<Hertz>,
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#[cfg(all(rcc_f4, not(stm32f410)))]
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pub plli2s1_r: Option<Hertz>,
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2023-04-14 23:30:36 +02:00
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2023-10-17 03:04:10 +02:00
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#[cfg(rcc_l4)]
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pub pllsai1_p: Option<Hertz>,
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2023-04-15 04:28:27 +02:00
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#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
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2023-10-15 22:10:42 +02:00
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pub pllsai1_q: Option<Hertz>,
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#[cfg(any(stm32f427, stm32f429, stm32f437, stm32f439, stm32f446, stm32f469, stm32f479))]
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pub pllsai1_r: Option<Hertz>,
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2023-10-17 03:04:10 +02:00
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#[cfg(rcc_l4)]
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pub pllsai2_p: Option<Hertz>,
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2023-04-15 04:28:27 +02:00
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2023-10-17 03:04:10 +02:00
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#[cfg(any(stm32g4, rcc_l4))]
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2023-10-15 06:33:57 +02:00
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pub pll1_p: Option<Hertz>,
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2023-10-17 03:04:10 +02:00
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#[cfg(any(stm32h5, stm32h7, rcc_f2, rcc_f4, rcc_f410, rcc_f7, rcc_l4))]
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2023-10-15 06:33:57 +02:00
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pub pll1_q: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7))]
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pub pll2_p: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7))]
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2023-10-15 22:10:42 +02:00
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pub pll2_q: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7))]
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2023-10-15 06:33:57 +02:00
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pub pll2_r: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7))]
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pub pll3_p: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7))]
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pub pll3_q: Option<Hertz>,
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#[cfg(any(stm32h5, stm32h7))]
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pub pll3_r: Option<Hertz>,
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2023-10-03 23:45:05 +02:00
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#[cfg(any(
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rcc_f1,
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rcc_f100,
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rcc_f1cl,
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rcc_h5,
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rcc_h50,
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rcc_h7,
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rcc_h7rm0433,
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rcc_h7ab,
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rcc_f3,
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rcc_g4
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))]
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2022-03-19 11:05:00 +01:00
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pub adc: Option<Hertz>,
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2023-08-06 18:11:53 +02:00
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2023-09-06 00:02:28 +02:00
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#[cfg(any(rcc_f3, rcc_g4))]
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2023-09-05 23:46:57 +02:00
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pub adc34: Option<Hertz>,
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2023-08-21 04:31:47 +02:00
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2023-09-10 20:33:17 +02:00
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#[cfg(stm32f334)]
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pub hrtim: Option<Hertz>,
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2023-08-06 18:11:53 +02:00
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pub rtc: Option<Hertz>,
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2023-10-12 03:59:47 +02:00
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2023-10-17 03:04:10 +02:00
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#[cfg(any(stm32h5, stm32h7, rcc_l4, rcc_c0))]
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2023-10-14 19:51:45 +02:00
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pub hsi: Option<Hertz>,
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2023-10-14 06:06:32 +02:00
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#[cfg(stm32h5)]
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2023-10-14 19:51:45 +02:00
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pub hsi48: Option<Hertz>,
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2023-10-14 06:06:32 +02:00
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#[cfg(stm32h5)]
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2023-10-14 19:51:45 +02:00
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pub lsi: Option<Hertz>,
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2023-10-15 06:33:57 +02:00
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#[cfg(any(stm32h5, stm32h7))]
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2023-10-14 19:51:45 +02:00
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pub csi: Option<Hertz>,
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2023-10-14 06:06:32 +02:00
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2023-10-17 03:04:10 +02:00
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#[cfg(any(stm32h5, stm32h7, rcc_l4, rcc_c0))]
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2023-10-14 19:51:45 +02:00
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pub lse: Option<Hertz>,
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2023-10-15 06:33:57 +02:00
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#[cfg(any(stm32h5, stm32h7))]
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2023-10-14 19:51:45 +02:00
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pub hse: Option<Hertz>,
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2023-10-12 03:59:47 +02:00
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#[cfg(stm32h5)]
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2023-10-14 19:51:45 +02:00
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pub audioclk: Option<Hertz>,
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2023-10-15 06:33:57 +02:00
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#[cfg(any(stm32h5, stm32h7))]
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2023-10-14 19:51:45 +02:00
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pub per: Option<Hertz>,
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2023-10-15 06:33:57 +02:00
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#[cfg(stm32h7)]
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pub rcc_pclk_d3: Option<Hertz>,
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2023-10-17 03:04:10 +02:00
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#[cfg(rcc_l4)]
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pub sai1_extclk: Option<Hertz>,
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#[cfg(rcc_l4)]
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pub sai2_extclk: Option<Hertz>,
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2021-06-14 10:48:14 +02:00
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}
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2021-05-27 09:50:11 +02:00
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2023-08-24 03:18:34 +02:00
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#[cfg(feature = "low-power")]
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2023-11-04 19:49:54 +01:00
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/// Must be written within a critical section
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///
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/// May be read without a critical section
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pub(crate) static mut REFCOUNT_STOP1: u32 = 0;
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#[cfg(feature = "low-power")]
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/// Must be written within a critical section
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///
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/// May be read without a critical section
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2023-10-26 02:07:31 +02:00
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pub(crate) static mut REFCOUNT_STOP2: u32 = 0;
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2023-08-24 03:18:34 +02:00
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2021-05-27 09:50:11 +02:00
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/// Frozen clock frequencies
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///
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/// The existence of this value indicates that the clock configuration can no longer be changed
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static mut CLOCK_FREQS: MaybeUninit<Clocks> = MaybeUninit::uninit();
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/// Sets the clock frequencies
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///
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/// Safety: Sets a mutable global.
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2022-01-04 19:25:50 +01:00
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pub(crate) unsafe fn set_freqs(freqs: Clocks) {
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2023-01-20 16:31:04 +01:00
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debug!("rcc: {:?}", freqs);
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2023-07-04 23:29:46 +02:00
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CLOCK_FREQS = MaybeUninit::new(freqs);
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2021-05-27 09:50:11 +02:00
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}
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/// Safety: Reads a mutable global.
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2022-01-04 19:25:50 +01:00
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pub(crate) unsafe fn get_freqs() -> &'static Clocks {
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2023-07-04 23:29:46 +02:00
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CLOCK_FREQS.assume_init_ref()
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2021-05-27 09:50:11 +02:00
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}
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2021-12-08 17:38:12 +01:00
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#[cfg(feature = "unstable-pac")]
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pub mod low_level {
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pub use super::sealed::*;
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}
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2021-06-02 16:34:37 +02:00
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pub(crate) mod sealed {
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2023-10-12 00:34:47 +02:00
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use critical_section::CriticalSection;
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2021-06-02 16:34:37 +02:00
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pub trait RccPeripheral {
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2021-06-11 09:19:02 +02:00
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fn frequency() -> crate::time::Hertz;
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2023-10-12 00:34:47 +02:00
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fn enable_and_reset_with_cs(cs: CriticalSection);
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fn disable_with_cs(cs: CriticalSection);
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fn enable_and_reset() {
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critical_section::with(|cs| Self::enable_and_reset_with_cs(cs))
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}
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fn disable() {
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critical_section::with(|cs| Self::disable_with_cs(cs))
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}
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2021-06-02 16:34:37 +02:00
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}
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}
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pub trait RccPeripheral: sealed::RccPeripheral + 'static {}
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2023-10-23 01:48:09 +02:00
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#[allow(unused)]
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mod util {
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use crate::time::Hertz;
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pub fn calc_pclk<D>(hclk: Hertz, ppre: D) -> (Hertz, Hertz)
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where
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Hertz: core::ops::Div<D, Output = Hertz>,
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{
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let pclk = hclk / ppre;
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let pclk_tim = if hclk == pclk { pclk } else { pclk * 2u32 };
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(pclk, pclk_tim)
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}
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pub fn all_equal<T: Eq>(mut iter: impl Iterator<Item = T>) -> bool {
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let Some(x) = iter.next() else { return true };
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if !iter.all(|y| y == x) {
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return false;
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}
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true
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}
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pub fn get_equal<T: Eq>(mut iter: impl Iterator<Item = T>) -> Result<Option<T>, ()> {
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let Some(x) = iter.next() else { return Ok(None) };
|
|
|
|
if !iter.all(|y| y == x) {
|
|
|
|
return Err(());
|
|
|
|
}
|
|
|
|
Ok(Some(x))
|
|
|
|
}
|
|
|
|
}
|