2023-07-29 00:16:46 +02:00
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mod traits;
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2023-06-25 22:33:57 +02:00
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use core::marker::PhantomData;
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2023-07-29 00:27:15 +02:00
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use embassy_hal_internal::{into_ref, PeripheralRef};
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2023-06-25 22:33:57 +02:00
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#[allow(unused_imports)]
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use crate::gpio::sealed::{AFType, Pin};
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use crate::gpio::AnyPin;
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2023-07-29 00:37:14 +02:00
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use crate::hrtim::traits::Instance;
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2023-06-25 22:33:57 +02:00
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use crate::time::Hertz;
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use crate::Peripheral;
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2023-06-30 04:05:41 +02:00
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pub enum Source {
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Master,
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ChA,
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ChB,
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ChC,
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ChD,
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ChE,
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}
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2023-07-29 00:37:14 +02:00
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pub struct BurstController<T: Instance> {
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2023-06-28 01:24:32 +02:00
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phantom: PhantomData<T>,
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2023-06-27 03:23:26 +02:00
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}
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2023-07-29 00:37:14 +02:00
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pub struct Master<T: Instance> {
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2023-06-28 01:24:32 +02:00
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phantom: PhantomData<T>,
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2023-06-27 03:23:26 +02:00
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}
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2023-07-29 00:37:14 +02:00
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pub struct ChA<T: Instance> {
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2023-06-28 01:24:32 +02:00
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phantom: PhantomData<T>,
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2023-06-27 03:23:26 +02:00
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}
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2023-07-29 00:37:14 +02:00
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pub struct ChB<T: Instance> {
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2023-06-28 01:24:32 +02:00
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phantom: PhantomData<T>,
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2023-06-27 03:23:26 +02:00
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}
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2023-07-29 00:37:14 +02:00
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pub struct ChC<T: Instance> {
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2023-06-28 01:24:32 +02:00
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phantom: PhantomData<T>,
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2023-06-27 03:23:26 +02:00
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}
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2023-07-29 00:37:14 +02:00
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pub struct ChD<T: Instance> {
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2023-06-30 04:05:41 +02:00
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phantom: PhantomData<T>,
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}
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2023-07-29 00:37:14 +02:00
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pub struct ChE<T: Instance> {
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2023-06-28 01:24:32 +02:00
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phantom: PhantomData<T>,
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2023-06-27 03:23:26 +02:00
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}
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mod sealed {
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2023-07-29 00:37:14 +02:00
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use super::Instance;
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2023-06-28 01:24:32 +02:00
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2023-07-29 00:37:14 +02:00
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pub trait AdvancedChannel<T: Instance> {
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2023-07-01 01:20:33 +02:00
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fn raw() -> usize;
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}
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2023-06-27 03:23:26 +02:00
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}
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2023-07-29 00:37:14 +02:00
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pub trait AdvancedChannel<T: Instance>: sealed::AdvancedChannel<T> {}
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2023-06-25 22:33:57 +02:00
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pub struct PwmPin<'d, Perip, Channel> {
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_pin: PeripheralRef<'d, AnyPin>,
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phantom: PhantomData<(Perip, Channel)>,
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}
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pub struct ComplementaryPwmPin<'d, Perip, Channel> {
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_pin: PeripheralRef<'d, AnyPin>,
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phantom: PhantomData<(Perip, Channel)>,
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}
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macro_rules! advanced_channel_impl {
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2023-06-28 01:24:32 +02:00
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($new_chx:ident, $channel:tt, $ch_num:expr, $pin_trait:ident, $complementary_pin_trait:ident) => {
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2023-07-29 00:37:14 +02:00
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impl<'d, Perip: Instance> PwmPin<'d, Perip, $channel<Perip>> {
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2023-06-28 03:30:58 +02:00
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pub fn $new_chx(pin: impl Peripheral<P = impl $pin_trait<Perip>> + 'd) -> Self {
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2023-06-25 22:33:57 +02:00
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(pin.af_num(), AFType::OutputPushPull);
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#[cfg(gpio_v2)]
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pin.set_speed(crate::gpio::Speed::VeryHigh);
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});
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PwmPin {
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_pin: pin.map_into(),
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phantom: PhantomData,
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}
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}
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}
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2023-07-29 00:37:14 +02:00
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impl<'d, Perip: Instance> ComplementaryPwmPin<'d, Perip, $channel<Perip>> {
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2023-06-25 22:33:57 +02:00
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pub fn $new_chx(pin: impl Peripheral<P = impl $complementary_pin_trait<Perip>> + 'd) -> Self {
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into_ref!(pin);
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critical_section::with(|_| {
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pin.set_low();
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pin.set_as_af(pin.af_num(), AFType::OutputPushPull);
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#[cfg(gpio_v2)]
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pin.set_speed(crate::gpio::Speed::VeryHigh);
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});
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ComplementaryPwmPin {
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_pin: pin.map_into(),
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phantom: PhantomData,
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}
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}
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}
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2023-06-27 03:23:26 +02:00
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2023-07-29 00:37:14 +02:00
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impl<T: Instance> sealed::AdvancedChannel<T> for $channel<T> {
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2023-06-28 01:24:32 +02:00
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fn raw() -> usize {
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$ch_num
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}
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}
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2023-07-29 00:37:14 +02:00
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impl<T: Instance> AdvancedChannel<T> for $channel<T> {}
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2023-06-25 22:33:57 +02:00
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};
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}
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2023-06-28 01:24:32 +02:00
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advanced_channel_impl!(new_cha, ChA, 0, ChannelAPin, ChannelAComplementaryPin);
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advanced_channel_impl!(new_chb, ChB, 1, ChannelBPin, ChannelBComplementaryPin);
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advanced_channel_impl!(new_chc, ChC, 2, ChannelCPin, ChannelCComplementaryPin);
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advanced_channel_impl!(new_chd, ChD, 3, ChannelDPin, ChannelDComplementaryPin);
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advanced_channel_impl!(new_che, ChE, 4, ChannelEPin, ChannelEComplementaryPin);
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2023-06-25 22:33:57 +02:00
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2023-06-27 03:23:26 +02:00
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/// Struct used to divide a high resolution timer into multiple channels
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2023-07-29 00:37:14 +02:00
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pub struct AdvancedPwm<'d, T: Instance> {
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2023-06-28 01:24:32 +02:00
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_inner: PeripheralRef<'d, T>,
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pub master: Master<T>,
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2023-06-30 04:05:41 +02:00
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pub burst_controller: BurstController<T>,
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2023-06-28 01:24:32 +02:00
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pub ch_a: ChA<T>,
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pub ch_b: ChB<T>,
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pub ch_c: ChC<T>,
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pub ch_d: ChD<T>,
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pub ch_e: ChE<T>,
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2023-06-25 22:33:57 +02:00
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}
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2023-07-29 00:37:14 +02:00
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impl<'d, T: Instance> AdvancedPwm<'d, T> {
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2023-06-25 22:33:57 +02:00
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pub fn new(
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tim: impl Peripheral<P = T> + 'd,
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2023-06-28 01:24:32 +02:00
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_cha: Option<PwmPin<'d, T, ChA<T>>>,
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_chan: Option<ComplementaryPwmPin<'d, T, ChA<T>>>,
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_chb: Option<PwmPin<'d, T, ChB<T>>>,
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_chbn: Option<ComplementaryPwmPin<'d, T, ChB<T>>>,
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_chc: Option<PwmPin<'d, T, ChC<T>>>,
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_chcn: Option<ComplementaryPwmPin<'d, T, ChC<T>>>,
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_chd: Option<PwmPin<'d, T, ChD<T>>>,
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_chdn: Option<ComplementaryPwmPin<'d, T, ChD<T>>>,
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_che: Option<PwmPin<'d, T, ChE<T>>>,
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_chen: Option<ComplementaryPwmPin<'d, T, ChE<T>>>,
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2023-06-25 22:33:57 +02:00
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) -> Self {
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2023-06-27 03:23:26 +02:00
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Self::new_inner(tim)
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2023-06-25 22:33:57 +02:00
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}
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2023-06-27 03:23:26 +02:00
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fn new_inner(tim: impl Peripheral<P = T> + 'd) -> Self {
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2023-06-25 22:33:57 +02:00
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into_ref!(tim);
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T::enable();
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<T as crate::rcc::sealed::RccPeripheral>::reset();
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2023-07-02 04:47:44 +02:00
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// // Enable and and stabilize the DLL
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// T::regs().dllcr().modify(|w| {
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// // w.set_calen(true);
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// // w.set_calrte(11);
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// w.set_cal(true);
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// });
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//
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// debug!("wait for dll calibration");
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// while !T::regs().isr().read().dllrdy() {}
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//
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// debug!("dll calibration complete");
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2023-06-27 03:23:26 +02:00
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Self {
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2023-06-28 01:24:32 +02:00
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_inner: tim,
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2023-06-27 03:23:26 +02:00
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master: Master { phantom: PhantomData },
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2023-06-30 04:05:41 +02:00
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burst_controller: BurstController { phantom: PhantomData },
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2023-06-27 03:23:26 +02:00
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ch_a: ChA { phantom: PhantomData },
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ch_b: ChB { phantom: PhantomData },
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ch_c: ChC { phantom: PhantomData },
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ch_d: ChD { phantom: PhantomData },
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ch_e: ChE { phantom: PhantomData },
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}
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2023-06-25 22:33:57 +02:00
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}
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2023-06-30 04:05:41 +02:00
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}
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2023-06-25 22:33:57 +02:00
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2023-07-29 00:37:14 +02:00
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impl<T: Instance> BurstController<T> {
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2023-07-01 01:20:33 +02:00
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pub fn set_source(&mut self, _source: Source) {
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todo!("burst mode control registers not implemented")
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2023-06-25 22:33:57 +02:00
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}
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2023-06-27 03:23:26 +02:00
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}
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2023-06-30 04:05:41 +02:00
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/// Represents a fixed-frequency bridge converter
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///
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2023-07-02 16:17:12 +02:00
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/// Our implementation of the bridge converter uses a single channel and three compare registers,
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2023-06-30 04:05:41 +02:00
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/// allowing implementation of a synchronous buck or boost converter in continuous or discontinuous
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/// conduction mode.
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///
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/// It is important to remember that in synchronous topologies, energy can flow in reverse during
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/// light loading conditions, and that the low-side switch must be active for a short time to drive
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/// a bootstrapped high-side switch.
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2023-07-29 00:37:14 +02:00
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pub struct BridgeConverter<T: Instance, C: AdvancedChannel<T>> {
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2023-07-02 04:47:44 +02:00
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timer: PhantomData<T>,
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channel: PhantomData<C>,
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dead_time: u16,
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primary_duty: u16,
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2023-07-02 16:17:12 +02:00
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min_secondary_duty: u16,
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max_secondary_duty: u16,
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2023-06-27 03:23:26 +02:00
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}
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2023-06-25 22:33:57 +02:00
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2023-07-29 00:37:14 +02:00
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impl<T: Instance, C: AdvancedChannel<T>> BridgeConverter<T, C> {
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2023-07-02 04:47:44 +02:00
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pub fn new(_channel: C, frequency: Hertz) -> Self {
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2023-07-03 05:00:50 +02:00
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use crate::pac::hrtim::vals::{Activeeffect, Inactiveeffect};
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2023-06-30 04:05:41 +02:00
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T::set_channel_frequency(C::raw(), frequency);
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// Always enable preload
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T::regs().tim(C::raw()).cr().modify(|w| {
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w.set_preen(true);
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2023-07-02 04:47:44 +02:00
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w.set_repu(true);
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2023-07-03 05:00:50 +02:00
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w.set_cont(true);
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2023-07-02 00:32:16 +02:00
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});
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2023-07-02 04:47:44 +02:00
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// Enable timer outputs
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2023-07-02 00:32:16 +02:00
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T::regs().oenr().modify(|w| {
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w.set_t1oen(C::raw(), true);
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w.set_t2oen(C::raw(), true);
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2023-06-30 04:05:41 +02:00
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});
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2023-07-02 04:47:44 +02:00
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// The dead-time generation unit cannot be used because it forces the other output
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// to be completely complementary to the first output, which restricts certain waveforms
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// Therefore, software-implemented dead time must be used when setting the duty cycles
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2023-06-30 04:05:41 +02:00
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// Set output 1 to active on a period event
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T::regs()
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.tim(C::raw())
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.setr(0)
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.modify(|w| w.set_per(Activeeffect::SETACTIVE));
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// Set output 1 to inactive on a compare 1 event
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T::regs()
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.tim(C::raw())
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.rstr(0)
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.modify(|w| w.set_cmp(0, Inactiveeffect::SETINACTIVE));
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2023-07-02 04:47:44 +02:00
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// Set output 2 to active on a compare 2 event
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2023-06-30 04:05:41 +02:00
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T::regs()
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.tim(C::raw())
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.setr(1)
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2023-07-02 04:47:44 +02:00
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.modify(|w| w.set_cmp(1, Activeeffect::SETACTIVE));
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2023-06-30 04:05:41 +02:00
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2023-07-02 04:47:44 +02:00
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// Set output 2 to inactive on a compare 3 event
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2023-06-30 04:05:41 +02:00
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T::regs()
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.tim(C::raw())
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.rstr(1)
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2023-07-02 04:47:44 +02:00
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.modify(|w| w.set_cmp(2, Inactiveeffect::SETINACTIVE));
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2023-06-30 04:05:41 +02:00
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2023-06-28 01:24:32 +02:00
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Self {
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2023-07-02 04:47:44 +02:00
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timer: PhantomData,
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channel: PhantomData,
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dead_time: 0,
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primary_duty: 0,
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2023-07-02 16:17:12 +02:00
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min_secondary_duty: 0,
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max_secondary_duty: 0,
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2023-06-28 01:24:32 +02:00
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}
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2023-06-25 22:33:57 +02:00
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}
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2023-06-30 04:05:41 +02:00
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pub fn start(&mut self) {
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T::regs().mcr().modify(|w| w.set_tcen(C::raw(), true));
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}
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pub fn stop(&mut self) {
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T::regs().mcr().modify(|w| w.set_tcen(C::raw(), false));
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}
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2023-07-01 01:20:33 +02:00
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pub fn enable_burst_mode(&mut self) {
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T::regs().tim(C::raw()).outr().modify(|w| {
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2023-07-03 05:00:50 +02:00
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// Enable Burst Mode
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w.set_idlem(0, true);
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w.set_idlem(1, true);
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2023-07-01 01:20:33 +02:00
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2023-07-03 05:00:50 +02:00
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// Set output to active during the burst
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w.set_idles(0, true);
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w.set_idles(1, true);
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2023-07-01 01:20:33 +02:00
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})
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}
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pub fn disable_burst_mode(&mut self) {
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T::regs().tim(C::raw()).outr().modify(|w| {
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2023-07-03 05:00:50 +02:00
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// Disable Burst Mode
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w.set_idlem(0, false);
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w.set_idlem(1, false);
|
2023-07-01 01:20:33 +02:00
|
|
|
})
|
|
|
|
}
|
|
|
|
|
2023-07-02 04:47:44 +02:00
|
|
|
fn update_primary_duty_or_dead_time(&mut self) {
|
2023-07-02 16:17:12 +02:00
|
|
|
self.min_secondary_duty = self.primary_duty + self.dead_time;
|
|
|
|
|
2023-07-02 04:47:44 +02:00
|
|
|
T::regs().tim(C::raw()).cmp(0).modify(|w| w.set_cmp(self.primary_duty));
|
|
|
|
T::regs()
|
|
|
|
.tim(C::raw())
|
|
|
|
.cmp(1)
|
2023-07-02 16:17:12 +02:00
|
|
|
.modify(|w| w.set_cmp(self.min_secondary_duty));
|
2023-07-02 04:47:44 +02:00
|
|
|
}
|
|
|
|
|
2023-06-30 04:05:41 +02:00
|
|
|
/// Set the dead time as a proportion of the maximum compare value
|
2023-07-02 04:47:44 +02:00
|
|
|
pub fn set_dead_time(&mut self, dead_time: u16) {
|
|
|
|
self.dead_time = dead_time;
|
2023-07-02 16:17:12 +02:00
|
|
|
self.max_secondary_duty = self.get_max_compare_value() - dead_time;
|
2023-07-02 04:47:44 +02:00
|
|
|
self.update_primary_duty_or_dead_time();
|
2023-06-30 04:05:41 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/// Get the maximum compare value of a duty cycle
|
|
|
|
pub fn get_max_compare_value(&mut self) -> u16 {
|
|
|
|
T::regs().tim(C::raw()).per().read().per()
|
|
|
|
}
|
|
|
|
|
|
|
|
/// The primary duty is the period in which the primary switch is active
|
|
|
|
///
|
|
|
|
/// In the case of a buck converter, this is the high-side switch
|
|
|
|
/// In the case of a boost converter, this is the low-side switch
|
2023-07-02 04:47:44 +02:00
|
|
|
pub fn set_primary_duty(&mut self, primary_duty: u16) {
|
|
|
|
self.primary_duty = primary_duty;
|
|
|
|
self.update_primary_duty_or_dead_time();
|
2023-06-30 04:05:41 +02:00
|
|
|
}
|
2023-06-28 01:24:32 +02:00
|
|
|
|
2023-07-02 04:47:44 +02:00
|
|
|
/// The secondary duty is the period in any switch is active
|
2023-06-30 04:05:41 +02:00
|
|
|
///
|
2023-07-02 16:17:12 +02:00
|
|
|
/// If less than or equal to the primary duty, the secondary switch will be active for one tick
|
2023-07-02 04:47:44 +02:00
|
|
|
/// If a fully complementary output is desired, the secondary duty can be set to the max compare
|
|
|
|
pub fn set_secondary_duty(&mut self, secondary_duty: u16) {
|
2023-07-02 16:17:12 +02:00
|
|
|
let secondary_duty = if secondary_duty > self.max_secondary_duty {
|
|
|
|
self.max_secondary_duty
|
|
|
|
} else if secondary_duty <= self.min_secondary_duty {
|
|
|
|
self.min_secondary_duty + 1
|
|
|
|
} else {
|
|
|
|
secondary_duty
|
|
|
|
};
|
|
|
|
|
2023-07-02 04:47:44 +02:00
|
|
|
T::regs().tim(C::raw()).cmp(2).modify(|w| w.set_cmp(secondary_duty));
|
2023-06-25 22:33:57 +02:00
|
|
|
}
|
2023-06-27 03:23:26 +02:00
|
|
|
}
|
|
|
|
|
2023-06-30 04:05:41 +02:00
|
|
|
/// Represents a variable-frequency resonant converter
|
|
|
|
///
|
|
|
|
/// This implementation of a resonsant converter is appropriate for a half or full bridge,
|
|
|
|
/// but does not include secondary rectification, which is appropriate for applications
|
|
|
|
/// with a low-voltage on the secondary side.
|
2023-07-29 00:37:14 +02:00
|
|
|
pub struct ResonantConverter<T: Instance, C: AdvancedChannel<T>> {
|
2023-07-02 04:47:44 +02:00
|
|
|
timer: PhantomData<T>,
|
|
|
|
channel: PhantomData<C>,
|
2023-06-30 04:05:41 +02:00
|
|
|
min_period: u16,
|
|
|
|
max_period: u16,
|
2023-06-27 03:23:26 +02:00
|
|
|
}
|
2023-06-25 22:33:57 +02:00
|
|
|
|
2023-07-29 00:37:14 +02:00
|
|
|
impl<T: Instance, C: AdvancedChannel<T>> ResonantConverter<T, C> {
|
2023-07-02 04:47:44 +02:00
|
|
|
pub fn new(_channel: C, min_frequency: Hertz, max_frequency: Hertz) -> Self {
|
2023-06-30 04:05:41 +02:00
|
|
|
T::set_channel_frequency(C::raw(), min_frequency);
|
|
|
|
|
|
|
|
// Always enable preload
|
|
|
|
T::regs().tim(C::raw()).cr().modify(|w| {
|
|
|
|
w.set_preen(true);
|
2023-07-02 04:47:44 +02:00
|
|
|
w.set_repu(true);
|
2023-06-30 04:05:41 +02:00
|
|
|
|
2023-07-03 05:00:50 +02:00
|
|
|
w.set_cont(true);
|
2023-06-30 04:05:41 +02:00
|
|
|
w.set_half(true);
|
|
|
|
});
|
|
|
|
|
2023-07-02 04:47:44 +02:00
|
|
|
// Enable timer outputs
|
|
|
|
T::regs().oenr().modify(|w| {
|
|
|
|
w.set_t1oen(C::raw(), true);
|
|
|
|
w.set_t2oen(C::raw(), true);
|
|
|
|
});
|
|
|
|
|
|
|
|
// Dead-time generator can be used in this case because the primary fets
|
|
|
|
// of a resonant converter are always complementary
|
|
|
|
T::regs().tim(C::raw()).outr().modify(|w| w.set_dten(true));
|
|
|
|
|
2023-07-01 01:20:33 +02:00
|
|
|
let max_period = T::regs().tim(C::raw()).per().read().per();
|
|
|
|
let min_period = max_period * (min_frequency.0 / max_frequency.0) as u16;
|
2023-06-30 04:05:41 +02:00
|
|
|
|
2023-06-28 01:24:32 +02:00
|
|
|
Self {
|
2023-07-02 04:47:44 +02:00
|
|
|
timer: PhantomData,
|
|
|
|
channel: PhantomData,
|
2023-07-01 01:20:33 +02:00
|
|
|
min_period: min_period,
|
|
|
|
max_period: max_period,
|
2023-06-28 01:24:32 +02:00
|
|
|
}
|
2023-06-25 22:33:57 +02:00
|
|
|
}
|
|
|
|
|
2023-06-30 04:05:41 +02:00
|
|
|
/// Set the dead time as a proportion of the maximum compare value
|
|
|
|
pub fn set_dead_time(&mut self, value: u16) {
|
|
|
|
T::set_channel_dead_time(C::raw(), value);
|
|
|
|
}
|
|
|
|
|
|
|
|
pub fn set_period(&mut self, period: u16) {
|
|
|
|
assert!(period < self.max_period);
|
|
|
|
assert!(period > self.min_period);
|
|
|
|
|
|
|
|
T::regs().tim(C::raw()).per().modify(|w| w.set_per(period));
|
|
|
|
}
|
|
|
|
|
|
|
|
/// Get the minimum compare value of a duty cycle
|
|
|
|
pub fn get_min_period(&mut self) -> u16 {
|
|
|
|
self.min_period
|
|
|
|
}
|
|
|
|
|
|
|
|
/// Get the maximum compare value of a duty cycle
|
|
|
|
pub fn get_max_period(&mut self) -> u16 {
|
|
|
|
self.max_period
|
2023-06-25 22:33:57 +02:00
|
|
|
}
|
|
|
|
}
|
2023-07-29 00:07:08 +02:00
|
|
|
|
2023-07-29 00:37:14 +02:00
|
|
|
pin_trait!(ChannelAPin, Instance);
|
|
|
|
pin_trait!(ChannelAComplementaryPin, Instance);
|
|
|
|
pin_trait!(ChannelBPin, Instance);
|
|
|
|
pin_trait!(ChannelBComplementaryPin, Instance);
|
|
|
|
pin_trait!(ChannelCPin, Instance);
|
|
|
|
pin_trait!(ChannelCComplementaryPin, Instance);
|
|
|
|
pin_trait!(ChannelDPin, Instance);
|
|
|
|
pin_trait!(ChannelDComplementaryPin, Instance);
|
|
|
|
pin_trait!(ChannelEPin, Instance);
|
|
|
|
pin_trait!(ChannelEComplementaryPin, Instance);
|