cortex-m: remove owned interrupts.
This commit is contained in:
@ -8,7 +8,7 @@ use embassy_sync::waitqueue::AtomicWaker;
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use crate::dma::Transfer;
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use crate::gpio::sealed::AFType;
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use crate::gpio::Speed;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::interrupt::Interrupt;
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use crate::{interrupt, Peripheral};
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/// Interrupt handler.
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@ -346,8 +346,8 @@ where
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});
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}
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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Self { inner: peri, dma }
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}
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@ -14,7 +14,7 @@ use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError};
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use super::word::{Word, WordSize};
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use super::Dir;
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use crate::_generated::BDMA_CHANNEL_COUNT;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::interrupt::Interrupt;
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use crate::pac;
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use crate::pac::bdma::{regs, vals};
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@ -70,9 +70,8 @@ static STATE: State = State::new();
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pub(crate) unsafe fn init(irq_priority: Priority) {
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foreach_interrupt! {
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($peri:ident, bdma, $block:ident, $signal_name:ident, $irq:ident) => {
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let irq = crate::interrupt::$irq::steal();
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irq.set_priority(irq_priority);
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irq.enable();
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crate::interrupt::$irq::set_priority(irq_priority);
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crate::interrupt::$irq::enable();
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};
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}
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crate::_generated::init_bdma();
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@ -13,7 +13,7 @@ use super::ringbuffer::{DmaCtrl, DmaRingBuffer, OverrunError};
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use super::word::{Word, WordSize};
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use super::Dir;
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use crate::_generated::DMA_CHANNEL_COUNT;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::interrupt::Interrupt;
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use crate::pac::dma::{regs, vals};
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use crate::{interrupt, pac};
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@ -149,9 +149,8 @@ static STATE: State = State::new();
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pub(crate) unsafe fn init(irq_priority: Priority) {
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foreach_interrupt! {
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($peri:ident, dma, $block:ident, $signal_name:ident, $irq:ident) => {
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let irq = interrupt::$irq::steal();
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irq.set_priority(irq_priority);
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irq.enable();
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interrupt::$irq::set_priority(irq_priority);
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interrupt::$irq::enable();
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};
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}
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crate::_generated::init_dma();
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@ -12,7 +12,7 @@ use embassy_sync::waitqueue::AtomicWaker;
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use super::word::{Word, WordSize};
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use super::Dir;
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use crate::_generated::GPDMA_CHANNEL_COUNT;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::interrupt::Interrupt;
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use crate::pac;
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use crate::pac::gpdma::vals;
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@ -56,9 +56,8 @@ static STATE: State = State::new();
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pub(crate) unsafe fn init(irq_priority: Priority) {
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foreach_interrupt! {
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($peri:ident, gpdma, $block:ident, $signal_name:ident, $irq:ident) => {
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let irq = crate::interrupt::$irq::steal();
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irq.set_priority(irq_priority);
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irq.enable();
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crate::interrupt::$irq::set_priority(irq_priority);
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crate::interrupt::$irq::enable();
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};
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}
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crate::_generated::init_gpdma();
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@ -5,7 +5,7 @@ mod tx_desc;
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use core::sync::atomic::{fence, Ordering};
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use embassy_cortex_m::interrupt::{Interrupt, InterruptExt};
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::{into_ref, PeripheralRef};
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use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf};
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@ -267,8 +267,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
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P::phy_reset(&mut this);
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P::phy_init(&mut this);
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interrupt::ETH::steal().unpend();
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interrupt::ETH::steal().enable();
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interrupt::ETH::unpend();
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interrupt::ETH::enable();
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this
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}
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@ -2,7 +2,7 @@ mod descriptors;
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use core::sync::atomic::{fence, Ordering};
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use embassy_cortex_m::interrupt::{Interrupt, InterruptExt};
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::{into_ref, PeripheralRef};
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pub(crate) use self::descriptors::{RDes, RDesRing, TDes, TDesRing};
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@ -238,8 +238,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
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P::phy_reset(&mut this);
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P::phy_init(&mut this);
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interrupt::ETH::steal().unpend();
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interrupt::ETH::steal().enable();
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interrupt::ETH::unpend();
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interrupt::ETH::enable();
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this
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}
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@ -354,13 +354,13 @@ impl_exti!(EXTI15, 15);
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macro_rules! enable_irq {
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($e:ident) => {
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crate::interrupt::$e::steal().enable();
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crate::interrupt::$e::enable();
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};
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}
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/// safety: must be called only once
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pub(crate) unsafe fn init() {
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::interrupt::Interrupt;
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foreach_exti_irq!(enable_irq);
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@ -1,7 +1,7 @@
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use core::marker::PhantomData;
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use atomic_polyfill::{fence, Ordering};
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use embassy_cortex_m::interrupt::{Interrupt, InterruptExt};
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::drop::OnDrop;
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use embassy_hal_common::into_ref;
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use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
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@ -23,9 +23,8 @@ impl<'d> Flash<'d, Async> {
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) -> Self {
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into_ref!(p);
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let flash_irq = unsafe { crate::interrupt::FLASH::steal() };
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flash_irq.unpend();
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flash_irq.enable();
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crate::interrupt::FLASH::unpend();
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unsafe { crate::interrupt::FLASH::enable() };
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Self {
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inner: p,
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@ -3,7 +3,7 @@ use core::future::poll_fn;
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use core::marker::PhantomData;
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use core::task::Poll;
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use embassy_cortex_m::interrupt::{Interrupt, InterruptExt};
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_embedded_hal::SetConfig;
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use embassy_hal_common::drop::OnDrop;
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use embassy_hal_common::{into_ref, PeripheralRef};
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@ -133,8 +133,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
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});
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}
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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Self {
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_peri: peri,
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@ -75,7 +75,7 @@ pub(crate) mod _generated {
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pub mod interrupt {
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//! Interrupt definitions and macros to bind them.
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pub use cortex_m::interrupt::{CriticalSection, Mutex};
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pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, InterruptExt, Priority};
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pub use embassy_cortex_m::interrupt::{Binding, Handler, Interrupt, Priority};
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pub use crate::_generated::interrupt::*;
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@ -14,7 +14,7 @@ use sdio_host::{BusWidth, CardCapacity, CardStatus, CurrentState, SDStatus, CID,
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use crate::dma::NoDma;
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use crate::gpio::sealed::{AFType, Pin};
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use crate::gpio::{AnyPin, Pull, Speed};
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::interrupt::Interrupt;
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use crate::pac::sdmmc::Sdmmc as RegBlock;
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use crate::rcc::RccPeripheral;
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use crate::time::Hertz;
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@ -447,8 +447,8 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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T::enable();
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T::reset();
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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let regs = T::regs();
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unsafe {
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@ -1288,7 +1288,7 @@ impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Sdmmc<'d, T, Dma> {
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impl<'d, T: Instance, Dma: SdmmcDma<T> + 'd> Drop for Sdmmc<'d, T, Dma> {
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fn drop(&mut self) {
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unsafe { T::Interrupt::steal() }.disable();
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T::Interrupt::disable();
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unsafe { Self::on_drop() };
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critical_section::with(|_| unsafe {
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@ -11,7 +11,7 @@ use embassy_time::driver::{AlarmHandle, Driver};
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use embassy_time::TICK_HZ;
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use stm32_metapac::timer::regs;
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use crate::interrupt::InterruptExt;
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use crate::interrupt::Interrupt;
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use crate::pac::timer::vals;
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use crate::rcc::sealed::RccPeripheral;
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use crate::timer::sealed::{Basic16bitInstance as BasicInstance, GeneralPurpose16bitInstance as Instance};
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@ -177,9 +177,8 @@ impl RtcDriver {
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w.set_ccie(0, true);
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});
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let irq: <T as BasicInstance>::Interrupt = core::mem::transmute(());
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irq.unpend();
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irq.enable();
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<T as BasicInstance>::Interrupt::unpend();
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<T as BasicInstance>::Interrupt::enable();
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r.cr1().modify(|w| w.set_cen(true));
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})
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@ -2,7 +2,7 @@ use core::mem::MaybeUninit;
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use atomic_polyfill::{compiler_fence, Ordering};
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use bit_field::BitField;
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use embassy_cortex_m::interrupt::{Interrupt, InterruptExt};
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::{into_ref, Peripheral, PeripheralRef};
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use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
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use embassy_sync::channel::Channel;
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@ -379,11 +379,11 @@ impl<'d> TlMbox<'d> {
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MemoryManager::enable();
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// enable interrupts
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unsafe { crate::interrupt::IPCC_C1_RX::steal() }.unpend();
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unsafe { crate::interrupt::IPCC_C1_TX::steal() }.unpend();
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crate::interrupt::IPCC_C1_RX::unpend();
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crate::interrupt::IPCC_C1_TX::unpend();
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unsafe { crate::interrupt::IPCC_C1_RX::steal() }.enable();
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unsafe { crate::interrupt::IPCC_C1_TX::steal() }.enable();
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unsafe { crate::interrupt::IPCC_C1_RX::enable() };
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unsafe { crate::interrupt::IPCC_C1_TX::enable() };
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Self { _ipcc: ipcc }
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}
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@ -216,8 +216,8 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
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});
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}
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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Self {
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rx: BufferedUartRx { phantom: PhantomData },
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@ -245,7 +245,7 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> {
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rx_reader.pop_done(len);
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if do_pend {
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unsafe { T::Interrupt::steal().pend() };
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T::Interrupt::pend();
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}
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return Poll::Ready(Ok(len));
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@ -271,7 +271,7 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> {
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rx_reader.pop_done(len);
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if do_pend {
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unsafe { T::Interrupt::steal().pend() };
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T::Interrupt::pend();
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}
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return Ok(len);
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@ -301,7 +301,7 @@ impl<'d, T: BasicInstance> BufferedUartRx<'d, T> {
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let full = state.rx_buf.is_full();
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rx_reader.pop_done(amt);
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if full {
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unsafe { T::Interrupt::steal().pend() };
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T::Interrupt::pend();
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}
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}
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}
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@ -324,7 +324,7 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> {
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tx_writer.push_done(n);
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if empty {
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unsafe { T::Interrupt::steal() }.pend();
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T::Interrupt::pend();
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}
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Poll::Ready(Ok(n))
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@ -358,7 +358,7 @@ impl<'d, T: BasicInstance> BufferedUartTx<'d, T> {
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tx_writer.push_done(n);
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if empty {
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unsafe { T::Interrupt::steal() }.pend();
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T::Interrupt::pend();
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}
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return Ok(n);
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@ -385,7 +385,7 @@ impl<'d, T: BasicInstance> Drop for BufferedUartRx<'d, T> {
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// TX is inactive if the the buffer is not available.
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// We can now unregister the interrupt handler
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if state.tx_buf.len() == 0 {
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T::Interrupt::steal().disable();
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T::Interrupt::disable();
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}
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}
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}
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@ -400,7 +400,7 @@ impl<'d, T: BasicInstance> Drop for BufferedUartTx<'d, T> {
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// RX is inactive if the the buffer is not available.
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// We can now unregister the interrupt handler
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if state.rx_buf.len() == 0 {
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T::Interrupt::steal().disable();
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T::Interrupt::disable();
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}
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}
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}
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@ -5,7 +5,7 @@ use core::marker::PhantomData;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::Poll;
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use embassy_cortex_m::interrupt::{Interrupt, InterruptExt};
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::drop::OnDrop;
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use embassy_hal_common::{into_ref, PeripheralRef};
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use futures::future::{select, Either};
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@ -331,8 +331,8 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
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configure(r, &config, T::frequency(), T::KIND, true, false);
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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// create state once!
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let _s = T::state();
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@ -732,8 +732,8 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
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configure(r, &config, T::frequency(), T::KIND, true, true);
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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// create state once!
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let _s = T::state();
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@ -14,7 +14,7 @@ use embassy_usb_driver::{
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use super::{DmPin, DpPin, Instance};
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use crate::gpio::sealed::AFType;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::interrupt::Interrupt;
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use crate::pac::usb::regs;
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use crate::pac::usb::vals::{EpType, Stat};
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use crate::pac::USBRAM;
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@ -260,8 +260,8 @@ impl<'d, T: Instance> Driver<'d, T> {
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dm: impl Peripheral<P = impl DmPin<T>> + 'd,
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) -> Self {
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into_ref!(dp, dm);
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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T::Interrupt::unpend();
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unsafe { T::Interrupt::enable() };
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let regs = T::regs();
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@ -3,7 +3,7 @@ use core::marker::PhantomData;
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use core::task::Poll;
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use atomic_polyfill::{AtomicBool, AtomicU16, Ordering};
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use embassy_cortex_m::interrupt::InterruptExt;
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use embassy_cortex_m::interrupt::Interrupt;
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use embassy_hal_common::{into_ref, Peripheral};
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use embassy_sync::waitqueue::AtomicWaker;
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use embassy_usb_driver::{
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@ -629,7 +629,7 @@ impl<'d, T: Instance> Bus<'d, T> {
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}
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fn disable(&mut self) {
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unsafe { T::Interrupt::steal() }.disable();
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T::Interrupt::disable();
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<T as RccPeripheral>::disable();
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@ -902,8 +902,8 @@ impl<'d, T: Instance> embassy_usb_driver::Bus for Bus<'d, T> {
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<T as RccPeripheral>::enable();
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<T as RccPeripheral>::reset();
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T::Interrupt::steal().unpend();
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T::Interrupt::steal().enable();
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T::Interrupt::unpend();
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T::Interrupt::enable();
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let r = T::regs();
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let core_id = r.cid().read().0;
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Block a user