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Fix g0 rcc build

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chemicstry 2022-07-11 00:37:00 +03:00
parent 5044361ddd
commit 5a208d28d0
1 changed files with 1 additions and 1 deletions
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embassy-stm32/src/rcc/g0.rs
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@ -361,7 +361,7 @@ pub(crate) unsafe fn init(config: Config) {
// Enable LSI // Enable LSI
RCC.csr().write(|w| w.set_lsion(true)); RCC.csr().write(|w| w.set_lsion(true));
while !RCC.csr().read().lsirdy() {} while !RCC.csr().read().lsirdy() {}
(LSI_FREQ, Sw::LSI) (LSI_FREQ.0, Sw::LSI)
} }
}; };