stm32: fix merge issues
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7573160077
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7622d2eb61
@ -107,20 +107,20 @@ macro_rules! rcc_peripheral {
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#[cfg(stm32g4)]
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foreach_peripheral!(
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(adc, ADC1) => { rcc_peripheral!(ADC1, adc12, ahb2, adc12, ADC12_ENABLE_COUNTER); };
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(adc, ADC2) => { rcc_peripheral!(ADC2, adc12, ahb2, adc12, ADC12_ENABLE_COUNTER); };
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(adc, ADC1) => { rcc_peripheral!(ADC1, adc, ahb2, adc12, ADC12_ENABLE_COUNTER); };
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(adc, ADC2) => { rcc_peripheral!(ADC2, adc, ahb2, adc12, ADC12_ENABLE_COUNTER); };
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);
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#[cfg(stm32g4x1)]
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foreach_peripheral!(
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(adc, ADC3) => { rcc_peripheral!(ADC3, adc345, ahb2, adc345); };
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(adc, ADC3) => { rcc_peripheral!(ADC3, adc34, ahb2, adc345); };
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);
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#[cfg(any(stm32g4x3, stm32g4x4))]
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foreach_peripheral!(
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(adc, ADC3) => { rcc_peripheral!(ADC3, adc345, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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(adc, ADC4) => { rcc_peripheral!(ADC4, adc345, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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(adc, ADC5) => { rcc_peripheral!(ADC5, adc345, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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(adc, ADC3) => { rcc_peripheral!(ADC3, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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(adc, ADC4) => { rcc_peripheral!(ADC4, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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(adc, ADC5) => { rcc_peripheral!(ADC5, adc34, ahb2, adc345, ADC345_ENABLE_COUNTER); };
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);
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#[cfg(stm32h7)]
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@ -612,7 +612,7 @@ pub(crate) unsafe fn init(config: Config) {
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apb1_tim: Hertz(apb1_tim_freq),
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apb2: Hertz(apb2_freq),
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apb2_tim: Hertz(apb2_tim_freq),
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adc12: adc12_ck,
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adc345: adc345_ck,
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adc: adc12_ck,
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adc34: adc345_ck,
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});
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}
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