Update stm32-data
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@ -1 +1 @@
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Subproject commit 69ac5bce28972de33b57497454421c6ac862b0ed
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Subproject commit fe221f48442d4b6eef6dcfd04d9d4deec4402cce
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@ -1,5 +1,4 @@
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use serde::Deserialize;
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use std::collections::HashMap;
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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pub struct Chip {
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@ -7,21 +6,24 @@ pub struct Chip {
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pub family: String,
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pub line: String,
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pub cores: Vec<Core>,
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pub flash: Memory,
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pub ram: Memory,
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pub memory: Vec<MemoryRegion>,
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pub packages: Vec<Package>,
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}
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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pub struct Memory {
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pub bytes: u32,
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pub regions: HashMap<String, MemoryRegion>,
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pub struct MemoryRegion {
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pub name: String,
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pub kind: MemoryRegionKind,
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pub address: u32,
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pub size: u32,
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}
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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pub struct MemoryRegion {
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pub base: u32,
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pub bytes: Option<u32>,
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pub enum MemoryRegionKind {
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#[serde(rename = "flash")]
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Flash,
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#[serde(rename = "ram")]
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Ram,
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}
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#[derive(Debug, Eq, PartialEq, Clone, Deserialize)]
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@ -587,35 +587,20 @@ fn bytes_find(haystack: &[u8], needle: &[u8]) -> Option<usize> {
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fn gen_memory_x(out_dir: &PathBuf, chip: &Chip) {
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let mut memory_x = String::new();
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let flash_bytes = chip
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.flash
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.regions
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.get("BANK_1")
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.unwrap()
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.bytes
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.unwrap_or(chip.flash.bytes);
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let flash_origin = chip.flash.regions.get("BANK_1").unwrap().base;
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let ram_bytes = chip
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.ram
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.regions
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.get("SRAM")
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.unwrap()
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.bytes
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.unwrap_or(chip.ram.bytes);
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let ram_origin = chip.ram.regions.get("SRAM").unwrap().base;
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let flash = chip.memory.iter().find(|r| r.name == "BANK_1").unwrap();
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let ram = chip.memory.iter().find(|r| r.name == "SRAM").unwrap();
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write!(memory_x, "MEMORY\n{{\n").unwrap();
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write!(
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memory_x,
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" FLASH : ORIGIN = 0x{:x}, LENGTH = {}\n",
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flash_origin, flash_bytes
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flash.address, flash.size,
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)
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.unwrap();
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write!(
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memory_x,
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" RAM : ORIGIN = 0x{:x}, LENGTH = {}\n",
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ram_origin, ram_bytes
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ram.address, ram.size,
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)
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.unwrap();
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write!(memory_x, "}}").unwrap();
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