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436 Commits

Author SHA1 Message Date
Thales Fragoso
e7714983b3 f4-rcc: Add option to enable debug_wfe and add hello example 2021-07-29 18:43:15 -03:00
Thales Fragoso
5abaf8e9d6 Start working on the F4 PLL 2021-07-29 18:43:13 -03:00
Timo Kröger
9342497132 stm32wl55: Use Dbgmcu::enable_all 2021-07-29 17:38:40 +02:00
Timo Kröger
cad43587e6 stm32l0: Use embassy::main for examples 2021-07-29 17:37:32 +02:00
Timo Kröger
2a4890165d stm32f0: Enable debug access in low power modes 2021-07-29 15:35:23 +02:00
Dario Nieuwenhuis
7bfb763e09 Rename embassy-extras to embassy-hal-common 2021-07-29 13:44:51 +02:00
Dario Nieuwenhuis
c8a48d726a
Merge pull request #277 from Liamolucko/fix-peripheral-ub 
extras: Fix UB in `Peripheral`
 2021-07-29 13:08:30 +02:00
Liam Murphy
d5ba35424d Replace PeripheralStateUnchecked with register_interrupt_unchecked 2021-07-29 15:11:26 +10:00
Bob McWhirter
8759213fcc Use new interrupt! table format to /enable/ the IRQs also. 2021-07-27 13:23:33 -04:00
Bob McWhirter
b910551c9a Generate more rows in the interrupts! table. 
Adjust DMA/BDMA to use the new style.
 2021-07-27 12:52:01 -04:00
Liam Murphy
079526559f Remove critical sections from PeripheralMutex interrupt handler by checking the interrupt's priority on startup. 
Since `PeripheralMutex` is the only way to safely maintain state across interrupts, and it no longer allows setting the interrupt's priority, the priority changing isn't a concern.

This also prevents other causes of UB due to the interrupt being exposed during `with`, and allowing enabling the interrupt and setting its context to a bogus pointer.
 2021-07-27 17:28:52 +10:00
Timo Kröger
06fb2a7a80 Enable SYSCFG clock in exti::init() 2021-07-24 11:13:49 +02:00
Dario Nieuwenhuis
3c7375c6cd stm32/bdma: do not clear IF on IRQ handler 2021-07-24 10:01:11 +02:00
Timo Kröger
43c4f24207 STM32 BDMA: Use interrupt flags instead of atomics 2021-07-24 09:26:07 +02:00
Timo Kröger
5a4a5ce334 STM32 DMA: Use interrupt flags instead of atomics 2021-07-24 09:26:07 +02:00
Bob McWhirter
83f63890e5 Actually take a &mut of that read slice. 2021-07-23 13:22:39 -04:00
Bob McWhirter
473a83a937 Adjust how we deal with read/write being different length. 
Including some docs about it.
Removing the Rx-enablement for write-only operations.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
f1a3e0e05d As before, EVERY DANG TIME. 
It'll be sweet with intellij-rust-plugin works better.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
b07325b476 Enable DMA for SPIv1 on F4's etc. 2021-07-23 13:22:39 -04:00
Bob McWhirter
8ab82191b7 Every dang time. 2021-07-23 13:22:39 -04:00
Bob McWhirter
a1dac21bdf Make SPIv3 work with DMA. 
Add both DMA and non-DMA example to H7.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
6dbe049468 Add back in the other versions of SPI. 2021-07-23 13:22:39 -04:00
Bob McWhirter
0d2051243e SPIv2 + DMA. 2021-07-23 13:22:39 -04:00
Bob McWhirter
1a03f00b56 Wire up peripheral DMA channels for SPI. 2021-07-23 13:22:39 -04:00
Bob McWhirter
3df2aadc39 Avoid borrowck issue. 2021-07-23 13:22:39 -04:00
Bob McWhirter
dedc2bac42 IntelliJ'd. 2021-07-23 13:22:39 -04:00
Bob McWhirter
4c5a234a3a Add a non-minc write() to DMA which takes a count. 
Use it from "read-only" SPI.
 2021-07-23 13:22:39 -04:00
Bob McWhirter
7bbad4c4e5 More unused allowances. 2021-07-23 13:22:39 -04:00
Bob McWhirter
4bcc3b06c6 Include all versions when handing to CI. 2021-07-23 13:22:39 -04:00
Bob McWhirter
a75110296d Annotate to avoid unused warnings for the moment. 2021-07-23 13:22:39 -04:00
Bob McWhirter
3f379e06b0 Begin reworking SPI to add DMA for stm32. 2021-07-23 13:22:39 -04:00
Bob McWhirter
fe66f0f8f8 Checkpoint. 2021-07-23 13:22:39 -04:00
Bob McWhirter
650f867b1c Add a single-column variant to gpio_rcc! macro table 
which includes just the set of registers that need to be
considered.

Then match against those registers with a single `modify(...)`
 2021-07-23 11:32:20 -04:00
Bob McWhirter
13873df30b Auto-enable all GPIOs during init(). 2021-07-23 11:32:19 -04:00
Bob McWhirter
d68f2617e6 Add a Dbgmcu struct capable of enabling all relevant DBGMCU.cr fields. 
Includes the addition of a `dbgmcu!(...)` macro table which currently takes
the form of

	(cr, $fn_name:ident)

where `$fn_name` is something like `set_dbgsleep_d1` etc.

The method is unsafe, since it's performing unsafe PAC operations.

Two examples modified to demonstrate its usage.
 2021-07-22 14:18:48 -04:00
Bob McWhirter
2d3137afc7 The async move portion of @thalesfragoso's i2c PR. 2021-07-20 11:38:16 -04:00
Thales
40ea8298ee
Merge pull request #300 from thalesfragoso/clear-dma 
stm32: Clear possible set flags after disabling DMA
 2021-07-17 17:28:02 -03:00
Thales
f4b8709bac
Merge pull request #281 from thalesfragoso/i2c-256 
i2c-v2: Support transfers with more than 255 bytes
 2021-07-17 17:21:50 -03:00
Thales Fragoso
aae0431d31 stm32: Clear possible set flags after disabling DMA 2021-07-17 16:59:35 -03:00
Dario Nieuwenhuis
36be877ba3 stm32/dma: only set TRBUFF in DMAv1 (H7) 2021-07-17 08:01:20 +02:00
Dario Nieuwenhuis
3655048e0f stm32/dma: add MuxChannel trait to distinguish DMAMUX1 and DMAMUX2 channels. 2021-07-17 07:54:16 +02:00
Dario Nieuwenhuis
54b5012c56 stm32/dma: update codegen+macrotables for new stm32-data 2021-07-17 07:35:59 +02:00
Bob McWhirter
0119ea809d Get DMA on H7 working, add usart_dma example for H7. 2021-07-16 14:41:20 -04:00
Dario Nieuwenhuis
ae948415a7 stm32/dma: disable after finishing 2021-07-16 14:41:20 -04:00
Dario Nieuwenhuis
d0f2dc3abd Fix rustfmt 2021-07-16 14:41:20 -04:00
Dario Nieuwenhuis
63a0e188ea stm32/dma: fix h7 impls 2021-07-16 14:41:20 -04:00
Dario Nieuwenhuis
3d1391ef2d stm32/dma: impl all variants 2021-07-16 14:41:20 -04:00
Dario Nieuwenhuis
1b42b30201 stm32/pwr: add initial H7 SMPS support 2021-07-16 01:17:45 +02:00
Thales Fragoso
2f08c7ced5 stm32: Allow for RccPeripheral without reset field 
This fix build on F0, since it doesn't have DMARST. This change makes
RccPeripheral::reset a no-op on peripherals where a reset field couldn't
be found
 2021-07-15 13:25:51 -03:00
Thales Fragoso
e06628cdfb Update stm32-data 2021-07-14 23:39:50 -03:00
Thales Fragoso
aa8c7f990f i2c-v2: Implement write_vectored 2021-07-14 23:39:50 -03:00
Thales Fragoso
f2e78e9c34 i2c-v2: Correct number of chunks calculation 2021-07-14 23:39:50 -03:00
Thales Fragoso
8c7f8a61e3 i2c-v2: Support transfers with more than 255 bytes 2021-07-14 23:39:50 -03:00
Dario Nieuwenhuis
4361cb15f1 stm32/usart: merge v2 and v3 (they're identical) 2021-07-15 00:52:37 +02:00
Dario Nieuwenhuis
f916fe5476 all hals: reexport PAC if unstable-pac feature is set. 2021-07-14 22:19:04 +02:00
Bob McWhirter
43cb8de434 Remove gratuitous NoDmaMarker. 2021-07-14 14:37:42 -04:00
Bob McWhirter
38b1359c40 Remove pub and cfg's, since they will be implied by the existance of TxDma<T> in theory. 2021-07-14 14:35:03 -04:00
Bob McWhirter
a88f0028ef First shot at async dma usart for stm32. 2021-07-14 14:14:14 -04:00
Bob McWhirter
6e0e83cfd9 More conversions to associated consts. 2021-07-13 10:56:35 -04:00
Bob McWhirter
604a25ec5d Reduce number of traits and impls. 2021-07-13 10:46:31 -04:00
Bob McWhirter
8fbea38a5b Simplify some of the bdma macros. 
Make more things associated consts.
 2021-07-13 10:09:35 -04:00
Bob McWhirter
92247369e7 Remove some unused traits. 
Move some fns to associated consts.
 2021-07-13 10:09:35 -04:00
Bob McWhirter
2e10ab2e5c Let's count channels per DMA peripheral, shall we now? 2021-07-13 10:09:35 -04:00
Bob McWhirter
b0b61d99e6 Macros do indeed require a ! to invoke. 2021-07-13 10:09:35 -04:00
Bob McWhirter
6534b63e01 Simplify some macros around dmamux peripheral channels. 2021-07-13 10:09:35 -04:00
Bob McWhirter
0befa10367 Trivial to force CI to do it's thing. 2021-07-13 10:09:35 -04:00
Bob McWhirter
06e899b14c Adjust to DMA1EN in the rcc for l0. 2021-07-13 10:09:35 -04:00
Bob McWhirter
a9b2ed52ee Remove deadcode from dmamux. 
Smoosh bdma down to a single version.
 2021-07-13 10:09:35 -04:00
Bob McWhirter
45964c658c Generalize RCC enabling for BDMA peris. 2021-07-13 10:09:35 -04:00
Bob McWhirter
ff1cb9ac74 Remove warnings. 2021-07-13 10:09:35 -04:00
Bob McWhirter
97ad434d38 Twizzle our DMA vs BDMA channels. 2021-07-13 10:09:35 -04:00
Bob McWhirter
a24a7e9fec Allow some unused lints given that H7 is still in flight with its multitude of DMA. 2021-07-13 10:09:35 -04:00
Bob McWhirter
13975a0818 Try to improve H7 clockstuff. 2021-07-13 10:09:35 -04:00
Bob McWhirter
696a3b8552 Try to figure out h7cm's problem. 2021-07-13 10:09:35 -04:00
Bob McWhirter
6552af8f0b Fix warning for unused import. 2021-07-13 10:09:35 -04:00
Bob McWhirter
6e69992217 Add a no-op bdma for bdma v2 for CI. 2021-07-13 10:09:35 -04:00
Bob McWhirter
811ed18922 Add a missing 'use' for dma_v2. 2021-07-13 10:09:35 -04:00
Bob McWhirter
30a1d9bf93 Move to copying regs instead of &'static referencing. 
Remove unneeded stuff from the DMAMUX end of the stick.
 2021-07-13 10:09:35 -04:00
Bob McWhirter
f01ddd5f5c Mix dmamux into bdma_v1. 2021-07-13 10:09:35 -04:00
Bob McWhirter
6ec7253095 Checkpoint my DMA for thales. 2021-07-13 10:08:43 -04:00
Bob McWhirter
acdf7f4f13 Another checkpoint. 2021-07-13 10:08:43 -04:00
Bob McWhirter
31325a2547 Another checkpoint. 2021-07-13 10:08:43 -04:00
Bob McWhirter
043f0ea508 Checkpoint DMAMUX channel setup. 2021-07-13 10:08:43 -04:00
Thales Fragoso
91521a86a0 F0: usart + DMA working 2021-07-13 10:08:43 -04:00
Thales Fragoso
a56ddfdc04 STM: Add usart v2 2021-07-13 10:08:43 -04:00
Thales Fragoso
f32caaeaaf STM: Start working on bdma-v1 2021-07-13 10:08:43 -04:00
Dario Nieuwenhuis
35a76c364a embassy/time: make optional via Cargo feature 2021-07-12 03:45:48 +02:00
Liam Murphy
ff9ff5e43a Update the import 2021-07-05 18:31:54 +10:00
Liam Murphy
fc1ef4947d Fix stm32 ethernet 2021-07-05 18:18:05 +10:00
Dario Nieuwenhuis
ecc151d4e2 stm32/adc: simplify delay handling 2021-07-05 03:18:23 +02:00
Rukai
25d4b2ea26 fix stm32 warnings 2021-07-05 01:54:29 +02:00
Thales Fragoso
c2f595b26a F0: Fix missing apb2 clock 2021-07-03 02:12:22 -03:00
Bob McWhirter
f5ce807e25 Let's adjust i2c the correct way, removing the correct APBesque frequency, not the i2c periph speed. 2021-07-02 13:54:07 -04:00
Bob McWhirter
9f5d35d891 Remove the frequency argument for i2c, move to using RccPeripheral. 2021-07-01 13:53:57 -04:00
Bob McWhirter
8f94123ca4 argh, intellij. 2021-07-01 11:37:01 -04:00
Bob McWhirter
0920c0cb1d Make UART pins Rx/Tx/etc in addition to USART. 2021-07-01 11:30:54 -04:00
Bob McWhirter
54ada5bae1 Stub in the DMA bits that aren't yet there. 2021-07-01 11:30:54 -04:00
Bob McWhirter
bf3bc92525 Re-enable because intellij. 2021-07-01 11:30:54 -04:00
Bob McWhirter
497d3aa153 Add USARTv3 support. 2021-07-01 11:30:54 -04:00
Thales Fragoso
e07dda8707 stm32: Adjust some fences around DMA 
Also bump stm32-data
 2021-06-30 18:58:21 -03:00
Bob McWhirter
f3b9c97763 Change atomics and add a fence. 2021-06-30 10:17:25 -04:00
Bob McWhirter
cf5b7dc943 Because IntelliJ makes life hard. 2021-06-30 10:03:18 -04:00
Bob McWhirter
6a0b0f3162 Enable RCC within the USART itself. 2021-06-30 09:57:27 -04:00
Bob McWhirter
e1736114d4 Remove paste. 2021-06-30 09:44:28 -04:00
Bob McWhirter
07a6686879 Protect DMA-related things with cfg. 2021-06-29 13:00:52 -04:00
Bob McWhirter
6b78d56ceb Formatting. 2021-06-29 12:48:58 -04:00
Bob McWhirter
c53ab325c1 Wire up DMA with USART v1. 2021-06-29 11:01:57 -04:00
Bob McWhirter
b88fc2847a Checkpoint with lifetime issues. 2021-06-29 11:01:57 -04:00
Thales Fragoso
c5022b1196 stm32: Make sure Output gpio driver is pushpull 2021-06-27 13:25:35 -03:00
Thales Fragoso
0eaadfc125 stm32: Update gpio examples 2021-06-25 18:16:43 -03:00
Thales Fragoso
a3f0aa02a4 Separate OpenDrain pin to a new type 2021-06-25 17:22:51 -03:00
Thales Fragoso
efb3b3a0a8 stm32: Allow for open drain configuration for output pin 2021-06-24 20:42:43 -03:00
Thales Fragoso
013792b944 Separate exti into v1 and v2 2021-06-24 20:28:06 -03:00
Thales Fragoso
1c33a3b94c #[cfg] exti 2021-06-24 19:41:04 -03:00
Thales Fragoso
210104e6dc Remove unused gpio_af from codegen 2021-06-24 19:23:51 -03:00
Thales Fragoso
409884be2a Add F0 RCC 2021-06-24 19:21:56 -03:00
Thales Fragoso
797534d1a6 Update features to include F0 2021-06-22 14:41:42 -03:00
Dario Nieuwenhuis
5a4e3ceb88 Update stm32-data (adds DBGMCU to all chips) 2021-06-21 01:38:59 +02:00
Thales Fragoso
098ce6e740 stm32h7: Add ethernet example 2021-06-16 16:48:35 +02:00
Thales Fragoso
77546825a1 stm32: Make vcell dependency optional 2021-06-16 16:48:35 +02:00
Thales Fragoso
598201bff3 eth-v2: Make embassy-net optional 2021-06-16 16:48:35 +02:00
Thales Fragoso
6cecc6d4b5 eth-v2: Get hclk frequency from clock singleton 2021-06-16 16:48:35 +02:00
Thales Fragoso
f7e1f262af eth-v2: Enable source address filtering 2021-06-16 16:48:35 +02:00
Thales Fragoso
ffc19a54d6 eth-v2: Fix bug in Rx descriptors and add docs art 2021-06-16 16:48:35 +02:00
Thales Fragoso
6daa55a897 eth-v2: Fix setting the registers for the descriptors 
Also, the interrupts are set to 1 to clear, the manual could have helped
with that one...
 2021-06-16 16:48:35 +02:00
Thales Fragoso
0b42e12604 eth-v2: Fix off by one bug 2021-06-16 16:48:35 +02:00
Thales Fragoso
54ad2a41f1 eth-v2: Work around missing AF for REF_CLK 2021-06-16 16:48:35 +02:00
Thales Fragoso
0c837f07c0 eth-v2: Enable clocks in new 2021-06-16 16:48:35 +02:00
Thales Fragoso
e039c7c42c eth-v2: Remove Instance trait 2021-06-16 16:48:35 +02:00
Thales Fragoso
05a239faf6 eth-v2: Implement embassy-net's Device Trait and fix Drop 2021-06-16 16:48:35 +02:00
Thales Fragoso
4cffa200bd eth: Add lan8742a PHY 2021-06-16 16:48:35 +02:00
Thales Fragoso
46e1bae9e3 eth-v2: Start Ethernet peripheral implementation 2021-06-16 16:48:35 +02:00
Ulf Lilleengen
56c5218292 Prescaler 1 means divide by 3 on WL55 2021-06-16 16:21:16 +02:00
Ulf Lilleengen
383beb37b3 Rename from wl55 to wl5x and enable debug wfe 2021-06-16 16:07:21 +02:00
Ulf Lilleengen
b6a8703698 Add support for generating PAC for dual cores 
* Chips that have multiple cores will be exposed as chipname_corename,
  i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
  and pick the first and only core from the list
* Add support for stm32wl55 chip family
 2021-06-16 15:12:07 +02:00
Ulf Lilleengen
8ae4f47d3d Fix compile 2021-06-15 16:44:00 +02:00
Ulf Lilleengen
49fad2de8a Use correct frequencies for timers 2021-06-15 16:07:23 +02:00
Ulf Lilleengen
4b406dd107 Remove default rcc impl 2021-06-14 20:24:51 +02:00
Bob McWhirter
d58fb11b2e ADCv3 and example. 2021-06-14 13:20:42 -04:00
Ulf Lilleengen
531093f281 Derive SPI v1 and v3 clocks automatically 2021-06-14 11:58:16 +02:00
Ulf Lilleengen
5e1b0a5398 Add wb55 clocks 2021-06-14 11:41:02 +02:00
Ulf Lilleengen
ee9f67fa01 Add common types 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
a2da2a6db2 Remove unused l0 code 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
95532726b2 Add minimal RCC impls for L4 and F4 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
a13e07625f Add ... c1? 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
0b52731897 Add clocks for h7 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
2c63393c9e Add Clock type per RCC family 2021-06-14 11:33:11 +02:00
Ulf Lilleengen
952f525af5 Provide a way for a peripheral to query its clock frequency 
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
 2021-06-14 11:33:11 +02:00
Dominik Boehi
9edb6e41ce Make gen.py work without CSafeLoader 2021-06-12 18:28:21 +02:00
Dominik Boehi
0eab96f573 Initial support and example for STM32WB55 2021-06-12 07:06:36 +02:00