Commit Graph

5047 Commits

Author SHA1 Message Date
ee9f67fa01 Add common types 2021-06-14 11:33:11 +02:00
a2da2a6db2 Remove unused l0 code 2021-06-14 11:33:11 +02:00
95532726b2 Add minimal RCC impls for L4 and F4 2021-06-14 11:33:11 +02:00
a13e07625f Add ... c1? 2021-06-14 11:33:11 +02:00
0b52731897 Add clocks for h7 2021-06-14 11:33:11 +02:00
2c63393c9e Add Clock type per RCC family 2021-06-14 11:33:11 +02:00
952f525af5 Provide a way for a peripheral to query its clock frequency
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
2021-06-14 11:33:11 +02:00
85f172dd93 Merge pull request #244 from Tiwalun/fix-gen-macos
Make gen.py work without CSafeLoader
2021-06-12 20:20:09 +02:00
9edb6e41ce Make gen.py work without CSafeLoader 2021-06-12 18:28:21 +02:00
97e2f10665 Merge pull request #242 from Tiwalun/stm32wb55-metapac
Initial support and example for STM32WB55
2021-06-12 16:33:40 +02:00
b82e2627aa Add STM32WB55 examples to CI, fix example crate name 2021-06-12 07:06:42 +02:00
0eab96f573 Initial support and example for STM32WB55 2021-06-12 07:06:36 +02:00
3353f59a43 Merge pull request #243 from embassy-rs/update-smoltcp
UPdate smoltcp
2021-06-12 00:56:24 +02:00
890e93f367 UPdate smoltcp 2021-06-12 00:50:36 +02:00
def8870cbb Merge pull request #240 from lulf/enable-timer-clock
Enable timer clock in RCC on timer start
2021-06-11 16:30:54 +02:00
6c7fd3e3c4 Refactor 2021-06-11 16:21:51 +02:00
8dd3ddd228 Special handling for timers instead 2021-06-10 09:52:57 +02:00
0a9022d59f Enable timer clock in RCC on timer start
* Moves the tim2-specific code into macro which always uses TIM2
* For peripherals without clock specified, attempt to locate enable and
  reset registers in the RCC block matching the peripheral name. This
  could be useful for peripherals where deducing the clock name might
  not be feasible, but it remains to be tested with more chip families
  to see if it is sufficiently accurate.
2021-06-10 09:37:30 +02:00
37fbc5fcc4 Merge pull request #239 from lulf/add-h7ab-missing
Update reference to missing H7AB
2021-06-10 09:04:22 +02:00
2493fde536 Update reference to missing H7AB 2021-06-10 08:58:18 +02:00
bd7425a571 Merge pull request #228 from embassy-rs/metapac2
stm32-metapac: add new codegen, allows pregenerating the entire pac
2021-06-10 03:49:41 +02:00
c5a418a9a6 Run metapac full gen in Ci 2021-06-10 03:05:44 +02:00
189ab7b00e Update stm32-data to fix rcc_h7ab issues. 2021-06-10 03:03:44 +02:00
5b8ac447f2 stm32-metapac: add new codegen, allows pregenerating the entire pac 2021-06-10 02:33:38 +02:00
08bd140c6d Merge pull request #238 from lulf/add-stm32l0-examples
Add stm32l0 examples
2021-06-09 23:12:44 +02:00
1a51fd0453 Add all examples to workspace template 2021-06-09 23:12:25 +02:00
1bb7123156 Add examples for STM32L0 2021-06-09 23:09:48 +02:00
3d16e922d5 Merge pull request #237 from lulf/enable-clock-for-peris
Infer enable and reset registers based on RCC registry file
2021-06-09 23:09:00 +02:00
9a2adec584 Make RCC lookup optional 2021-06-09 19:33:29 +02:00
f3d1ac6623 Enable clock for RNG 2021-06-09 13:54:53 +02:00
a92d6a372b Cleanup and fix l4s 2021-06-09 13:50:04 +02:00
bd759510ba Generate clock peripherals for all peripherals with register block
Infers clock for a peripheral using the selected clock as a prefix, in
order to work with split registers
2021-06-09 13:40:34 +02:00
9d2f95c82f Merge pull request #236 from bobmcwhirter/h7-examples
Initial swag at h7 examples.
2021-06-08 16:26:46 -04:00
6295589467 Bring over DAC example (relies upon stm32-data update) 2021-06-08 15:25:38 -04:00
4f1f63f336 Initial swag at h7 examples. 2021-06-08 15:25:38 -04:00
8f8914a789 Merge pull request #234 from bobmcwhirter/l4-dac-ex
Small changes to support DAC example.
2021-06-08 20:12:28 +02:00
ecd53c916c Small changes to support DAC example. 2021-06-08 14:04:56 -04:00
80eb0ad526 Merge pull request #218 from lulf/stm32-clk-enable
RccPeripharal + generate SPI clock enable
2021-06-08 17:42:49 +02:00
f7394e56ef Handle other L4 variants 2021-06-08 17:37:41 +02:00
6e63bf7e44 Update submodule ref 2021-06-08 17:20:29 +02:00
939ea3bbd0 Reduce generics noise 2021-06-08 17:20:29 +02:00
ed29d82071 Use critical_section 2021-06-08 17:20:29 +02:00
212bda0940 Enable clock for SPI v1 and v3 2021-06-08 17:20:29 +02:00
a57482fddd Cargo fmt 2021-06-08 17:20:29 +02:00
459049d604 Workaround for L4 2021-06-08 17:20:29 +02:00
ee47a3e802 Add workaround for STM32H7 2021-06-08 17:20:29 +02:00
ee3b82b743 Auto generate SPI v2 clock enable
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral.

Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI.
2021-06-08 17:20:29 +02:00
af0f8082f0 Merge pull request #233 from bobmcwhirter/l4-examples
L4 examples
2021-06-08 16:46:12 +02:00
a407558e3f Add to GHA. 2021-06-08 10:41:18 -04:00
cf3c021c37 Initial examples for STM32L4+ 2021-06-08 10:37:11 -04:00