Commit Graph

167 Commits

Author SHA1 Message Date
d43417e97c stm32/wpan: implement mm pattern 2023-06-23 19:59:48 -05:00
29f32ce00e stm32/wpan: reorg subsystems 2023-06-23 17:54:06 -05:00
6f17286c75 Merge pull request #1576 from OueslatiGhaith/hci_v2
wpan: add BLE HCI
2023-06-23 02:09:52 +00:00
caf63b9e73 stm32/tests: update ble test 2023-06-22 21:05:51 -05:00
8bbfa6827c esp-hosted: add perf hil test. 2023-06-22 21:12:24 +02:00
810c6af77a fix build 2023-06-22 15:31:45 +01:00
1f2be2dac5 Merge pull request #1569 from xoviat/tl-mbox-2
wpan: misc. cleanup and add mac
2023-06-21 21:50:12 +00:00
2e625138ff Merge pull request #1501 from xoviat/can
async can
2023-06-20 22:57:31 +00:00
0d67ef795e Merge branch 'main' of https://github.com/embassy-rs/embassy into tl-mbox-2 2023-06-19 21:18:46 -05:00
5a075acc6a stm32/tests: fix can 2023-06-19 16:11:01 -05:00
aaad906815 Merge branch 'main' of https://github.com/embassy-rs/embassy into can 2023-06-19 15:52:33 -05:00
990dd5e5db tests/stm32: do multiple transfers to catch more bugs. 2023-06-19 22:38:27 +02:00
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
39334f7280 stm32/wpan: add ble, mac features and cleanup 2023-06-18 09:43:07 -05:00
7177e7ea1a stm32/wpan: cleanup and expand shci 2023-06-18 08:37:26 -05:00
ae83e6f536 Merge pull request #1566 from xoviat/tl-mbox-2
tl-mbox: switch to new ipcc mechanism
2023-06-17 20:48:37 +00:00
443550b353 stm32/wpan: use new ownership model 2023-06-17 15:37:34 -05:00
c7b0df569b stm32/wpan: modify evtbox to use slice view 2023-06-17 14:38:36 -05:00
6b5d55eb29 stm32/wpan: convert to new ipcc 2023-06-17 12:00:33 -05:00
e1161dfc80 stm32/wpan: improve linked list ergonomics 2023-06-16 20:15:03 -05:00
af451b5462 stm32/wpan: move schi command into sys 2023-06-15 21:02:10 -05:00
837ebe405f rp: update rp-pac. 2023-06-16 01:41:07 +02:00
29513074ee rustfmt 2023-06-13 17:16:12 -05:00
6c13f381c4 stm32/wpan: get --release working 2023-06-13 17:12:34 -05:00
3c98587a88 tests/ble: disable test for now
does not work in --release
2023-06-12 21:23:42 -05:00
802416d267 fix CI for tests 2023-06-12 15:04:52 +01:00
553c934325 fix CI for tests 2023-06-12 14:54:17 +01:00
a1b27783a6 fix build 2023-06-12 14:44:30 +01:00
98c821ac39 Remove embassy-cortex-m crate, move stuff to embassy-hal-common. 2023-06-09 16:44:20 +02:00
3dde01597a tests/rp: make cyw43-perf less strict. 2023-06-08 21:12:34 +02:00
4716166041 tests/rp: update cyw43-perf for embassy-net changes. 2023-06-08 20:51:36 +02:00
6701606e4c cyw43: add perf HIL test. 2023-06-06 02:50:57 +02:00
593fc78dd8 tests/rp: enable run-from-ram.
Otherwise the flash test is flaky because it attempts to use boot2.
2023-06-06 00:07:03 +02:00
35083b262b Merge branch 'main' into can 2023-05-30 21:15:26 -05:00
16bfbd4e99 stm32/can: add hw test and cleanup 2023-05-30 21:14:25 -05:00
020e956f1b ci: run HIL tests in parallel. 2023-05-30 01:10:53 +02:00
bab03a3927 Merge #1489 #1500
1489: stm32/ipcc: make IPCC methods static r=xoviat a=OueslatiGhaith



1500: stm32/tests: disable sdmmc test for now r=xoviat a=xoviat



Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-29 14:42:51 +00:00
bd6a1d38d2 stm32/tests: disable sdmmc test for now 2023-05-29 09:16:50 -05:00
5d7301e510 tests/stm32: revert cfg changes 2023-05-27 15:08:30 -05:00
09d52638b5 stm32/ipcc: refactor examples and tests 2023-05-27 15:05:50 -05:00
c19967dcf2 stm32/ipcc: extract tl_mbox linker file to embassy-stm32 2023-05-27 15:03:25 -05:00
984cd47b41 stm32/ipcc: update test 2023-05-26 10:03:01 +01:00
316be179af stm32: move to bind_interrupts
disable lora functionality for now
2023-05-24 17:29:56 -05:00
1fdde8f03f Merge #1457
1457: TL Mbox read and write for stm32wb r=xoviat a=OueslatiGhaith

Hello,

This pull request is related to #1397 and #1401, inspired by #24, built upon the work done in #1405 and #1424, and was tested on an stm32wb55rg.

This pull request aims to add read and write functionality to the TL mailbox for stm32wb microcontrollers

Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-23 01:15:22 +00:00
64092169e3 stm32/ipcc: disable test 2023-05-22 20:14:37 -05:00
d1dfaa1905 stm32/ipcc: fix hil test 2023-05-21 20:18:26 -05:00
1f65a4eb6f stm32/ipcc: enable test 2023-05-21 18:40:29 -05:00
d736c9205c updated test case 2023-05-19 15:40:09 +01:00
b950d6d72b Add HIL test 2023-05-16 11:28:35 +02:00
1a87f7477a Merge #1458
1458: rp: remove take!, add bind_interrupts! r=Dirbaio a=pennae

both of the uart interrupts now check a flag that only the dma rx path ever sets (and now unsets again on drop) to return early if it's not as they expect. this is ... not our preferred solution, but if bind_interrupts *must* allow mutiple handlers to be specified then this is the only way we can think of that doesn't break uarts.

Co-authored-by: pennae <github@quasiparticle.net>
2023-05-15 15:59:30 +00:00