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1042 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
f681b9d4e5 Remove the _todo_embedded_hal_serial impls. EH will probably not have these serial traits. 2023-04-15 00:58:58 +02:00
xoviat
650589ab3f stm32/rcc: add plli2s to Clocks and cfg directives 2023-04-14 16:30:36 -05:00
xoviat
c1d5f86871 stm32/rcc: fix warnings 2023-04-12 18:11:55 -05:00
xoviat
0289630fe4 stm32/rcc: add i2s pll on some f4 micros 2023-04-12 18:04:44 -05:00
Sebastian Goll
4863f88d02 Make Hertz constructors const 
This allows them to be used in constant values.
 2023-04-13 00:06:14 +02:00
Sebastian Goll
f3699e67b9 Fix typo in derivation of PLLP divisor 2023-04-12 02:07:31 +02:00
Dario Nieuwenhuis
9a677ab618 common/peripheral: do not require mut in PeripheralRef clone_unchecked. 2023-04-11 23:09:02 +02:00
Dario Nieuwenhuis
1f25d2ba83
Merge pull request #1347 from embassy-rs/h5-spi 
stm32h5: add spi support, fix DMA hang, add HIL tests.
 2023-04-10 21:27:44 +02:00
Glenn Dirkx
6760258ec3 fix I2C controller problems after NACK 2023-04-10 16:20:47 +02:00
Dario Nieuwenhuis
4ef8e008e8 stm32/spi: add v4/v5 support (for H5). 2023-04-10 15:25:11 +02:00
Dario Nieuwenhuis
44b7fe45e2 stm32/gpdma: fix race condition when resetting channel when done. 2023-04-10 15:11:07 +02:00
Dario Nieuwenhuis
8469a2409c stm32/otg: add U5 support. 2023-04-07 02:28:36 +02:00
Dario Nieuwenhuis
dee1d51ad3 stm32: remove subghz feature. 
It's available only on WL. if you're using a WL, you want subghz for sure.
 2023-04-07 02:28:36 +02:00
bors[bot]
da8258b767
Merge #1330 
1330: stm32/pwm: add complementary pwm r=Dirbaio a=xoviat

This implements complementary PWM with dead time on many supported targets. The specific dead-time programming functions are passed through directly to the user, which is a bit ugly but the best compromise I could reach for now.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-04-06 21:33:17 +00:00
Dario Nieuwenhuis
be37eee13d Update embedded-hal crates. 2023-04-06 22:41:50 +02:00
bors[bot]
89279dcdc9
Merge #1333 
1333: STM32: Adc V1 r=Dirbaio a=GrantM11235

Based on #947

Co-authored-by: Matthew W. Samsonoff <matt.samsonoff@gmail.com>
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
 2023-04-06 17:16:50 +00:00
Dario Nieuwenhuis
611d023829 stm32: add H5 support. 2023-04-06 18:59:37 +02:00
Dario Nieuwenhuis
9f28d80977 stm32/usb: add support for 32bit usbram. 2023-04-06 18:59:37 +02:00
xoviat
9f1dac3f5d stm32/pwm: add complementary pwm example 2023-04-05 18:07:07 -05:00
xoviat
7677268319 stm32/pwm: cleanup and fix complementary pwm 2023-04-05 17:50:23 -05:00
Grant Miller
0ef419bee4 Change ADC1 to ADC 2023-04-05 16:52:32 -05:00
Grant Miller
92e96bd601 Fix typo 2023-04-05 16:38:06 -05:00
Grant Miller
20e7b5e296 InternalChannel 2023-04-05 16:11:21 -05:00
Grant Miller
37d8f2e512 Properly enable and reset adc 2023-04-05 15:28:42 -05:00
Grant Miller
f588105429 wip 2023-04-05 15:01:31 -05:00
Matthew W. Samsonoff
511a951246 Differentiate between read and read_internal for STM32F0 ADC 
The internal channels (vbat, vref, and temperature) are not real pins and do
not have the `set_as_analog` method. They must be read using the
`read_internal` method.
 2023-04-05 14:34:24 -05:00
Matthew W. Samsonoff
a0b6096610 Put ADC input pin into analog mode 2023-04-05 14:34:24 -05:00
Matthew W. Samsonoff
5d9ae3dbdb Add implementation of STM32 v1 ADC 2023-04-05 14:34:24 -05:00
Rasmus Melchior Jacobsen
95b31cf2db Remove Drop on Flash and FlashLayout and propage lifetime to region types 
This allows the user to "split" the FlashRegions struct into each region
 2023-04-05 10:27:13 +02:00
xoviat
991b22b6a1 stm32/pwm: add complementary pwm 2023-04-04 19:35:25 -05:00
Rasmus Melchior Jacobsen
3deb65bc87 Merge branch 'master' into flash-regions 2023-04-04 23:16:01 +02:00
bors[bot]
143105eeb6
Merge #1313 
1313: (embassy-stm32): rework bufferedUart to get rid of PeripheralMutex r=Dirbaio a=MathiasKoch

New implementation is very similar to the implementation of embassy-nrf & embassy-rp. 

Also adds embedded-hal traits to bufferedUart.

**NB**: Still needs testing on actual hardware

Co-authored-by: Mathias <mk@blackbird.online>
 2023-04-04 15:14:07 +00:00
Mathieu Dupont
1349dabe1a add compilation time exclusion for stm32f410 2023-04-03 17:55:05 +02:00
Mathieu Dupont
4ce1c5f27d Add MCO support for L4 and F4 families 2023-04-03 16:41:25 +02:00
Rasmus Melchior Jacobsen
bfebf7a436 Fix formatting of sector erase log 2023-04-03 08:02:43 +02:00
Rasmus Melchior Jacobsen
dd88775871 Ensure that flash locking is defered to after write 2023-04-01 18:10:20 +02:00
Rasmus Melchior Jacobsen
e11eebfa57 Ensure that ranges are validated with the region size 2023-04-01 17:26:32 +02:00
Mathias
472dc6b7d1 Fix interrupt handling so it is similar to before the rework, and fix examples 2023-03-31 15:57:35 +02:00
Rasmus Melchior Jacobsen
50b0fb1a37 Let get_flash_regions be public 2023-03-31 15:47:45 +02:00
Mathias
cfbe93c280 Rework bufferedUart to get rid of PeripheralMutex in a similar fashion as nrf & rp. Also adds embedded-hal traits to bufferedUart 2023-03-31 10:43:30 +02:00
Rasmus Melchior Jacobsen
f3dcb5eb22 Wrap write/erase operations in cs 2023-03-30 15:13:44 +02:00
Rasmus Melchior Jacobsen
a78e10e003 Add defmt support to new flash types 2023-03-30 09:17:14 +02:00
Rasmus Melchior Jacobsen
760d4a72cb Ensure that embedded_storage traits are actually implemented 2023-03-30 09:05:13 +02:00
Rasmus Melchior Jacobsen
e7129371d0 Let sector computation be shared across families 2023-03-30 08:32:36 +02:00
Rasmus Melchior Jacobsen
e3c4e00be0 Align families 2023-03-30 06:01:56 +02:00
Rasmus Melchior Jacobsen
91d8afd371 Add AltFlashLayout for supported F4 chips 2023-03-30 05:27:57 +02:00
Rasmus Melchior Jacobsen
89129babf9 Merge remote-tracking branch 'upstream/master' into flash-regions 2023-03-30 04:53:07 +02:00
Rasmus Melchior Jacobsen
def576ac46 Remove FlashRegion trait and rename Settings to FlashRegion 2023-03-30 04:24:41 +02:00
Rasmus Melchior Jacobsen
ef1890e911 Remove flash operations from FlashRegion trait and move to common module 2023-03-29 15:45:18 +02:00
bors[bot]
754bb802ba
Merge #1294 
1294: Add support for `QSPI` in `stm32` r=Dirbaio a=Mirror0

Implemented with help of Tomasz Grześ <tomasz.grzes@gmail.com>.

Tested only on stm32f777zi.

Co-authored-by: Mateusz Butkiewicz <mateusz@github.butkiewicz.dev>
 2023-03-29 13:42:29 +00:00
Rasmus Melchior Jacobsen
fc8c83e00a Fix h7 compile error 2023-03-29 14:50:19 +02:00
Mateusz Butkiewicz
87898501a2 feat(stm32:qspi): convert some u8 to enum variants 2023-03-29 14:28:25 +02:00
Rasmus Melchior Jacobsen
a0d089536a Merge branch 'flash-regions' of https://github.com/rmja/embassy into flash-regions 2023-03-29 14:10:33 +02:00
Rasmus Melchior Jacobsen
15e1747220 Fix build of not implemented family 2023-03-29 14:10:16 +02:00
Rasmus Melchior Jacobsen
0bbc3a3d81
Merge branch 'master' into flash-regions 2023-03-29 13:59:17 +02:00
Rasmus Melchior Jacobsen
5a12fd6c75 Add unimplemented family section 2023-03-29 13:57:33 +02:00
Rasmus Melchior Jacobsen
b7dfc8de10 Let flash module be conditionally included 2023-03-29 13:52:52 +02:00
Rasmus Melchior Jacobsen
ddbd509865 Move as much logic from families to shared module as possible 2023-03-29 13:37:45 +02:00
Rasmus Melchior Jacobsen
69944675a3 Expose get_sector in favor of is_eraseable_range 2023-03-29 12:49:13 +02:00
Rasmus Melchior Jacobsen
4ee3d15519 Keep peripheral lifetime when calling into_regions() 2023-03-29 12:10:24 +02:00
Rasmus Melchior Jacobsen
6806bb9692 Expose flash region settings as an array 2023-03-29 11:52:18 +02:00
Rasmus Melchior Jacobsen
d6ce1c4325 Support running tests in embassy-stm32 and move impl from common back to stm32 2023-03-29 11:31:45 +02:00
bors[bot]
7a841b58d1
Merge #1307 
1307: (embassy-stm32): add embedded-io blocking Read + Write for BufferedUart r=MathiasKoch a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
 2023-03-28 12:35:07 +00:00
Mathias
14f6bc88ea Remove unnecessary lifetime 2023-03-28 14:34:36 +02:00
Mathias
2d7f35cf57 Add embedded-io blocking Read + Write for BufferedUart 2023-03-28 14:28:44 +02:00
Mateusz Butkiewicz
6a802c4708 feat(stm32:qspi): add support for QSPI in stm32 
Implemented with help of Tomasz Grześ <tomasz.grzes@gmail.com>.
 2023-03-27 13:20:00 +02:00
Dario Nieuwenhuis
a33774ec51 Update stm32-metapac 2023-03-27 12:36:31 +02:00
Rasmus Melchior Jacobsen
e9a5b31fa8 Implement drop for FlashRegions 2023-03-25 17:00:52 +01:00
Rasmus Melchior Jacobsen
e8fc7a66a3 Ensure flash module and FlashRegion trait is always defined 2023-03-25 16:32:32 +01:00
Rasmus Melchior Jacobsen
bc69eb596e Add is_eraseable_range and split write into consecutive parts 2023-03-25 16:04:45 +01:00
Rasmus Melchior Jacobsen
73ccc04231 Change region type name 2023-03-25 13:47:28 +01:00
Rasmus Melchior Jacobsen
47d5f127bb Align L family 2023-03-25 13:30:24 +01:00
Rasmus Melchior Jacobsen
47e07584ca Align H7 family 2023-03-25 13:03:00 +01:00
Rasmus Melchior Jacobsen
a8567f0617 Align F7 family 2023-03-25 06:26:00 +01:00
Rasmus Melchior Jacobsen
7edd72f8f5 Align F3 family 2023-03-25 06:07:57 +01:00
Rasmus Melchior Jacobsen
6c73b23f38 Align F4 family 2023-03-25 05:59:40 +01:00
Rasmus Melchior Jacobsen
6b44027eab Add FlashRegion trait and implement embedded_storage traits for each region 2023-03-25 05:58:40 +01:00
Eric Yanush
13f0c64a8c Fix APB clock calculation for several STM32 families 2023-03-16 21:21:39 -06:00
Dario Nieuwenhuis
43462947ed stm32: remove unused embedded-storage-async. 2023-03-14 17:27:40 +01:00
Davide Della Giustina
c0e40b887b
Apply fix 2023-03-01 20:57:13 +00:00
Dario Nieuwenhuis
351e4407ef
Merge pull request #1252 from pattop/stm32_spi_fifo_fix 
stm32/spi: fix occasional data corruption
 2023-03-01 03:08:05 +01:00
Patrick Oppenlander
aabc275186 stm32/spi: fix occasional data corruption 
Need to clear the rx fifo before enabling rx dma.
 2023-03-01 12:24:22 +11:00
Davide Della Giustina
3c601bf8d2
PacketQueue::init() does not need to be unsafe 2023-02-28 18:04:43 +00:00
Davide Della Giustina
485bb76e46
Implemented suggestions from @Dirbaio 2023-02-28 17:39:02 +00:00
Davide Della Giustina
c1e93c0904
PacketQueue::new() uses ::init() when in nightly 2023-02-28 14:34:26 +00:00
Davide Della Giustina
90f2939bf6
Added PacketQueue::init() 2023-02-28 14:22:54 +00:00
Grant Miller
7be4337de9 Add #[must_use] to all futures 2023-02-24 13:01:41 -06:00
bors[bot]
3255e0a172
Merge #1228 
1228: stm32/sdmmc: Implement proper clock configuration r=chemicstry a=chemicstry

This implements proper clock configuration for sdmmc based on chip family, because `RccPeripheral::frequency()` is almost always incorrect. This can't be fixed in PAC, because sdmmc uses two clock domains, one for memory bus and one for sd card. `RccPeripheral::frequency()` usually returns the memory bus clock, but SDIO clock calculations need sd card domain clock. Moreover, chips have multiple clock source selection bits, which makes this even more complicated. I'm not sure if it's worth implementing all this logic in `RccPeripheral::frequency()` instead of cfg's in sdmmc.

Some chips (Lx, U5, H7) require RCC updates to expose required clocks. I didn't want to mash everything in a single PR so left a TODO comment. I also left a `T::frequency()` fallback, which seemed to work in H7 case even though the clock is most certainly incorrect.

In addition, added support for clock divider bypass for sdmmc_v1, which allows reaching a maximum clock of 48 MHz. The peripheral theoretically supports up to 50 MHz, but for that ST recommends setting pll48 frequency to 50 MHz 🤔

Co-authored-by: chemicstry <chemicstry@gmail.com>
 2023-02-23 16:22:31 +00:00
chemicstry
73ef85b765 stm32/sdmmc: Fix compile errors 2023-02-23 18:00:55 +02:00
bors[bot]
f0f92909c1
Merge #1227 
1227: stm32/dma: fix spurious transfer complete interrupts r=Dirbaio a=pattop

DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.


Co-authored-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
 2023-02-23 15:44:43 +00:00
chemicstry
896764bb85 stm32/sdmmc: Refactor TypeId into a macro 2023-02-23 17:38:52 +02:00
chemicstry
42462681bd stm32/sdmmc: Implement proper clock configuration 2023-02-23 16:57:21 +02:00
Patrick Oppenlander
4e884ee2d2 stm32/dma: fix spurious transfer complete interrupts 
DMA interrupts must be acknowledged by writing to the DMA_{L,H}IFCR
register.

Writing to the CR register is unnecessary as the channel (EN bit) is
disabled by hardware on completion of the transfer.
 2023-02-23 10:12:48 +11:00
chemicstry
a53f525f51 stm32/sdmmc: Fix SDIOv1 writes 2023-02-18 01:37:06 +02:00
Mathias
5e74926907 feature-gate variants without vals defined 2023-02-13 15:46:49 +01:00
Mathias
218b44652c Rebase on master 2023-02-13 14:55:15 +01:00
Dario Nieuwenhuis
1e36c91bf8 stm32: fix fmc-related build failures on some F4's 2023-02-13 02:22:06 +01:00
Christian Enderle
d21643c060 fix "prescaler none" which incorrectly set "prescaler divided by 3" 2023-02-12 11:36:57 +01:00
Lucas Granberg
2b6654541d rustfmt 2023-02-09 13:01:44 +02:00
Lucas Granberg
43d018b67f Use rng_v2 cfg instead of chip specific for seed error recover hack 2023-02-09 12:44:20 +02:00