Commit Graph

522 Commits

Author SHA1 Message Date
e527892d89 Start work on CRC_v1 2021-09-26 16:29:22 -07:00
f8d833e0c5 Merge pull request #403 from mryndzionek/af_type
Small adjustment to 'set_as_af' interface
2021-09-24 20:20:45 +02:00
e4b37c40c9 Code review request - moving OutputType to mod sealed 2021-09-24 19:56:48 +02:00
d371298a27 Small adjustment to 'set_as_af' interface
Small adjustment to 'set_as_af' interface - v2
2021-09-24 18:39:07 +02:00
7d6d274d55 Add MSI and PLL clock source for L4 2021-09-24 18:27:39 +02:00
b6fc19182b Add pwr for L1 and update RCC to new reg block 2021-09-23 14:51:16 +02:00
9d45018077 Refactor V1 SPI 2021-09-21 14:50:23 +02:00
c79485c286 Support for STM32L1
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
fb697a2657 Updates 2021-09-15 12:46:20 +02:00
bb72f7eb98 Merge pull request #390 from lulf/wasm-executor
Wasm executor support
2021-09-13 18:55:17 +02:00
99a94f1d50 Update version of critical-section 2021-09-13 17:05:17 +02:00
d6faf69e09 Merge pull request #378 from numero-744/gen-features-using-rust-not-python
Use our beloved Rust instead of Python
2021-09-13 16:47:01 +02:00
e24528051b Add WASM support for executor
* Adds an executor for WASM runtimes based on wasm_bindgen.
* Add time driver based on JS time handling.
* Add example that can run in browser locally.
* Update to critical-section version that supports 'std' flag
2021-09-13 16:42:39 +02:00
99ccf18160 fix(gen-features): keep data files order 2021-09-11 20:04:57 +02:00
ead987245d embassy: Refactor module structure to remove kitchen-sink util. 2021-09-11 02:35:35 +02:00
f2623e7e9b Update lots of deps 2021-09-11 01:35:23 +02:00
14fa6c2760 STM32H7: Ethernet: Disable RA in MAC filtering, fix order of MACA0 register writes. 2021-09-06 23:16:43 +01:00
d4bf78a0c1 Don't set SAF=true, do set RA=true for Ethernet.
Source-Address-Filtering is not helping the board to receive packets.
For unknown reasons, the Receive-All is required, when in theory
it should not be required. Until we figure it out, follow the
stm32h7xx-hal example of setting RA=true.
2021-09-06 14:21:26 -04:00
eff8ae9c4d Merge pull request #381 from lulf/stm32wl55-subghz
Add HAL for SubGhz peripheral for STM32 WL series
2021-09-06 00:58:42 +02:00
de016e8456 Remove trait_alias, allow(incomplete_features).
trait_alias seems unused. no idea why it's there.
2021-09-03 17:00:58 +02:00
0f3d278ce3 Temporarily comment unused code 2021-09-02 11:31:38 +02:00
4dccda085f Add missing files for G0 2021-09-02 11:19:54 +02:00
f175574bcf Cargo fmt 2021-09-02 10:43:08 +02:00
16aa1d1770 ADd missing file 2021-09-02 10:42:11 +02:00
7ad6280e65 Add HAL for SubGhz peripheral for STM32 WL series
Based on the HAL from stm32wl, the peripheral driver has been
modified to fit into embassy, using the embassy APIs, providing
operation of the radio peripheral.

The initial version does not offer any async APIs, but the example
shows how the radio IRQ can be used to perform async TX of the radio.
2021-09-02 10:39:56 +02:00
37ceae908b Rename Random impl to Rng.
Create Random struct providing next_x(range) for all T:Rng.
2021-09-01 09:39:33 -04:00
7fa3b27cac Move random utils to another trait. 2021-08-30 09:55:29 -04:00
d525f51940 Add a convenience next(range) to Rng. 2021-08-27 16:10:01 -04:00
022b809248 refactor(gen_features): use Rust instead of Python
Done for /embassy-stm32 only
The new generator is in /stm32-gen-features
/stm32-metapac could/should be added too
A CI check "generated features up to date" could/should be performed
2021-08-27 11:09:27 +02:00
e56c6166dc Merge pull request #373 from embassy-rs/docs
Time driver improvements, docs.
2021-08-26 23:37:37 +02:00
dc394dd477 Fixes #374: Ensure Rng's error is defmt-able. 2021-08-26 14:04:12 -04:00
1098072384 build(stm32): remove gen.py build dependency 2021-08-26 18:59:37 +02:00
7c0990ad1e time: allow storing state inside the driver struct. 2021-08-25 21:06:27 +02:00
4aa52f1b9e Formatting. 2021-08-24 14:56:45 -04:00
e36ae76e45 Fix blocking-write for SPI. 2021-08-24 14:44:47 -04:00
e2f71ffbbd Add support for STM32G0 2021-08-20 00:15:11 +02:00
174c51f097 stm32/metapac: check GPIO RCC regs are always found. 2021-08-19 23:59:50 +02:00
2c992f7010 stm32: move dbgmcu stuff to toplevel config setting, defaulting to true. 2021-08-19 23:50:19 +02:00
446d6c275c stm32: remove last use of python at build time 2021-08-19 23:42:18 +02:00
9f51f9a170 stm32/wl: add stub APB3 to get it to build.
Completely untested.
2021-08-19 22:51:41 +02:00
637fcdd316 stm32/rcc: update for new version naming 2021-08-19 22:17:45 +02:00
ec51880e28 stm32/exti: unify all versions into single impl 2021-08-19 22:17:17 +02:00
d3aeb45fb3 Update cortex-m-rt to v0.7 for stm32, rp. 2021-08-19 00:56:11 +02:00
f141b98741 bxcan: Cleanup
Older families like F1 and F4 have a consistent naming for the CAN
peripherals: CAN when there is only one instance, CAN1/CAN2/CAN2 if
there are multiple instances.
Newer families like L4 and F7 use the name CAN1 even if there is only
one instance. The number of filter banks is incorrect for those.

Affected chips:
* STM32F722
* STM32F723
* STM32F730
* STM32F732
* STM32F733
* STM32L4P5
* STM32L4Q5
* STM32L4R5
* STM32L4R7
* STM32L4R9
* STM32L4S5
* STM32L4S7
* STM32L4S9
* STM32L431
* STM32L432
* STM32L433
* STM32L442
* STM32L443
* STM32L451
* STM32L452
* STM32L462
* STM32L471
* STM32L475
* STM32L476
* STM32L485
* STM32L486
2021-08-18 21:58:50 +02:00
0c3bede64f bxcan: Make bxcan a hard dependency
There seems no way to enable a optional dependency from build.rs or
features passed through the command line.
2021-08-18 21:58:50 +02:00
191a589820 bxcan: namechange "bxcan_v1" -> "can_bxcan" 2021-08-18 21:58:50 +02:00
dc6b7f3cba bxcan: Disable on drop 2021-08-18 21:58:50 +02:00
7c405250a7 CAN support with bxcan crate 2021-08-18 21:58:50 +02:00
4df63f5379 Add per-core EXTI support
* Generate a core index put into the PAC for the peripherals to use as
  index into registers.
* Add EXTI v2 which uses CORE_INDEX to index exti registers
2021-08-17 16:22:47 +02:00
61409e2fb6 Add example for STM32WL55 2021-08-17 16:22:47 +02:00