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103 Commits

Author SHA1 Message Date
bors[bot]
dfccb84fcb
Merge #457 
457: nrf91: support running in both S and NS mode. r=Dirbaio a=Dirbaio

- Cargo feature `nrf9160` is now `nrf9160-s` or `nrf9160-ns`
- "fake-PAC" renames everything appropriately so there's no need to spam cfg's everywhere.

With `nrf9160-s`  you can now run code without flashing any weird SPM/bootloader. Tested on nrf9160-dk.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2021-10-27 22:43:35 +00:00
Dario Nieuwenhuis
c995a97f20 nrf91: support running in both S and NS mode. 2021-10-26 17:40:07 +02:00
Dario Nieuwenhuis
cf47676dac Add stm32f7 to CI 2021-10-26 17:33:28 +02:00
bors[bot]
05bc4d198e
Merge #423 
423: nRF9160 support r=Dirbaio a=diondokter

- Created a chip file with all the peripherals, interrupts and peripheral implementations.
- All peripherals now use an alias for the NS (non-secure) version of the nRF9160 version.
- Implementations of peripherals that don't exist are ignored.
- Most PPI functionality has been stubbed out because the nRF91 has the newer DPPI which is not compatible with the current API. (The channels are also set to not configurable, so they are kinda useless now, but in principle the stubs should never be called)


Co-authored-by: Dion Dokter <dion@tweedegolf.com>
 2021-10-13 21:11:41 +00:00
Dion Dokter
c1c704bfc8 - Removed the enable assert from UARTE. 
- Added nRF9160 to CI.
 2021-10-13 15:00:08 +02:00
Dario Nieuwenhuis
db289d6d5e Add bors 2021-10-12 01:52:26 +02:00
Dario Nieuwenhuis
a816776cb5 Add matrix bot 2021-10-06 20:34:38 +02:00
Mariusz Ryndzionek
bce909ec1e Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill) 2021-09-28 18:31:04 +02:00
Ulf Lilleengen
c79485c286 Support for STM32L1 
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
 2021-09-21 14:50:23 +02:00
Ulf Lilleengen
e24528051b Add WASM support for executor 
* Adds an executor for WASM runtimes based on wasm_bindgen.
* Add time driver based on JS time handling.
* Add example that can run in browser locally.
* Update to critical-section version that supports 'std' flag
 2021-09-13 16:42:39 +02:00
Dario Nieuwenhuis
da707051b0 stm32: add G0 to Ci 2021-08-20 01:29:37 +02:00
Ulf Lilleengen
919cdfe8c4
Add STM32WL55 examples to CI (#361) 
* Add STM32WL55 examples to CI and fix warnings
 2021-08-18 09:35:08 +02:00
Dario Nieuwenhuis
0ea6a2d890 time: replace dyn clock/alarm with a global Driver trait 2021-08-05 19:14:09 +02:00
Dario Nieuwenhuis
87f27d5ed6 ci: rustfmt check all .rs files 
The old script was missing many .rs files that were not enabled due to cfg's.
 2021-08-04 15:23:32 +02:00
Bob McWhirter
d8c6ffe3a2 Revert "Optimize CI" 
This reverts commit fe58e9541d.
 2021-07-28 09:24:45 -04:00
Dario Nieuwenhuis
fe58e9541d Optimize CI 2021-07-24 15:29:31 +02:00
Thales Fragoso
697f93ad42 stm32: Add F0 example 2021-07-15 13:50:39 -03:00
Dario Nieuwenhuis
1d64421fb4 Fix "can't find crate for std" for stm32-metapac-gen deps. 2021-07-13 05:47:10 +02:00
huntc
e13aa4c2a0 Add tests to our CI 
Also found some doctests that were failing
 2021-07-06 12:29:08 +10:00
Dario Nieuwenhuis
e4145bf08b Deny warnings in CI 2021-07-05 02:44:12 +02:00
Ulf Lilleengen
b6a8703698 Add support for generating PAC for dual cores 
* Chips that have multiple cores will be exposed as chipname_corename,
  i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
  and pick the first and only core from the list
* Add support for stm32wl55 chip family
 2021-06-16 15:12:07 +02:00
Dominik Boehi
b82e2627aa Add STM32WB55 examples to CI, fix example crate name 2021-06-12 07:06:42 +02:00
Dario Nieuwenhuis
c5a418a9a6 Run metapac full gen in Ci 2021-06-10 03:05:44 +02:00
Ulf Lilleengen
1bb7123156 Add examples for STM32L0 2021-06-09 23:09:48 +02:00
Bob McWhirter
4f1f63f336 Initial swag at h7 examples. 2021-06-08 15:25:38 -04:00
Bob McWhirter
a407558e3f Add to GHA. 2021-06-08 10:41:18 -04:00
Dario Nieuwenhuis
dff03ecfc7 Move examples to a subdirectory 2021-06-02 01:32:19 +02:00
Dario Nieuwenhuis
f4700e072d Really checkout submodules in CI 2021-05-31 03:07:46 +02:00
Dario Nieuwenhuis
2729adc68a Checkout submodules in ci 2021-05-31 02:51:47 +02:00
Dario Nieuwenhuis
99048b91e9 net: add ci 2021-05-28 23:13:23 +02:00
Dario Nieuwenhuis
38f59c4dea Add stm32l0 to CI 2021-05-21 19:05:26 +02:00
Dario Nieuwenhuis
16f8db4fcd Build with executor-agnostic in CI 2021-05-19 12:57:22 +02:00
Dario Nieuwenhuis
9206d4b33d Add more chips to CI 2021-05-17 03:28:24 +02:00
Dario Nieuwenhuis
410b24d54b Add more chips to CI 2021-05-17 03:25:30 +02:00
Dario Nieuwenhuis
f7858631d8 stm32: fix build, add ci 2021-05-17 03:16:58 +02:00
Dario Nieuwenhuis
bfc7f52e6d Remove stm32. 
stm32 developemnt continues in the `stm32-neo` branch for now.
 2021-05-17 00:57:32 +02:00
Dario Nieuwenhuis
bd9589d0ce nrf: add support for nrf52805, nrf52811, nrf52820 2021-05-17 00:57:20 +02:00
Rukai
854022dbee Use rust-toolchain.toml for developers and CI 2021-05-09 12:46:48 +10:00
xoviat
009e1896bf stm32: consolidate crates 2021-03-30 10:05:52 -05:00
Dario Nieuwenhuis
fa17644d8e ci: fmtcheck all crates individually since there's no workspace anymore. 2021-03-29 22:31:26 +02:00
Dario Nieuwenhuis
4371302da8 Remove workspace Cargo.toml, add template 2021-03-29 21:46:51 +02:00
Dario Nieuwenhuis
5f6f1c38d9 rp: Add to Ci 2021-03-29 21:35:25 +02:00
xoviat
be58de039b ci: add stm32f446 2021-03-20 18:13:21 -05:00
xoviat
6835ce4314 ci: set target 2021-03-19 10:52:27 -05:00
xoviat
267c3cadf2 ci: attempt to consolidate nrf examples 2021-03-19 10:46:13 -05:00
xoviat
e3686ab784 ci: rm ci.sh 2021-03-19 09:14:50 -05:00
xoviat
c565deb34a ci: parallelize and use cache 2021-03-19 09:09:56 -05:00
Michael Beaumont
5ad259620c
Add cargo fmt --all -- --check to ci.sh 2021-03-18 21:02:37 +01:00
Dario Nieuwenhuis
18f6b8ad68 thumbv6m support with emulated atomics 2021-03-04 21:56:31 +01:00
Dario Nieuwenhuis
d4f2c6cf00 Remove cargo namespaced-features 2021-03-02 21:15:12 +01:00
Dario Nieuwenhuis
ffab3916f4 Install rust-src in ci 2021-02-28 22:06:47 +01:00
Dario Nieuwenhuis
02af635e7b Fix CI 2020-12-01 17:52:06 +01:00
Dario Nieuwenhuis
7ddfeafc84 Add CI 2020-10-31 23:03:46 +01:00