Commit Graph

260 Commits

Author SHA1 Message Date
Lachezar Lechev
7a4db1da26
fix(rp): spi transfer
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-20 16:34:30 +02:00
Mathias
89a371d10c Add HIL test for into_buffered uart on embassy-rp 2023-03-14 12:46:58 +01:00
Mathias
bce1ce7dcb Allow upgrading a blocking uart to a BufferedUart, and implement blocking serial traits for BufferedUart 2023-03-14 10:36:30 +01:00
Caleb Jamison
7bdb3abad7 Swap debug! for trace! in rp gpio
When using gpio pin changes for things like peripheral interrupts these
debug! calls flood defmt, making it difficult to find what you're
actually looking for.
2023-03-02 13:59:52 -05:00
Lachezar Lechev
5cb0c8cc01
fix: rp - disable Pull-down/up resistors for ADC read
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-02-28 09:22:38 +02:00
Andres Hurtado Lopez
2331d58aa6 RP-PICO UART adding set_baudrate: missing to run rust-fmt 2023-02-26 21:23:51 -05:00
Andres Hurtado Lopez
482ba835c4 RP-PICO UART adding set_baudrate: Changing static call from specific type to a Self (requires adding lifetime specifier) 2023-02-26 19:20:08 -05:00
Andres Hurtado Lopez
7172dfd083 RP-PICO UART adding set_baudrate: refactoring of methods 2023-02-26 19:14:25 -05:00
Andres Hurtado Lopez
8fb380b180 RP-PICO UART adding set_baudrate 2023-02-26 18:40:23 -05:00
Grant Miller
7be4337de9 Add #[must_use] to all futures 2023-02-24 13:01:41 -06:00
sekoia
e641db1f75 Fix a typo in "PioPeripheral" 2023-02-15 14:10:07 +01:00
Slushee
dfc58ad3a2
Add copy to Level enum in embassy-rp gpio module 2023-02-13 17:29:35 +00:00
Slushee
1626a4a74b
Add clone to embassy_rp::gpio::Level 2023-02-13 17:12:50 +00:00
Dario Nieuwenhuis
ca10fe7135 usb: docs 2023-01-31 22:27:19 +01:00
nitroxis
1e60c60afd rp: allow isochronous USB endpoints to be up to 1023 in size 2023-01-27 07:24:49 +01:00
Matt Johnston
83af513424 rp gpio: make pin_bank() inline
This allows set_high() etc to be inlined, toggling pins
should be much faster.
2023-01-19 13:36:40 +08:00
bors[bot]
b6c8505697
Merge #1142
1142: More rp2040 BufferedUart fixes r=Dirbaio a=timokroeger

* Refactor init code
* Make it possible to drop RX without breaking TX (or vice versa)
* Correctly handle RX buffer full scenario

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2023-01-14 00:07:02 +00:00
chemicstry
ce842fe28c Refactor embassy-usb address handling to allow reordering of status resoponse 2023-01-11 17:47:12 +01:00
Timo Kröger
539f97da53 rp: Fix formatting string to please CI 2023-01-05 22:00:44 +01:00
Timo Kröger
1096a9746c rp: Improve BufferedUart interrupt handling
* Only clear interrupt flags that have fired (so that we do not lose any error flags)
* Enable RX interrupt when a read is requested, disable it when the RX buffer is full
* Rework TX interrupt handling: its "edge" triggered by a FIFO threshold
2023-01-05 18:45:58 +01:00
Pedro Ferreira
6d4c6e0481 rp2040: add {tx,rx}-only constructors to UART 2023-01-04 21:11:19 +01:00
Timo Kröger
840a75674b rp: Disable RX interrupts when ring buffer is full
When data is in the RX fifo the RX timeout interrupt goes high again even after clearing it.
The result is a deadlock because execution is stuck in the interrupt handler. No other code
can run to clear the receive buffer.
Enable and disable RX interrupts based on the buffer fill level.
Use the same approach for the TX code path.
2023-01-04 16:53:43 +01:00
Timo Kröger
a24037edf9 rp: Fix BufferedUart drop code
Only unregister the interrupt handler when both parts are inactive
2023-01-04 15:59:03 +01:00
Timo Kröger
68c186309f rp: Common init function for BufferedUart
BufferedUart, BufferedUartRx and BufferedUartTX can all use the same init code.
2023-01-04 15:58:26 +01:00
Timo Kröger
e4f457646f rp: Fill and empty FIFOs in buffered uart interrupt
Fixes an issue where only the first byte was transmitted.
Should improve throughput aswell.
2022-12-27 11:28:52 +01:00
Dario Nieuwenhuis
41d6316984 rp: switch to released 0.2.1 pio crate. 2022-12-26 22:30:22 +01:00
bors[bot]
c29657f95a
Merge #1128
1128: Add missing SPI pins r=Dirbaio a=pferreir

The SPI definitions lack the pins which are not accessible on the pico (but are so e.g. on the stamp).

Co-authored-by: Pedro Ferreira <pedro@dete.st>
2022-12-25 23:52:33 +00:00
Pedro Ferreira
f2fb9a2ca6 Add missing SPI pins 2022-12-25 23:49:04 +00:00
kalkyl
e090ab1915 Remove lifetime, use pac fields 2022-12-24 03:22:51 +01:00
kalkyl
eaad0cc1dc embassy-rp: Add Watchdog 2022-12-24 02:51:06 +01:00
bors[bot]
67a6e5accf
Merge #1122
1122: embassy-rp: Add split() to BufferedUart r=kalkyl a=kalkyl



Co-authored-by: kalkyl <henrik.alser@me.com>
2022-12-23 22:16:58 +00:00
Dario Nieuwenhuis
10c9cc31b1 Remove unnecessary use of atomic-polyfill.
Only use it when CAS is actually needed.
2022-12-23 20:46:49 +01:00
kalkyl
aa92ce6dc7 embassy-rp: Add split() to BufferedUart 2022-12-22 23:03:05 +01:00
kalkyl
c4d8f3579e Update usage in docs 2022-12-13 14:15:04 +01:00
kalkyl
731eb3c6e3 fmt 2022-12-13 13:55:23 +01:00
Henrik Alsér
3d68c0400b
Merge branch 'master' into multicore 2022-12-13 13:51:48 +01:00
kalkyl
13d9d8fde1 Refactor after review 2022-12-13 13:49:51 +01:00
kalkyl
aea28c8aa0 Add usage in to docs 2022-12-13 09:45:11 +01:00
kalkyl
eb1d2e1295 Pause CORE1 execution during flash operations 2022-12-13 04:02:28 +01:00
kalkyl
96d6c7243b Cleanup 2022-12-10 13:43:29 +01:00
kalkyl
d8821cfd41 Feature gate critical-section-impl 2022-12-10 12:57:45 +01:00
kalkyl
1ee58492fb embassy-rp: Add multicore support 2022-12-10 08:26:35 +01:00
Simon Berg
488e322478 Clear unused pulls in set_pull. 2022-12-09 20:30:17 +01:00
Simon Berg
cd59046e6c Added RelocateProgram class for adjusting PIO-programs for different origins. 2022-12-09 20:18:41 +01:00
Simon Berg
35db6e639b PIO support for RPi Pico 2022-12-09 20:18:41 +01:00
Dario Nieuwenhuis
7cbc3aefe6 rp: implement input for OutputOpenDrain 2022-12-06 19:54:39 +01:00
Ulf Lilleengen
bb89a2341c
feat: embassy-boot for rp2040
Add embassy-boot support for RP2040, with examples for the Raspberry Pi
Pico.

Co-authored-by: Mathias Koch <mk@blackbird.online>
2022-12-02 11:28:33 +01:00
Gabriel Smith
71df28e269 rp: Add an RngCore impl based on ROSC.RANDOMBIT
This has the potential to not be random, but it should not be an issue
if default clock settings are used.
2022-11-30 14:06:05 -05:00
Gabriel Smith
4d84b5469e Drive-by documentation link fixes 2022-11-27 16:32:18 -05:00
Gabriel Smith
3ca14ba4e9 usb-driver: Remove unncessary lifetime 2022-11-27 16:28:24 -05:00