Joonas Javanainen
07ad52162b
Add PLL config support for F2
2022-04-29 18:21:40 +03:00
Matous Hybl
371f3ef419
Add ADC support for H7
2022-04-12 22:25:00 +02:00
Dario Nieuwenhuis
8b757e1aec
Add stm32wlexx support
2022-04-08 03:43:58 +02:00
Dario Nieuwenhuis
50ff63ab88
Add STM32L5 support.
2022-04-08 03:11:38 +02:00
Joonas Javanainen
a608d0deaf
Add minimal STM32F2 RCC
...
No support for PLL or other clocks than SYSCLK/AHB/APB1/APB2
2022-03-27 18:40:49 +03:00
Dario Nieuwenhuis
ea5cd19c30
stm32: fix build for h7ab
2022-02-24 06:28:29 +01:00
Dario Nieuwenhuis
39d06b59cd
Update stm32-data
2022-02-14 02:12:06 +01:00
Dario Nieuwenhuis
8160af6af9
stm32: replace peripheral_rcc! macrotable with build.rs
2022-02-09 00:58:17 +01:00
Dario Nieuwenhuis
a8580ec78a
stm32/rcc: fix stm32f410
2022-01-24 00:50:35 +01:00
Matous Hybl
e07df92651
Make RCC accessible using low-level API.
2022-01-13 16:12:45 +01:00
Dario Nieuwenhuis
c3fd9a0f44
stm32/rcc: f4/f7 cleanup and make a bit more consistent.
2022-01-04 21:17:17 +01:00
Dario Nieuwenhuis
b06e705a73
stm32/rcc: change family-specific code from dirs to single files.
...
Consistent with how other peripherals handle their versions.
2022-01-04 19:28:15 +01:00
Sjoerd Simons
a93b1141e9
stm32f1: Store adc clock rate in Clocks struct
2021-12-30 10:50:28 +01:00
VasanthakumarV
3f33d307ff
[feature] Add rcc register support for F3
2021-12-13 14:50:13 +05:30
Dario Nieuwenhuis
b0fabfab5d
Update stm32-data: rcc regs info comes from yamls now.
2021-11-29 02:28:02 +01:00
Ulf Lilleengen
25b49a8a2a
Remove common clock types
...
Different STM32 RCC peripherals have different capabilities and register
values. Define types for each RCC types inside each module to ensure
full range of capabilities for each family can be used
2021-11-28 16:46:08 +01:00
Dario Nieuwenhuis
88d4b0c00d
stm32: add stm32g4 support.
2021-11-27 02:34:23 +01:00
Bob McWhirter
f12b70535b
Adjust for STM32U5.
2021-11-02 12:05:24 -04:00
Matous Hybl
015cad84dd
Initial support for STM32F767ZI.
2021-10-26 17:33:28 +02:00
Mariusz Ryndzionek
bce909ec1e
Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill)
2021-09-28 18:31:04 +02:00
Ulf Lilleengen
c79485c286
Support for STM32L1
...
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
Ben Gamari
e2f71ffbbd
Add support for STM32G0
2021-08-20 00:15:11 +02:00
Dario Nieuwenhuis
9f51f9a170
stm32/wl: add stub APB3 to get it to build.
...
Completely untested.
2021-08-19 22:51:41 +02:00
Dario Nieuwenhuis
637fcdd316
stm32/rcc: update for new version naming
2021-08-19 22:17:45 +02:00
Thales Fragoso
5abaf8e9d6
Start working on the F4 PLL
2021-07-29 18:43:13 -03:00
Thales Fragoso
2f08c7ced5
stm32: Allow for RccPeripheral without reset field
...
This fix build on F0, since it doesn't have DMARST. This change makes
RccPeripheral::reset a no-op on peripherals where a reset field couldn't
be found
2021-07-15 13:25:51 -03:00
Bob McWhirter
13975a0818
Try to improve H7 clockstuff.
2021-07-13 10:09:35 -04:00
Thales Fragoso
c2f595b26a
F0: Fix missing apb2 clock
2021-07-03 02:12:22 -03:00
Thales Fragoso
409884be2a
Add F0 RCC
2021-06-24 19:21:56 -03:00
Ulf Lilleengen
383beb37b3
Rename from wl55 to wl5x and enable debug wfe
2021-06-16 16:07:21 +02:00
Ulf Lilleengen
b6a8703698
Add support for generating PAC for dual cores
...
* Chips that have multiple cores will be exposed as chipname_corename,
i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
and pick the first and only core from the list
* Add support for stm32wl55 chip family
2021-06-16 15:12:07 +02:00
Ulf Lilleengen
49fad2de8a
Use correct frequencies for timers
2021-06-15 16:07:23 +02:00
Ulf Lilleengen
4b406dd107
Remove default rcc impl
2021-06-14 20:24:51 +02:00
Ulf Lilleengen
5e1b0a5398
Add wb55 clocks
2021-06-14 11:41:02 +02:00
Ulf Lilleengen
ee9f67fa01
Add common types
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
95532726b2
Add minimal RCC impls for L4 and F4
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
2c63393c9e
Add Clock type per RCC family
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
952f525af5
Provide a way for a peripheral to query its clock frequency
...
Currently this looks up the frequency in the global singleton that must
be initialized by the per-chip RCC implementation. At present, this is
only done for the L0 family of chips.
2021-06-14 11:33:11 +02:00
Ulf Lilleengen
ed29d82071
Use critical_section
2021-06-08 17:20:29 +02:00
Ulf Lilleengen
ee3b82b743
Auto generate SPI v2 clock enable
...
Adds RccPeripheral trait for peripherals implementing clock enable and reset for a given peripheral.
Add macro table generting implementations of RccPeripheral for peripherals with clock set, currently restricted to SPI.
2021-06-08 17:20:29 +02:00
Dario Nieuwenhuis
d8e4421fc6
Add stm32-metapac crate, with codegen in rust
2021-05-31 02:40:58 +02:00
Ulf Lilleengen
a41a812345
Move clocks to rcc mod
2021-05-27 09:50:11 +02:00
Ulf Lilleengen
6eaf224fec
No more systemclock
2021-05-26 21:46:57 +02:00
Ulf Lilleengen
bfa999a2e0
Assume tim2 in macro and remove clock setup in chip specific rcc init
...
Add temporary start_tim2() fn to Clock to assist macro in starting
embassy clock
2021-05-26 21:42:07 +02:00
Ulf Lilleengen
c501b162fc
Enable clock by default for stm32l0
...
Modify init function to return a Clock instance defined by a per-chip
SystemClock type and use this in macro setup
A proof of concept implementation for STM32 L0 chips.
This allows using embassy::main macros for STM32 devices that have the
clock setup logic.
2021-05-26 12:33:07 +02:00
Ulf Lilleengen
1c10e746b6
Re-adds embassy macros for stm32
...
* Hook RCC config into chip config and use chip-specific RCC init
function
* RTC/clock setup is ignored for now
2021-05-25 13:30:42 +02:00
Thales Fragoso
054f0d51dc
H7: Add initial PLL configuration
2021-05-21 20:13:37 -03:00
