Commit Graph

2119 Commits

Author SHA1 Message Date
Matthew W. Samsonoff
877fbeb223 Update stm32-data submodule 2022-03-04 18:03:55 +01:00
Matthew W. Samsonoff
047ff9a2f2 Use new stm32-data registers and fix AHB clock calculation
The original code for calculating the AHB clock did not account for the gap in
prescaler values (32 is not an available value.) The bit shifting and math has
been replaced by a `match`.
2022-03-04 18:03:55 +01:00
bors[bot]
35636953b2
Merge #636
636: stm32: Add support for using TIM12 and TIM15 as time driver r=Dirbaio a=matoushybl

I am not sure what the effect of reducing the number of alarms will be, but these are the only timers I have available on my board.

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-02-28 18:25:13 +00:00
Matous Hybl
0172ca5b81 stm32: Add support for using TIM12 and TIM15 as time driver 2022-02-28 19:20:22 +01:00
bors[bot]
b9a8d649cf
Merge #649
649: stm32: Register access for timers now doesn't require self r=Dirbaio a=matoushybl



Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-02-28 15:55:29 +00:00
Matous Hybl
a88c5e716e stm32: Register access for timers now doesn't require self 2022-02-28 16:20:42 +01:00
bors[bot]
141e007acf
Merge #646
646: Debloat stm32-metapac r=Dirbaio a=Dirbaio

- Remove usage of `peripheral_counts!` macrotables.
- Remove `dbgmcu!` macrotable.
- Move the remaining macrotables to embassy-stm32 build.rs. This brings metapac decompressed size from ~250mb to ~100mb
- Deduplicate files with identical metadata. This brings decompressed size from ~100mb to ~70mb, compressed from ~10mb to ~4mb, which is finally small enough to publish on crates.io!

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-26 02:42:26 +00:00
Dario Nieuwenhuis
451bb48464 stm32-metapac: remove all macrotables, deduplicate metadata files. 2022-02-26 03:23:09 +01:00
Dario Nieuwenhuis
dd828a7a92 stm32: move macrotables to embassy-stm32 build.rs 2022-02-26 03:23:09 +01:00
Dario Nieuwenhuis
e6299549a0 stm32/i2c: use one static per instance instead of an array. 2022-02-26 01:23:17 +01:00
Dario Nieuwenhuis
8d46d31824 stm32/dbgmcu: do not use macrotable. 2022-02-26 01:20:42 +01:00
bors[bot]
d381b8e2b6
Merge #645
645: stm32 usart: Fix RX interrupt flag handling r=lulf a=timokroeger

* On v1 interrupts cannot be cleared individually.
  Instead they are cleared implicitly by reading or writing DR (which we do now).
* Multiple error flags can be set at the same time:
  Handle them all in one go intstead of re-entering the ISR for each one so that
  we do not lose any error flags on v1 hardware.
* Wake when the RX buffer becomes full: This allows fast running chips to pull data
  from the buffer before receiving the next byte.

Tested on v1 hardware, lets see if v2 still succeeds on CI.

Co-authored-by: Timo Kröger <timokroeger93@gmail.com>
2022-02-25 14:28:44 +00:00
Timo Kröger
48f700b35c stm32 usart: Fix RX interrupt flag handling
* On v1 interrupts cannot be cleared individually.
  Instead they are cleared implicitly by reading or writing DR (which we do now).
* Multiple error flags can be set at the same time:
  Handle them all in one go intstead of re-entering the ISR for each one so that
  we do not lose any error flags on v1 hardware.
* Wake when the RX buffer becomes full: This allows fast running chips to pull data
  from the buffer before receiving the next byte.
2022-02-25 14:32:39 +01:00
bors[bot]
6da4b66364
Merge #644
644: stm32 misc fixes r=Dirbaio a=Dirbaio

- Fix build when no DBGMCU is present (wl55 cm0 core)
- Fix multicore 2nd core having the wrong NVIC.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-25 00:47:12 +00:00
Dario Nieuwenhuis
f6bbb987c8 stm32: update stm32-data, fixes multicore nvic 2022-02-25 01:16:40 +01:00
Dario Nieuwenhuis
0ad7a3aa6f stm32: fix chips without dbgmcu (wl55 cm0 core) 2022-02-25 01:16:23 +01:00
bors[bot]
5163de6094
Merge #643
643: stm32: build fixes for troublesome chips r=Dirbaio a=Dirbaio

See individual commits.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-24 05:29:33 +00:00
Dario Nieuwenhuis
14afe0f6e4 ci: add troublesome stm32 chips 2022-02-24 06:28:29 +01:00
Dario Nieuwenhuis
ea5cd19c30 stm32: fix build for h7ab 2022-02-24 06:28:29 +01:00
Dario Nieuwenhuis
1ff80f8438 stm32/mco: fix on h7ab 2022-02-24 06:28:29 +01:00
Dario Nieuwenhuis
2a246be06e stm32/time_driver: use trait impls from the main timer mod. 2022-02-24 06:28:29 +01:00
Dario Nieuwenhuis
e8ca5f9b04 stm32/rcc: fix build on l0 chips without CRS 2022-02-24 06:28:29 +01:00
bors[bot]
cb8a7d00d5
Merge #642
642: stm32: centralize gpio reg access in the gpio module. r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-24 01:49:54 +00:00
Dario Nieuwenhuis
bf80504ac7 stm32: centralize gpio reg access in the gpio module. 2022-02-24 02:49:20 +01:00
Dario Nieuwenhuis
29aa51a1ad
Merge pull request #641 from embassy-rs/fix-stm32f1-af
stm32f1: fix input GPIO AFs, add to HIL.
2022-02-24 02:17:12 +01:00
Dario Nieuwenhuis
e39fd4a736 stm32: add stm32f103 bluepill to HIL tests. 2022-02-24 00:37:15 +01:00
Dario Nieuwenhuis
1b3c34b923 stm32/gpio: fix wrong conf for AF input. 2022-02-24 00:37:15 +01:00
Dario Nieuwenhuis
17e77ede3f stm32f1: fix wrong AF type in uart, can. 2022-02-24 00:37:15 +01:00
bors[bot]
caad1111f9
Merge #639
639: stm32: move pin trait impls from macrotables to build.rs r=Dirbaio a=Dirbaio

Continuation of work from #601 #638

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-23 19:51:52 +00:00
Dario Nieuwenhuis
93a3323ed9 stm32-metapac: remove peripehral_pins! macrotable. 2022-02-23 20:22:16 +01:00
Dario Nieuwenhuis
052f370de9 stm32: move ADC, DAC pin impls to build.rs 2022-02-23 20:21:28 +01:00
Dario Nieuwenhuis
30ce71127a stm32: move MCO pin impls to build.rs 2022-02-23 19:54:46 +01:00
Dario Nieuwenhuis
1e69a8c484 stm32: move pin trait impls from macrotables to build.rs 2022-02-23 19:54:46 +01:00
Dario Nieuwenhuis
f14cacbf93 stm32-metapac: change af from string to u8 2022-02-23 19:54:46 +01:00
bors[bot]
042e7d6de7
Merge #638
638: stm32: move dma trait impls from macrotables to build.rs r=Dirbaio a=Dirbaio

Continuation of work from #601

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-23 18:42:33 +00:00
Dario Nieuwenhuis
2c8fee59d6 stm32-metapac: remove peripehral_dma_channels! macrotable. 2022-02-23 19:16:37 +01:00
Dario Nieuwenhuis
b4abb1f5c2 stm32: move dma trait impls from macrotables to build.rs 2022-02-23 19:16:37 +01:00
bors[bot]
bc053404ca
Merge #635
635: Add documentation about the different embassy abstraction layers r=Dirbaio a=lulf

The guide demonstrates the functionality offered by each
layer in Embassy, using code examples.

Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2022-02-23 16:21:21 +00:00
Ulf Lilleengen
0d19dcc8e5 Update after review 2022-02-23 13:24:09 +01:00
Ulf Lilleengen
092eef3ae7 Add documentation about the different embassy abstraction layers
The guide demonstrates the functionality offered by each
layer in Embassy, using code examples.
2022-02-23 09:48:32 +01:00
Dario Nieuwenhuis
4c6e61b3b1
Merge pull request #634 from embassy-rs/time-docs
time: better docs explaining overflow handling.
2022-02-23 05:16:39 +01:00
Dario Nieuwenhuis
fdb6e66b4b time: better docs explaining overflow handling. 2022-02-23 05:16:30 +01:00
bors[bot]
78795d6f56
Merge #628
628: Improve logic for processing button events r=Dirbaio a=ceigel

Allow blinking to be interrupted by button presses in this sample.

Co-authored-by: Cristian Eigel <cristian.eigel@esrlabs.com>
2022-02-23 02:50:12 +00:00
bors[bot]
d70a644681
Merge #633
633: stm32/rcc: fix f3 build failure. r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-23 02:43:23 +00:00
Dario Nieuwenhuis
2abb04d4d1 stm32/rcc: fix f3 build failure. 2022-02-23 03:42:46 +01:00
bors[bot]
697be8bbdc
Merge #632
632: Update nightly. r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-21 04:28:06 +00:00
Dario Nieuwenhuis
0d76681f58 Update nightly. 2022-02-21 05:27:02 +01:00
Dario Nieuwenhuis
b9cea77ef4
Update getting_started.adoc 2022-02-21 05:02:39 +01:00
Cristian Eigel
f4ac3cf364 Improve logic for processing button events 2022-02-16 21:22:35 +01:00
bors[bot]
59f909e665
Merge #626
626: rp: impl eh1.0 blocking traits r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-15 16:29:59 +00:00