Commit Graph

322 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
89b009b11d stm32h7/rcc: remove unneeded DMA enable settings.
These are automatically enabled by dma::init().
2022-01-04 13:31:30 +01:00
Dario Nieuwenhuis
cdc66e110f stm32/rcc: remove builders on Config.
This makes API consistent with other Config structs in Embassy, where
the convention is to not use builders.
2022-01-04 13:31:30 +01:00
bors[bot]
f744b74e90
Merge #539
539: nrf: async usb r=Dirbaio a=jacobrosenthal

Frankensteined together from this old pr https://github.com/embassy-rs/embassy/pull/115 and nrf-usdb

~Doesnt currently work..~

Co-authored-by: Jacob Rosenthal <jacobrosenthal@gmail.com>
2022-01-04 07:41:54 +00:00
bors[bot]
cdfd128185
Merge #545
545: Add adapter for implementing async traits for blocking types r=lulf a=lulf

This allows writing drivers relying on async traits, while still
functioning with implementations that already implement the embedded-hal
traits.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-01-03 14:17:21 +00:00
bors[bot]
c0e94a7042
Merge #563
563: Initial ADC support for on STM32F1xx  r=Dirbaio a=sjoerdsimons

Add an ADC implementation for F1 based chips. Primarily tested using ADC1, proper functionality for ADC2 probably needs some extra work as it's mainly a slave and can't e.g. measure vrefint by itself.

Needs https://github.com/embassy-rs/stm32-data/pull/115

Co-authored-by: Sjoerd Simons <sjoerd@collabora.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-01 11:45:23 +00:00
Sjoerd Simons
dafc4c54e9 examples: stm32f1: Add an example of using the ADC 2021-12-30 10:53:39 +01:00
Sjoerd Simons
f0f08f298b examples: stm32f1: Optimize for size on development builds
Even the basic examples seemingly need to be build optimized for size to
allow flashing to a bluepill
2021-12-30 10:53:01 +01:00
Robert Walker
1028b5c671 Review changes 2021-12-29 08:17:51 +01:00
Robert Walker
4271226fc0 Added and tested the usart dma example for stm32f767zi using a
Nucleo-f767zi board.
2021-12-28 08:33:34 +01:00
Dario Nieuwenhuis
22bc1e4ae1 nrf/gpio: add infallible inherent methods, remove some duplication.
This implements Input and Output using FlexPin, to avoid some code duplication.
2021-12-20 00:55:18 +01:00
Ulf Lilleengen
3811c0a401 Add adapter for implementing async traits for blocking types
This allows writing drivers relying on async traits, while still
functioning with implementations that already implement the embedded-hal
traits.

Add examples to stm32l4 for using this feature.
2021-12-17 12:54:51 +01:00
Jacob Rosenthal
e7d2c52680 example cleanup 2021-12-16 15:20:56 -07:00
Jacob Rosenthal
1d51f91368 usb_uart_io example equivilent to usb_uart 2021-12-16 14:59:35 -07:00
Jacob Rosenthal
1f2bbe3e4a simplify usb_uart example 2021-12-16 14:59:08 -07:00
Ulf Lilleengen
985c11fad5 Update rust-toolchain 2021-12-16 11:34:20 +01:00
bors[bot]
5df16c6793
Merge #544
544: Introduces split on the nRF Uarte r=Dirbaio a=huntc

A new `split` method is introduced such that the Uarte tx and rx can be used from separate tasks. An MPSC is used in an example to illustrate how data may be passed between these tasks.

The approach taken within the `Uarte` struct is to split into tx and rx fields on calling `Uarte::new`. These fields are returned given a call to `Uarte::split`, but otherwise, if that call isn't made, then the API remains as it was before.

Here's a snippet from a new example introduced:

```rust
#[embassy::main]
async fn main(spawner: Spawner, p: Peripherals) {
    // ...

    let uart = uarte::Uarte::new(p.UARTE0, irq, p.P0_08, p.P0_06, NoPin, NoPin, config);
    let (mut tx, rx) = uart.split();

    // ...

    // Spawn a task responsible purely for reading

    unwrap!(spawner.spawn(reader(rx, s)));

    // ...

    // Continue reading in this main task and write
    // back out the buffer we receive from the read
    // task.
    loop {
        if let Some(buf) = r.recv().await {
            info!("writing...");
            unwrap!(tx.write(&buf).await);
        }
    }
}

#[embassy::task]
async fn reader(mut rx: UarteRx<'static, UARTE0>, s: Sender<'static, Noop, [u8; 8], 1>) {
    let mut buf = [0; 8];
    loop {
        info!("reading...");
        unwrap!(rx.read(&mut buf).await);
        unwrap!(s.send(buf).await);
    }
}
```


Co-authored-by: huntc <huntchr@gmail.com>
2021-12-16 07:44:40 +00:00
bors[bot]
d5a3064c2c
Merge #540
540: Initial support for STM32F3 r=Dirbaio a=VasanthakumarV

The [companion PR](https://github.com/embassy-rs/stm32-data/pull/109) in `stm32-data` should be merged before this PR.
The examples were tested on an STM32F303VC MCU.

Co-authored-by: VasanthakumarV <vasanth260m12@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-16 07:30:03 +00:00
Jacob Rosenthal
5d19f87acb cleanup example 2021-12-15 12:30:48 -07:00
Jacob Rosenthal
61f12324ff enable USB peripheral for relevant chips 2021-12-15 10:23:19 -07:00
Jacob Rosenthal
79502330de rename to UsbBus 2021-12-15 09:59:56 -07:00
huntc
1374ad2ab6 Introduces split on the nRF Uarte
A new `split` method is introduced such that the Uarte tx and rx can be used from separate tasks. An MPSC is used to illustrate how data may be passed between these tasks.
2021-12-15 18:31:52 +11:00
Jacob Rosenthal
5f0fefbd25 dont rely on nrf-usdb 2021-12-14 16:51:34 -07:00
Jacob Rosenthal
3debe604fb sorta works, too many interupts? 2021-12-14 16:48:48 -07:00
Jacob Rosenthal
07cbd41131 dont expose embedded_hal_common::usb 2021-12-14 15:47:54 -07:00
Jacob Rosenthal
f31140a70b revert 2021-12-14 13:51:50 -07:00
bors[bot]
1a7b9e3279
Merge #542
542: nrf/gpiote: remove PortInput, move impls to Input/FlexPin. r=Dirbaio a=Dirbaio

`PortInput` is just a dumb wrapper around `Input`, it has no reason whatsoever to exist. This PR moves the `wait_for_x` functionality to `Input` directly.

It also adds it to `FlexPin` for completeness and consistency with `Input`.

(The reason `PortInput` exists is a while ago `GPIOTE` was an owned singleton that you had to initialize, so `PortInput::new()` would require it to enforce it's been initialized. This doesn't apply anymore now that GPIOTE is "global")

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-14 14:09:59 +00:00
Dario Nieuwenhuis
153b1bbdbf nrf/gpiote: remove PortInput, move impls to Input. 2021-12-14 13:23:40 +01:00
Jacob Rosenthal
535d30335a make send, consolidate usb types 2021-12-13 18:13:42 -07:00
Jacob Rosenthal
83a1237ea3 stub out the embassy registers for usbd 2021-12-13 18:04:54 -07:00
VasanthakumarV
a65c2bc2b4 [examples] Add examples for STM32F3 2021-12-13 14:50:13 +05:30
Jacob Rosenthal
e5dc63e8e9 usb feature gate 2021-12-12 21:39:59 -07:00
Jacob Rosenthal
f430c0e8c2 nrf-usbd 2021-12-12 19:20:02 -07:00
bors[bot]
052abc918a
Merge #537
537: Documents the nRF BufferedUarte problem r=Dirbaio a=huntc

Please see https://github.com/embassy-rs/embassy/issues/536 for the rationale.

Co-authored-by: huntc <huntchr@gmail.com>
2021-12-12 20:35:43 +00:00
Matous Hybl
e95b96f3a4 Use smoltcp 0.8.0 from crates.io. 2021-12-12 15:32:36 +01:00
huntc
dc3469b297 Documents the nRF BufferedUarte problem
Please see https://github.com/embassy-rs/embassy/issues/536 for the rationale.
2021-12-12 17:52:17 +11:00
Ulf Lilleengen
9b01eed195 Revert blinky changes for now 2021-12-10 12:32:20 +01:00
Ulf Lilleengen
e93f2679b1 More content 2021-12-10 12:27:44 +01:00
huntc
7256ff3e71 Provides AsyncWrite with flush
As per Tokio and others, this commit provides a `poll_flush` method on `AsyncWrite` so that a best-effort attempt at wakening once all bytes are flushed can be made.
2021-12-10 12:16:08 +11:00
Matous Hybl
484c356c03 Add DCMI example. 2021-12-09 12:56:39 +01:00
Matous Hybl
d6f3b479df Use smoltcp revision from its master branch. 2021-12-09 12:15:32 +01:00
Matous Hybl
9d62e886fb Do not use exported Result to mitigate problems with clap. 2021-12-08 22:19:13 +01:00
Dario Nieuwenhuis
00a87b9a41 Fix build examples with defmt. 2021-12-06 21:58:57 +01:00
Matous Hybl
a802fd83aa Fix embassy-net documentation of running examples. 2021-12-06 14:59:15 +01:00
Ulf Lilleengen
9a730ef692 Refactor sx127x radio to use async SPI with DMA 2021-12-03 09:53:28 +01:00
Ulf Lilleengen
b9693c0b91 Update rust-lorawan to version supporting defmt 0.3 2021-12-02 19:10:29 +01:00
huntc
469852c667 Removed unsafe from uarte
The constructors themselves are not strictly unsafe. Interactions with DMA can be generally unsafe if a future is dropped, but that's a separate issue. It is important that we use the `unsafe` keyword diligently as it can lead to confusion otherwise.
2021-12-01 09:14:24 +11:00
Dario Nieuwenhuis
3332c40705 examples: remove unused deps. 2021-11-29 02:07:48 +01:00
Dario Nieuwenhuis
e40555e245 examples/stm32g4: add pwm example 2021-11-27 03:06:46 +01:00
Dario Nieuwenhuis
88d4b0c00d stm32: add stm32g4 support. 2021-11-27 02:34:23 +01:00
bors[bot]
c7d9729028
Merge #486
486: Pwm ppi events r=Dirbaio a=jacobrosenthal

More PWM yak shaving. I was going to do some safe pwm ppi events stuff but I just dont think it fits this api design.. ppi is just very low level, im not sure how safe it will be in general

* first we should probably have borrows of handlers for ppi with lifetime of the peripheral?  hal does eb4ba6ae42/nrf-hal-common/src/pwm.rs (L714-L716)
* in general having access to tasks can put the state in some configuration the api doesnt understand anymore. for `SequencePwm` ideally id hand you back either only seq_start0 or seq_start1 because youd only use one based on if your `Times` is even or odd.. but again we only know that with this api AFTER start has been called. I dont think were ready for typestates

SO I figured why not add the pwm ppi events but make them unsafe and commit this example since I started it.

Somewhat related drop IS removing the last duty cycle from the pin correctly, but stop DOES NOT..the only thing that sets the pin back is pin.conf() as far as I can tell, so I tried to document that better and got rid of stop for the `SimplePwm` again since that doesnt need it then. However its ackward we dont have a way to unset the pwm without setting a new sequence of 0s, or dropping the peripheral


Co-authored-by: Jacob Rosenthal <jacobrosenthal@gmail.com>
2021-11-26 23:08:24 +00:00