ea4d08b6cf
stm32-metapac-gen: Use serde_json to parse json files
2022-11-01 14:52:43 -05:00
6718ca3a94
all Cargo.toml: Add license to all crate Cargo.toml files
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Closes: https://github.com/embassy-rs/embassy/issues/1002
2022-10-07 12:41:56 +02:00
a855889f70
Update stm32-data
2022-06-27 02:10:01 +02:00
88e36a70bd
Update to 2021 edition. ( #820 )
2022-06-18 02:15:48 +02:00
a8703b7598
Run rustfmt.
2022-06-12 22:22:31 +02:00
0aa73f58e2
Update stm32-metapac.
2022-06-07 00:28:26 +02:00
da61611f8f
Add bootloader to CI
2022-04-27 15:17:18 +02:00
009bb8e4e1
stm32: add stm32u5 GPDMA, SPIv4 support, add HIL tests.
2022-04-27 01:16:14 +02:00
75e5b39799
Merge #668
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668: Update chiptool. r=Dirbaio a=Dirbaio
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net >
2022-03-15 22:19:59 +00:00
3528f42868
Update chiptool.
2022-03-15 23:19:17 +01:00
cfa7f4e55b
Remove duplicate stm32-metapac/src/common.rs with chiptool
2022-03-15 04:17:55 -04:00
451bb48464
stm32-metapac: remove all macrotables, deduplicate metadata files.
2022-02-26 03:23:09 +01:00
93a3323ed9
stm32-metapac: remove peripehral_pins! macrotable.
2022-02-23 20:22:16 +01:00
f14cacbf93
stm32-metapac: change af from string to u8
2022-02-23 19:54:46 +01:00
2c8fee59d6
stm32-metapac: remove peripehral_dma_channels! macrotable.
2022-02-23 19:16:37 +01:00
8160af6af9
stm32: replace peripheral_rcc! macrotable with build.rs
2022-02-09 00:58:17 +01:00
4d73d87b40
stm32-metapac: add option to generate chip metadata as a rust const.
2022-02-09 00:28:05 +01:00
8ef5b404f1
Update stm32-data
2022-02-07 23:13:44 +01:00
aaf25bbac3
Update stm32-data
2022-02-07 20:40:35 +01:00
de19fe5c05
Update stm32-data, update build scripts for new schema.
2022-02-07 02:23:02 +01:00
b0fabfab5d
Update stm32-data: rcc regs info comes from yamls now.
2021-11-29 02:28:02 +01:00
78d109f5d5
stm32-metapac: add pac feature to allow building only the macrotables.
2021-11-24 01:04:23 +01:00
d06cb0a264
stm32-metapac-gen: use actually common common.rs instead of emitting it at every single chip file.
2021-11-24 00:42:14 +01:00
dfb6d407a1
stm32: rename core features from _cmX to -cmX, cleanup gen.
2021-11-23 23:49:06 +01:00
039621c56d
stm32-metapac-gen: fix broken build.rs
2021-11-22 02:38:01 +01:00
0db4da10f8
stm32-metapac-gen: separate data structs
2021-11-22 02:37:46 +01:00
f12b70535b
Adjust for STM32U5.
2021-11-02 12:05:24 -04:00
4fbac40120
Workaround duplicity of DMA channel declaration when the target chip specifies more than one request, by processing only the first declared request for the channel.
2021-10-22 11:36:47 +02:00
c79485c286
Support for STM32L1
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* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
14aa4265db
Ensure linear stride
2021-09-15 13:58:01 +02:00
701dd9fa36
Calculate port number based on address and stride
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This allows out of order letter to port mapping
2021-09-15 13:58:01 +02:00
840a83e196
Add support for chip definitions with a dash
2021-09-15 13:58:01 +02:00
f2623e7e9b
Update lots of deps
2021-09-11 01:35:23 +02:00
e2f71ffbbd
Add support for STM32G0
2021-08-20 00:15:11 +02:00
174c51f097
stm32/metapac: check GPIO RCC regs are always found.
2021-08-19 23:59:50 +02:00
dd62790f36
stm32-metapac: assume RCC is always present
2021-08-19 22:16:27 +02:00
4df63f5379
Add per-core EXTI support
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* Generate a core index put into the PAC for the peripherals to use as
index into registers.
* Add EXTI v2 which uses CORE_INDEX to index exti registers
2021-08-17 16:22:47 +02:00
f240edc579
Remove broken panic message
2021-08-04 12:51:24 +02:00
e21faaeb47
cargo fmt
2021-08-04 12:43:51 +02:00
b36337b3d2
Refactor bit search logic when no clock specified
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Always search for a enable bit, even when no clock is specified in the
yaml. Try to derive the clock name from the register name.
This change picked up USART2 for stm32wle which was missing the clock.
2021-08-04 12:42:35 +02:00
37536695e1
Refactor find_reg_for_field()
2021-08-04 11:22:54 +02:00
c985c031d4
Use a regex to match find enable and rst regs
2021-08-03 17:58:28 +02:00
4e47b15daf
Ignore the clock number for enable bit search
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The number has different meanings depending on family:
stm32f0: RCC_APB2ENR - APB peripheral clock enable register 2 CLOCK: APB1
stm32f4: RCC_APB2ENR - RCC APB2 peripheral clock enable register CLOCK: APB2
Ignore the clock number and search all registers for a matching enable bit.
2021-08-03 17:58:27 +02:00
fba8b86005
BTreeMaps to preserve ordering of generated code
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Makes diffing of changes easier
2021-08-03 17:58:26 +02:00
63b32b39e1
Use an em bikeshed instead of an underscore bikeshed.
2021-08-02 13:29:06 -04:00
5f9447abb4
Put the implicit memory.x behind a memory_x feature on embassy-stm32.
2021-08-02 13:21:30 -04:00
4da8ed471b
Fallback to total RAM or FLASH size if otherwise not present.
2021-08-02 11:23:55 -04:00
f6c5f039c8
Emit a default memory.x alongside device.x from metapac.
2021-08-02 11:23:55 -04:00
16d5294817
Get rid of some warnings
2021-07-29 18:48:43 -03:00
8d76c582f5
Update chiptool
2021-07-29 13:39:19 +02:00
