Commit Graph

4421 Commits

Author SHA1 Message Date
VasanthakumarV
c883eedb63 Update stm32-data with f3 Timer reg changes 2021-12-23 17:05:11 +05:30
bors[bot]
79cbad501c
Merge #551
551: nrf/gpio: add infallible inherent methods, remove some duplication. r=Dirbaio a=Dirbaio

Add infallible inherent methods, so that users don't have to import a trait, or `.unwrap()`.

This implements Input and Output using FlexPin, to avoid some code duplication.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-21 09:31:23 +00:00
Dario Nieuwenhuis
22bc1e4ae1 nrf/gpio: add infallible inherent methods, remove some duplication.
This implements Input and Output using FlexPin, to avoid some code duplication.
2021-12-20 00:55:18 +01:00
bors[bot]
fcb43caa36
Merge #550
550: Some API documentation fixes in traits r=Dirbaio a=lulf



Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2021-12-19 07:50:33 +00:00
Ulf Lilleengen
e1545066e5 Some API documentation fixes in traits 2021-12-19 08:49:19 +01:00
Ulf Lilleengen
3811c0a401 Add adapter for implementing async traits for blocking types
This allows writing drivers relying on async traits, while still
functioning with implementations that already implement the embedded-hal
traits.

Add examples to stm32l4 for using this feature.
2021-12-17 12:54:51 +01:00
bors[bot]
ad2f469407
Merge #548
548: Set Uarte log levels to trace r=lulf a=huntc

I noticed lots of logging which really slows things down and is not useful outside of a debugging context, hence set to trace.

Co-authored-by: huntc <huntchr@gmail.com>
2021-12-17 06:39:49 +00:00
huntc
3d8eecff89 Set Uarte log levels to trace
I noticed lots of logging which really slows things down and is not useful outside of a debugging context, hence set to trace.
2021-12-17 17:06:46 +11:00
Jacob Rosenthal
e7d2c52680 example cleanup 2021-12-16 15:20:56 -07:00
Jacob Rosenthal
1d51f91368 usb_uart_io example equivilent to usb_uart 2021-12-16 14:59:35 -07:00
Jacob Rosenthal
1f2bbe3e4a simplify usb_uart example 2021-12-16 14:59:08 -07:00
bors[bot]
23c16903db
Merge #546
546: Update rust-toolchain r=Dirbaio a=lulf



Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2021-12-16 10:39:01 +00:00
Ulf Lilleengen
2bbd1ddb8a Remove unneeded rustfmt::skip 2021-12-16 11:37:53 +01:00
Ulf Lilleengen
985c11fad5 Update rust-toolchain 2021-12-16 11:34:20 +01:00
bors[bot]
5df16c6793
Merge #544
544: Introduces split on the nRF Uarte r=Dirbaio a=huntc

A new `split` method is introduced such that the Uarte tx and rx can be used from separate tasks. An MPSC is used in an example to illustrate how data may be passed between these tasks.

The approach taken within the `Uarte` struct is to split into tx and rx fields on calling `Uarte::new`. These fields are returned given a call to `Uarte::split`, but otherwise, if that call isn't made, then the API remains as it was before.

Here's a snippet from a new example introduced:

```rust
#[embassy::main]
async fn main(spawner: Spawner, p: Peripherals) {
    // ...

    let uart = uarte::Uarte::new(p.UARTE0, irq, p.P0_08, p.P0_06, NoPin, NoPin, config);
    let (mut tx, rx) = uart.split();

    // ...

    // Spawn a task responsible purely for reading

    unwrap!(spawner.spawn(reader(rx, s)));

    // ...

    // Continue reading in this main task and write
    // back out the buffer we receive from the read
    // task.
    loop {
        if let Some(buf) = r.recv().await {
            info!("writing...");
            unwrap!(tx.write(&buf).await);
        }
    }
}

#[embassy::task]
async fn reader(mut rx: UarteRx<'static, UARTE0>, s: Sender<'static, Noop, [u8; 8], 1>) {
    let mut buf = [0; 8];
    loop {
        info!("reading...");
        unwrap!(rx.read(&mut buf).await);
        unwrap!(s.send(buf).await);
    }
}
```


Co-authored-by: huntc <huntchr@gmail.com>
2021-12-16 07:44:40 +00:00
bors[bot]
d5a3064c2c
Merge #540
540: Initial support for STM32F3 r=Dirbaio a=VasanthakumarV

The [companion PR](https://github.com/embassy-rs/stm32-data/pull/109) in `stm32-data` should be merged before this PR.
The examples were tested on an STM32F303VC MCU.

Co-authored-by: VasanthakumarV <vasanth260m12@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-16 07:30:03 +00:00
huntc
0642eec01e Properly initialise refcount 2021-12-16 18:15:28 +11:00
Dario Nieuwenhuis
1b3367e9a2 Update stm32-data. 2021-12-16 08:14:49 +01:00
bors[bot]
2d6111ed43
Merge #543
543: Incrementally merge STM32 SPI versions, Part 3 r=Dirbaio a=GrantM11235

Notable changes:
- `SPE` is now disabled before `TXDMAEN` and `RXDMAEN` are disabled. This is the "mandatory" sequence for v2 and v3 (and maybe v1 as well, but I can't find it in the reference manual).
- v1's `write_dma_u8` now waits for idle and disables `TXDMAEN` after the transfer is complete, just like everything else.

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2021-12-16 07:07:39 +00:00
huntc
bb03b5cc02 Too much copy/pasta
The tx permitted reads and the rx permitted writes!
2021-12-16 07:16:38 +11:00
huntc
2493699fb3 Ref count the peripheral drop 2021-12-16 07:09:33 +11:00
Jacob Rosenthal
5d19f87acb cleanup example 2021-12-15 12:30:48 -07:00
Jacob Rosenthal
cfb5e8df57 undo T:regs in impl UsbPeripheral 2021-12-15 11:00:55 -07:00
Jacob Rosenthal
50f151e6bc use Instance regs 2021-12-15 10:29:19 -07:00
Jacob Rosenthal
cd356896ee fix nrf52820 2021-12-15 10:27:10 -07:00
Jacob Rosenthal
61f12324ff enable USB peripheral for relevant chips 2021-12-15 10:23:19 -07:00
Jacob Rosenthal
1c0a3688a4 use forked nrf-usbd 2021-12-15 10:00:17 -07:00
Jacob Rosenthal
79502330de rename to UsbBus 2021-12-15 09:59:56 -07:00
huntc
1374ad2ab6 Introduces split on the nRF Uarte
A new `split` method is introduced such that the Uarte tx and rx can be used from separate tasks. An MPSC is used to illustrate how data may be passed between these tasks.
2021-12-15 18:31:52 +11:00
Jacob Rosenthal
2a6d92d641 cleanup 2021-12-14 16:53:13 -07:00
Jacob Rosenthal
5f0fefbd25 dont rely on nrf-usdb 2021-12-14 16:51:34 -07:00
Jacob Rosenthal
3debe604fb sorta works, too many interupts? 2021-12-14 16:48:48 -07:00
Grant Miller
6597e67036 Add finish_dma function 2021-12-14 17:46:25 -06:00
Grant Miller
a13a7a6616 Replace wait_for_idle with spin_until_idle 2021-12-14 17:46:25 -06:00
Jacob Rosenthal
07cbd41131 dont expose embedded_hal_common::usb 2021-12-14 15:47:54 -07:00
Grant Miller
e75cb1a564 Regs type alias 2021-12-14 15:39:00 -06:00
Grant Miller
b06658c195 Refactor new 2021-12-14 15:39:00 -06:00
Jacob Rosenthal
f31140a70b revert 2021-12-14 13:51:50 -07:00
bors[bot]
1a7b9e3279
Merge #542
542: nrf/gpiote: remove PortInput, move impls to Input/FlexPin. r=Dirbaio a=Dirbaio

`PortInput` is just a dumb wrapper around `Input`, it has no reason whatsoever to exist. This PR moves the `wait_for_x` functionality to `Input` directly.

It also adds it to `FlexPin` for completeness and consistency with `Input`.

(The reason `PortInput` exists is a while ago `GPIOTE` was an owned singleton that you had to initialize, so `PortInput::new()` would require it to enforce it's been initialized. This doesn't apply anymore now that GPIOTE is "global")

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-14 14:09:59 +00:00
Dario Nieuwenhuis
153b1bbdbf nrf/gpiote: remove PortInput, move impls to Input. 2021-12-14 13:23:40 +01:00
Jacob Rosenthal
535d30335a make send, consolidate usb types 2021-12-13 18:13:42 -07:00
Jacob Rosenthal
83a1237ea3 stub out the embassy registers for usbd 2021-12-13 18:04:54 -07:00
VasanthakumarV
78c5d65ca9 [lint] Add newline in pwr file 2021-12-13 18:16:58 +05:30
VasanthakumarV
2c50ab1ebf [ci] Add STM32F3 examples to CI shell 2021-12-13 18:13:23 +05:30
Dario Nieuwenhuis
3f3b7d066e
Merge pull request #541 from lulf/docs-readme
Some notes in the readme about docs
2021-12-13 13:25:26 +01:00
Ulf Lilleengen
91e0c6df73 Some notes in the readme about docs 2021-12-13 13:23:18 +01:00
VasanthakumarV
a65c2bc2b4 [examples] Add examples for STM32F3 2021-12-13 14:50:13 +05:30
VasanthakumarV
3f33d307ff [feature] Add rcc register support for F3 2021-12-13 14:50:13 +05:30
VasanthakumarV
e2c074d133 [feature] Add pwr register support for F3 2021-12-13 13:49:41 +05:30
VasanthakumarV
7733d11f90 [generate] Add stm32f3 chips to the Cargo manifest 2021-12-13 13:49:41 +05:30