Commit Graph

3438 Commits

Author SHA1 Message Date
Christian Perez Llamas
17857bc18f Minor changes 2022-11-13 02:12:58 +01:00
Henrik Alsér
dca11095e2 Disable UARTE in embassy-nrf::init 2022-11-13 01:49:55 +01:00
Christian Perez Llamas
d2e8794f29 Investigating discontinuities in the signal 2022-11-13 01:41:32 +01:00
Christian Perez Llamas
122a31d208 Interrupts, async, sine oscillator 2022-11-12 18:48:57 +01:00
Sijmen Woutersen
e70ae71ecc restore SIGNAL_WORK_THREAD_MODE 2022-11-12 10:58:37 +01:00
Roman Valls Guimera
10e3c3f2ec Cargo fmt 2022-11-11 23:49:20 +01:00
bors[bot]
d05979c708
Merge #1052 #1053
1052: stm32: Fix watchdog division by zero for 256 prescaler, add watchdog … r=lulf a=matoushybl

…example for H7

The problem is that `2u8.powi(8) == 0`, which causes division by zero.

1053: Disable MMC interrupts r=lulf a=matoushybl

MMC interrupts can cause firmware hangup - refer to: https://github.com/stm32-rs/stm32h7xx-hal/issues/275 for more information

Fixes #594 

Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
2022-11-11 08:04:16 +00:00
Christian Perez Llamas
4a2e810485 Restrict to pacs supporting i2s 2022-11-10 23:13:01 +01:00
Sijmen Woutersen
6e1120e17e riscv support 2022-11-10 17:39:41 +01:00
Matous Hybl
99682d313b Disable MMC interrupts
MMC interrupts can cause firmware hangup - refer to: https://github.com/stm32-rs/stm32h7xx-hal/issues/275 for more information
2022-11-10 17:21:42 +01:00
Matous Hybl
cbc97758e3 stm32: Fix watchdog division by zero for 256 prescaler, add watchdog example for H7 2022-11-10 15:56:28 +01:00
Dion Dokter
dbe97b4098 Adapted nvmc so it can be used for all nrf targets 2022-11-10 14:37:42 +01:00
Christian Perez Llamas
f22f36f51b Add input rx 2022-11-10 00:24:49 +01:00
Christian Perez Llamas
5a64bf651c Buffer trait. Simpler config. 2022-11-10 00:10:42 +01:00
Christian Perez Llamas
356beabc3b Apply config 2022-11-09 23:08:09 +01:00
Roman Valls Guimera
3760b60db3 Make bors grin ;) 2022-11-09 22:31:19 +01:00
Christian Perez Llamas
cecd77938c Draft: Initial support for I2S with a working example.
Co-authored-by: @brainstorm <brainstorm@nopcode.org>
2022-11-09 19:19:01 +01:00
bors[bot]
059610a8de
Merge #1047
1047: Ensure embassy-lora stm32wl supports log crate r=lulf a=lulf



Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2022-11-09 09:57:36 +00:00
Ulf Lilleengen
a3a58e8e4a
Special handling for log and defmt 2022-11-09 10:04:37 +01:00
Ulf Lilleengen
bd5ef80bec
Ensure embassy-lora stm32wl supports log crate 2022-11-07 20:51:29 +01:00
bors[bot]
c53614f057
Merge #1046
1046: embassy-stm32: Fix bug when Uart::read future is dropped and DMA request was not stopped r=lulf a=guillaume-michel

fixes #1045 

regression was introduced with PR #1031

Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
2022-11-07 17:48:04 +00:00
Guillaume MICHEL
1365ce6ab8 embassy-stm32: Fix bug when Uart::read future is dropped and DMA request was not stopped
fixes issue #1045

regression was introduced with PR #1031
2022-11-07 17:46:32 +01:00
Matt Johnston
14a2d15240 Derive Default for WakerRegistration
This simplifies creating arrays of WakerRegistrations
2022-11-06 11:33:38 +08:00
Henrik Alsér
af34fc4ccc rustfmt 2022-11-05 01:40:20 +01:00
Henrik Alsér
aecfce1159 rustfmt 2022-11-05 01:36:29 +01:00
Henrik Alsér
207fa19551 Acquire semaphore on blocking 2022-11-05 01:34:52 +01:00
Henrik Alsér
7da18e194a Add status checks 2022-11-05 01:12:25 +01:00
Henrik Alsér
a3e8a6bc3a rustfmt 2022-11-05 00:19:52 +01:00
Henrik Alsér
1920e90dcd embassy-nrf: Add SPIS module 2022-11-05 00:15:43 +01:00
bors[bot]
b99533607c
Merge #1039
1039: stm32-metapac-gen: Use `serde_json` to parse json files r=Dirbaio a=GrantM11235

This makes stm32-metapac-gen over twice as fast. A full run on my desktop goes from about six and a half seconds to about three seconds. Suprisingly, it also reduces the fresh compile time by almost a second.

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2022-11-01 20:58:17 +00:00
Grant Miller
ea4d08b6cf stm32-metapac-gen: Use serde_json to parse json files 2022-11-01 14:52:43 -05:00
bors[bot]
05968bf0f3
Merge #1037
1037: Add uart async task example r=miathedev a=miathedev

Dear Embassy Team,

here i propose an additional async uart pass-through example for the STM32WL.


Because im quite new to Rust, is there something like **interfaces**?

The code: 
```
mut usart1: Uart<
    'static,
    embassy_stm32::peripherals::USART1,
    embassy_stm32::peripherals::DMA1_CH3,
    embassy_stm32::peripherals::DMA1_CH4,
>,
mut usart2: Uart<
    'static,
    embassy_stm32::peripherals::LPUART1,
    embassy_stm32::peripherals::DMA1_CH5,
    embassy_stm32::peripherals::DMA1_CH6,
>,
```
is quite ugly in my opinion. I would like to allow any Type of DMA and USART/UART as argument. Is this possible somehow?
Im open to any feedback.

With love,
Mia

Co-authored-by: miathedev <mia@metzler.systems>
2022-11-01 08:48:54 +00:00
miathedev
fc086fd4ba Add uart async example 2022-11-01 10:38:02 +01:00
bors[bot]
ea702b3719
Merge #1038
1038: (embassy-boot): Move default initializer function to Default trait implementation r=lulf a=MathiasKoch



Co-authored-by: Mathias <mk@blackbird.online>
2022-11-01 08:05:37 +00:00
Mathias
97d18c5ffb Move default initializer function to Default trait implementation 2022-11-01 07:54:43 +01:00
bors[bot]
eed34f945c
Merge #1036
1036: Fix ascii table in BootLoader doc comment r=lulf a=danbev

Signed-off-by: Daniel Bevenius <daniel.bevenius@gmail.com>

Co-authored-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2022-10-29 13:28:54 +00:00
Daniel Bevenius
0b2d6996e8
Fix ascii table in BootLoader doc comment
Signed-off-by: Daniel Bevenius <daniel.bevenius@gmail.com>
2022-10-29 15:16:09 +02:00
bors[bot]
e7fdd500d8
Merge #951
951: (embassy-rp): Implementation of generic flash mutation access r=Dirbaio a=MathiasKoch

I have attempted to utilize the work done in `rp2040-flash` by implementing `embedded-storage` traits on top, for RP2040.

Concerns:
1. ~~Should the DMA be paused where I have put a FIXME note? `DMA_CHx.ctrl_trig().write(|w| { w.set_en(false) })`? If so, how to properly do that without have control over the peripheral for the DMA channels? And if so, I assume we should only re-enable/unpause the ones that were enabled before?~~
2. ~~Should I make sure core2 is halted as part of this code? I am not sure if ea8ab1ac80/examples/flash_example.rs (L103-L109) is heavy/slow code to run?~~
3. ~~Any good way of making this configurable over `FLASH_SIZE`, `WRITE_SIZE` and `ERASE_SIZE` without doing it as generics or parameters, as those make it possible to do differing configs throughout the same program, which feels wrong? Preferably, a compile-time option?~~


**EDIT:**
I have implemented the flash API here under the assumption that all external QSPI nor flashes are infact `Multiwrite` capable, as this makes it possible to use the ROM function for writes of 1 bytes at a time.

I have also added a HIL test for this, but because HIL tests are running 100% from RAM and I wanted to make sure it still works when running from flash, I have also added an example testing erase/write cycles of entire sectors, as well as single bytes in multi-write style.

Ping `@Dirbaio` 

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: Vincent Stakenburg <v.stakenburg@sinewave.nl>
Co-authored-by: Joakim Hulthe <joakim@hulthe.net>
Co-authored-by: Alex Martens <alex@thinglab.org>
Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-10-28 12:19:56 +00:00
bors[bot]
1f246d0e37
Merge #1034
1034: stm32/usart: Fix bug where USART idle flag could end a `read` prematuraly r=Dirbaio a=guillaume-michel

on STM32, when setting USART `detect_previous_overrun = true`, the idle flag is not cleared and could result in premature end of the `read` method.

This PR fixes that.

Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
2022-10-28 11:22:53 +00:00
bors[bot]
a7d5c87049
Merge #1033
1033: stm32/usart: Add missing constructor with hardware flow control r=Dirbaio a=guillaume-michel

This PR follows #1031 and #987 and add missing constructors with hardware flow control.

It also factor general UART configuration like word size, parity, ... used in `Uart`, `UartRx`, `UartTx` and `BufferedUart`.

Co-authored-by: Guillaume MICHEL <guillaume@squaremind.io>
2022-10-28 11:13:11 +00:00
Guillaume MICHEL
49e1091309 embassy-stm32: Fix bug where USART idle flag could end a read prematuraly 2022-10-28 10:49:59 +02:00
Guillaume MICHEL
79b49c6fae embassy-stm32: remove duplicated code for USART general configuration 2022-10-28 09:32:05 +02:00
Guillaume MICHEL
f053bf742c embassy-stm32: Add support for hardware flow control for BufferedUart 2022-10-28 09:04:36 +02:00
Guillaume MICHEL
9423987ac5 embassy-stm32: Add hardware flow control constructor for UartRx and UartTx 2022-10-28 09:04:36 +02:00
Mathias
bc21b6efaf Add delay to flash test to allow time to parse RTT header 2022-10-27 12:49:20 +02:00
Mathias
a7b90c7fb6 Remove unused imports from test 2022-10-27 11:36:46 +02:00
bors[bot]
4e61d83555
Merge #1032
1032: stm32/adc: Misc refactoring r=Dirbaio a=GrantM11235

Noteworthy changes:

- Fixed a few typos in the `SampleTime`s
- `set_resolution` now writes directly to the configuration register. This also fixed a bug in v3 where the resolution was changed while `ADEN` is enabled, which the datasheet says isn't allowed.

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2022-10-27 08:45:12 +00:00
Mathias
c871fe0848 Rebase on master 2022-10-27 07:12:34 +02:00
Mathias
3c6c382465 Remove random delay from example, and move flash functions to allow using without embedded-storage in scope 2022-10-27 07:10:35 +02:00
Grant Miller
171b764d82 Refactor: Use PeripheralRef 2022-10-26 18:36:04 -05:00