Commit Graph

722 Commits

Author SHA1 Message Date
Ralf
f4677469f9 stm32/usart: Data length is including parity. To get e.g. 8E1 you need to choose 9 data bits 2022-05-12 09:09:30 +02:00
Matous Hybl
01fb447e9d Allow maximal clock for F7 HCLK 2022-05-08 23:07:28 +02:00
bors[bot]
e9ab960ebf
Merge #760
760: stm32/gpio: Add support for `set_speed` for gpio v1 r=Dirbaio a=GrantM11235



Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2022-05-08 19:53:31 +00:00
Grant Miller
acc1761637 Remove unnecessary cfg 2022-05-08 14:50:15 -05:00
Grant Miller
b230ac9c1a stm32/gpio: Add support for set_speed for gpio v1 2022-05-08 14:43:37 -05:00
Dario Nieuwenhuis
96d0eb9476 stm32: Fix stm32f107 build. 2022-05-08 21:37:37 +02:00
bors[bot]
a4bf190f2f
Merge #752
752: Replace embassy::io with embedded_io. r=Dirbaio a=Dirbaio

TODO:

- [x] Release embedded-io on crates.io
- [x] Remove git dep

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-05-06 23:54:07 +00:00
Dario Nieuwenhuis
931a137f8c Replace embassy::io with embedded_io. 2022-05-07 01:45:54 +02:00
Matous Hybl
118532278c Add H7 flash and bootloader support 2022-05-06 21:57:15 +02:00
Matous Hybl
6d56f772e1 Add F7 flash and bootloader support 2022-05-06 21:57:15 +02:00
Matous Hybl
f3700b4e42 Refactor flash handling to different modules for different families 2022-05-06 21:57:15 +02:00
Matous Hybl
4f5088d79d Add support for F3 flash 2022-05-06 21:57:15 +02:00
Dario Nieuwenhuis
fc32b3750c Remove embassy_hal_common::usb.
The replacement is `embassy-usb`. There's a WIP driver for stm32 USBD in #709,
there's no WIP driver for stm32 USB_OTG. This means we're left without
USB_OTG support for now.

Reason for removing is I'm going to soon remove `embassy::io`, and
USB uses it. I don't want to spend time maintaining "dead" code
that is going to be removed. Volunteers welcome, either to update
old USB to the new IO, or write a USB_OTG driver fo the new USB.
2022-05-04 01:41:37 +02:00
Dario Nieuwenhuis
49ae26f384
Merge pull request #748 from embassy-rs/nrf-i2c-timeout
Misc HAL improvements.
2022-05-03 01:25:05 +02:00
Dario Nieuwenhuis
71e46d7efd stm32/gpio: add EH1.0 trait impls. 2022-05-03 00:52:48 +02:00
bors[bot]
6e129cf34f
Merge #747
747: stm32/adc/v4: Fix log statement r=Dirbaio a=GrantM11235



Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2022-05-02 20:18:01 +00:00
Grant Miller
4bccd77849 stm32/adc/v4: Fix log statement 2022-05-02 15:14:49 -05:00
Dario Nieuwenhuis
a5f5c3a844 net: add functions to get current Eth and IP config 2022-05-02 16:19:34 +02:00
bors[bot]
d600f39260
Merge #743
743: Add PLL config support for F2 r=Dirbaio a=Gekkio

- minor changes to make the F2 RCC API a bit more flexible
- low-level PLL config with assertions based on datasheet specs. It shouldn't be very difficult to later add a "reverse API" where you pass the clocks you want to a function and it generates a `PLLConfig` struct for you
- PLL API tested on my custom board with 12 MHz HSE as source for PLL to generate max clocks for SYSCLK/AHB/APB/APB1/PLL48
- the example *should* work but is untested since I don't have the Nucleo board 😞 

Co-authored-by: Joonas Javanainen <joonas.javanainen@gmail.com>
2022-04-30 21:08:43 +00:00
Joonas Javanainen
e88559c5ca
Use defmt-friendly error handling 2022-04-30 11:41:17 +03:00
Dario Nieuwenhuis
804b20c5af stm32/eth: make "ethmac" vs "eth" consistent in RCC regs. 2022-04-30 04:49:57 +02:00
David Lenfesty
5e6c4ae024 embassy-stm32/eth: consolidate v1a/v1c and add v1b
The only differences between v1a and v1c were clocks and GPIO, v1b will
likely work out of the box (or simply need minor tweaks)
2022-04-30 04:49:24 +02:00
David Lenfesty
2e7b42fc5b embassy-stm32/eth: convert LAN8742 driver to generic SMI driver
SMI Ethernet PHYs all share a common base set of registers that can do
90% of all tasks. The LAN8742 driver used some vendor-specific
registers to check link negotiation status, but the need for that was
debatable, so I migrated it to a generic driver instead, anybody who
wants extra functionality can copy it and impl their own on top of it.
2022-04-30 04:49:24 +02:00
David Lenfesty
905b40e212 embassy-stm32/eth/v1a: configure pins correctly for f107
v1a works correctly!
2022-04-30 04:49:24 +02:00
David Lenfesty
0d2ef1099b initial work porting eth to f107 2022-04-30 04:49:24 +02:00
David Lenfesty
f30e5d2d3f Initial import to v1a, does not compile 2022-04-30 04:49:24 +02:00
Joonas Javanainen
07ad52162b
Add PLL config support for F2 2022-04-29 18:21:40 +03:00
Joonas Javanainen
0cfe1dc9df
Move HSE config out of main clock mux
This makes the configuration more flexible and closer to the underlying
configuration register structure. For example, we could use HSI for the
system clock, but use HSE to output a clock with MCO.
2022-04-29 17:51:18 +03:00
Matous Hybl
7538f57d62 Remove unnecessary feature gating for giant transfers in DCMI 2022-04-27 16:53:20 +02:00
Ulf Lilleengen
da61611f8f Add bootloader to CI 2022-04-27 15:17:18 +02:00
Ulf Lilleengen
484e0acc63 Add stm32 flash + bootloader support
* Add flash drivers for L0, L1, L4, WB and WL. Not tested for WB, but
should be similar to WL.
* Add embassy-boot-stm32 for bootloading on STM32.
* Add flash examples and bootloader examples
* Update stm32-data
2022-04-27 15:17:18 +02:00
Dario Nieuwenhuis
009bb8e4e1 stm32: add stm32u5 GPDMA, SPIv4 support, add HIL tests. 2022-04-27 01:16:14 +02:00
Matous Hybl
945fa0871f Implement giant (chunked) DMA transfers for DCMI. 2022-04-25 14:30:43 +02:00
Dario Nieuwenhuis
3251a21fb7 Switch to crates.io embedded-hal, embedded-hal-async.
This temporarily removes support for the async UART trait, since it's
not yet in embedded-hal-async.
2022-04-22 19:58:24 +02:00
Dario Nieuwenhuis
e5a843dc06 net: auto-enable defmt in smoltcp using namespaced features. 2022-04-13 17:46:27 +02:00
bors[bot]
6d0e6d563d
Merge #714
714: add more clock options for l4 and l5 r=Dirbaio a=ant32

- added an assert so it panics if pll48div is not 48Mhz
- added MSI as a clock source for PLL
- removed hsi48 option for MCUs mentioned in l4 rcc presentation
- copied some code from l4 to l5, but don't have a way of testing it.

Co-authored-by: Philip A Reimer <antreimer@gmail.com>
2022-04-12 21:42:36 +00:00
bors[bot]
77c2b151c2
Merge #715
715: stm32/dac: Check proper channel r=Dirbaio a=michalsrb

Small fix. Otherwise it panics when trying to use channel 1 if channel 2 does not exist.

Co-authored-by: Michal Srb <michalsrb@gmail.com>
2022-04-12 20:57:36 +00:00
Matous Hybl
371f3ef419 Add ADC support for H7 2022-04-12 22:25:00 +02:00
Michal Srb
c1914a477d stm32/dac: Check proper channel 2022-04-12 12:49:06 +02:00
Philip A Reimer
d90ecbbe40 add more clock options for l4 and l5 2022-04-11 19:11:02 -06:00
Philip A Reimer
d8860c0b80 add stm32l4 hsi48 and usb example 2022-04-09 14:55:03 -06:00
Dario Nieuwenhuis
8b757e1aec Add stm32wlexx support 2022-04-08 03:43:58 +02:00
Dario Nieuwenhuis
0c07d03754 Add missing stm32wl/stm32wb chips except stm32wle 2022-04-08 03:15:27 +02:00
Dario Nieuwenhuis
50ff63ab88 Add STM32L5 support. 2022-04-08 03:11:38 +02:00
Matous Hybl
eb6910fa86 Reexport unborrow macro in HALs 2022-04-07 12:57:02 +02:00
Dario Nieuwenhuis
aee19185b7 Add more docserver metadata. 2022-04-05 21:05:09 +02:00
Philip A Reimer
1f59f8e7d0 add pllsai1 and allow for 120Mhz clock on stm32l4+ 2022-04-01 22:42:43 -06:00
chemicstry
d052631118 Fix STM32 timer interrupt bug 2022-03-30 00:27:33 +03:00
Joonas Javanainen
83211c2b61
Add workaround for F2 errata 2022-03-27 19:00:36 +03:00
Joonas Javanainen
a608d0deaf
Add minimal STM32F2 RCC
No support for PLL or other clocks than SYSCLK/AHB/APB1/APB2
2022-03-27 18:40:49 +03:00