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109 Commits

Author SHA1 Message Date
Dario Nieuwenhuis
f96db3d9d2 Remove ad-hoc imports from generated code. 2021-05-21 19:29:37 +02:00
Dario Nieuwenhuis
0d08e65235 Regen 2021-05-21 19:05:21 +02:00
Ulf Lilleengen
03bfbe51f5 Create DMA fn to select peripheral based on channel number 2021-05-21 18:38:33 +02:00
Ulf Lilleengen
32fbb32a84 Move exti setup into pac module 2021-05-21 18:38:33 +02:00
Ulf Lilleengen
a95c78b8bd Merge exti macros into one and use simpler recursion 2021-05-21 18:38:33 +02:00
Ulf Lilleengen
56a902c19f Update submodule commit 2021-05-21 18:38:33 +02:00
Ulf Lilleengen
b5373a1a64 Allow generating pac for STM32L0 2021-05-21 18:38:33 +02:00
Ulf Lilleengen
9fa5a2920f Move regs trait implementation into generated pac 
This allows handling devices that don't have DMA2
 2021-05-21 18:38:33 +02:00
Ulf Lilleengen
0cd3236fa3 Generate exti interrupt handlers 
Match interrupts starting with ^EXTI and generate init code and irq
handler for them
 2021-05-21 18:38:33 +02:00
Ulf Lilleengen
8172db6d8e Match on RNG interrupt names to support other RNG peripherals 2021-05-21 18:38:33 +02:00
Dario Nieuwenhuis
2e6c550355
Merge pull request #197 from rukai/fix_stm32_warnings 
Fix warnings for embassy-stm32 and embassy-stm32-examples and add .cargo/config.toml + memory.x
 2021-05-21 17:25:59 +02:00
Dario Nieuwenhuis
0bc440233c
Merge pull request #184 from bobmcwhirter/spi_v3 
Spi v3
 2021-05-21 17:21:36 +02:00
Bob McWhirter
b3eda9914b Use the correct register names. 2021-05-20 14:24:40 -04:00
Bob McWhirter
222faccbab Formatting. 2021-05-20 14:19:43 -04:00
Bob McWhirter
8b36269d65 Use modify instead of write for regs within a driver. 2021-05-20 14:14:31 -04:00
Bob McWhirter
d890ef98c1 Make SPIv3 work and improve v1 and v2. 2021-05-20 14:13:45 -04:00
Lucas Kent
82f9242df2 Fix warnings for embassy-stm32 and embassy-stm32-examples 2021-05-20 22:25:12 +10:00
Dario Nieuwenhuis
105c8504b6 Mark Unborrow as unsafe to implement 2021-05-19 23:29:33 +02:00
Bob McWhirter
0d1a0934c4 Cargo fmt. 2021-05-17 13:58:49 -04:00
Bob McWhirter
1872824d56 Add SPI v3, fix up v2's af_num and remove extraneous Error enums. 2021-05-17 13:56:13 -04:00
Bob McWhirter
a4fd1282e9 Generate _spi_v3 items. 2021-05-17 11:34:36 -04:00
Dario Nieuwenhuis
f7858631d8 stm32: fix build, add ci 2021-05-17 03:16:58 +02:00
Dario Nieuwenhuis
cd0d3c4b0d Merge branch 'stm32-neo' 2021-05-17 02:16:17 +02:00
Dario Nieuwenhuis
2303364322 Standardize module structure, fix some build failures 2021-05-17 02:04:51 +02:00
Dario Nieuwenhuis
bdc3ada4b2 WIP: dma 2021-05-17 01:08:30 +02:00
Dario Nieuwenhuis
befc052cba stm32/usart_v1: add read 2021-05-17 01:04:51 +02:00
Dario Nieuwenhuis
852ca5a1c5 stm32/usart_v1: implement tx 2021-05-17 01:04:51 +02:00
Dario Nieuwenhuis
bfc7f52e6d Remove stm32. 
stm32 developemnt continues in the `stm32-neo` branch for now.
 2021-05-17 00:57:32 +02:00
Thales Fragoso
0f5ba6d4a9 SDMMC: Implement Default for Config and add docs 2021-05-15 21:21:06 -03:00
Thales Fragoso
86063ac2a2 Update generated code 2021-05-14 23:53:12 -03:00
Thales Fragoso
1e5f25aa41 Move parameters to a config struct 2021-05-14 23:47:58 -03:00
Thales Fragoso
a5d473be0e Fix RNG interrupt name 2021-05-14 23:47:56 -03:00
Thales Fragoso
2cb66d6032 Update generated code 2021-05-14 23:44:51 -03:00
Thales Fragoso
ad720f83df Expose data transfer timeout and implement configuration for BusWidth one 2021-05-14 23:43:11 -03:00
Thales Fragoso
359aaa5aeb Implement embedded-sdmmc traits 2021-05-14 23:43:09 -03:00
Thales Fragoso
a130499c9a Get rid of some warnings 2021-05-14 23:42:12 -03:00
Thales Fragoso
c183c352c7 SDMMC: Implement read and write 2021-05-14 23:42:12 -03:00
Thales Fragoso
490152d028 Better interrupt handling 2021-05-14 23:42:09 -03:00
Thales Fragoso
72fb3a7520 Init working :) 2021-05-14 23:40:28 -03:00
Thales Fragoso
0b607ca80a Initial H7 sdmmc support 2021-05-14 23:40:28 -03:00
Dario Nieuwenhuis
180ca48d34 Remove AF_NUM const from pin traits, only use af_num fn 2021-05-15 03:18:15 +02:00
Dario Nieuwenhuis
e63c4bde0b stm32: remove psel_bits 2021-05-15 03:07:59 +02:00
Dario Nieuwenhuis
8bb1bc3507 Move pin configuration to gpio mod 2021-05-15 03:07:59 +02:00
Bob McWhirter
2569d38ab4 Adjust pin-names to FooPin. 
Move common bits up to spi/mod.rs.
Isolate the RNG interrupt in a sub-module to avoid conflict with the const.
 2021-05-14 10:11:43 -04:00
Bob McWhirter
9e93a0999f Add SPIv1, use cfg_attr to pick correct impl. 
Add IRQ to impl_rng!() to accomodate RNG vs HASH_RNG split.
 2021-05-13 14:28:53 -04:00
Ulf Lilleengen
3b86e85770 Bump version of critical-section to 0.2.1 2021-05-13 18:17:50 +02:00
Bob McWhirter
07db3ed7c1 Further improvement to SPIv2. 2021-05-12 14:18:42 -04:00
Bob McWhirter
36c16dbef8 Continuing to update clocks (unused now) and SPI 2021-05-12 10:46:18 -04:00
Bob McWhirter
7d52e1b350 Further work on SPI v2 blocking. 2021-05-11 11:25:01 -04:00
Dario Nieuwenhuis
e0809ab0fb Switch to use PrioritX enums. 2021-05-11 01:34:24 +02:00