Commit Graph

1866 Commits

Author SHA1 Message Date
bors[bot]
f9a1c1fb51
Merge #559
559: USART DMA example for the STM32F7 r=Dirbaio a=olofwalker

This small PR adds the USART DMA write an example for the STM32F7. The example has been tested on a Nucleo-f767zi board.

Output from `DEFMT_LOG=info cargo run --bin usart_dma`
```
Running `probe-run --chip STM32F767ZITx target/thumbv7em-none-eabihf/debug/usart_dma`
(HOST) INFO  flashing program (108 pages / 108.00 KiB)
(HOST) INFO  success!
────────────────────────────────────────────────────────────────────────────────
0 INFO  Hello World!
└─ usart_dma::__cortex_m_rt_main @ src/bin/usart_dma.rs:39
1 INFO  wrote DMA
└─ usart_dma::main_task::task::{generator#0} @ src/bin/usart_dma.rs:31
```

Co-authored-by: Robert Walker <rgit@walker.st>
2022-01-01 11:18:17 +00:00
bors[bot]
c20ef419a6
Merge #558
558: Port buffered uart to v1 stm32 hardware r=Dirbaio a=DCNick3

#526 seems to suggest that it will be rewritten for DMA support, but I am not sure how to implement it and the port was quite straightforward, so here it is. It might be immediately useful before DMA version will be implemented

Note that I have not tested this on v2 hardware

Co-authored-by: Nikita Strygin <nikita6@bk.ru>
2022-01-01 10:51:14 +00:00
bors[bot]
2f637b7be2
Merge #561
561: stm32/dac: Fix disable_channel r=Dirbaio a=bgamari

Previously disable_channel enabled rather than disabled the requested
channel due to an apparent copy-paste error. Refactor to eliminate this
sort of issue by construction.

Co-authored-by: Ben Gamari <ben@smart-cactus.org>
2022-01-01 10:29:47 +00:00
Dario Nieuwenhuis
ecb09b7313
Merge pull request #562 from tafia/patch-1
Update stm32.adoc
2021-12-30 07:58:26 +01:00
Johann Tuffe
5d86228077
Update stm32.adoc
typo
2021-12-30 09:17:06 +08:00
Robert Walker
1028b5c671 Review changes 2021-12-29 08:17:51 +01:00
Ben Gamari
8da6471a50 stm32/dac: Fix disable_channel
Previously disable_channel enabled rather than disabled the requested
channel due to an apparent copy-paste error. Refactor to eliminate this
sort of issue by construction.
2021-12-28 23:27:59 -05:00
Robert Walker
4271226fc0 Added and tested the usart dma example for stm32f767zi using a
Nucleo-f767zi board.
2021-12-28 08:33:34 +01:00
Nikita Strygin
a94932be02 Mark clear_interrupt_flag as unsafe 2021-12-26 18:29:41 +03:00
Nikita Strygin
6b08c70273 Port buffered uart to v1 stm32 hardware
- No DMA
- Create clear_interrupt_flag function to
    handle differences between v1 and v2 hardware
2021-12-26 18:13:19 +03:00
bors[bot]
7561fa1934
Merge #555
555: Use cortex-m only on cortex-m archs. r=Dirbaio a=Dirbaio

Without this, build fails for iOS.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-23 12:57:55 +00:00
Dario Nieuwenhuis
7926957067 Use cortex-m only on cortex-m archs.
Without this, build fails for iOS.
2021-12-23 13:53:26 +01:00
bors[bot]
63d980df7e
Merge #556
556: Lower some verbose logs to trace. r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-23 12:44:32 +00:00
Dario Nieuwenhuis
d1740b10f0 Lower some verbose logs to trace. 2021-12-23 13:43:14 +01:00
bors[bot]
587c003d73
Merge #554
554: Update stm32-data with F3 Timer register changes r=Dirbaio a=VasanthakumarV

Changes to `stm32-data` as part of https://github.com/embassy-rs/stm32-data/pull/112

Co-authored-by: VasanthakumarV <vasanth260m12@gmail.com>
2021-12-23 11:39:10 +00:00
VasanthakumarV
c883eedb63 Update stm32-data with f3 Timer reg changes 2021-12-23 17:05:11 +05:30
bors[bot]
79cbad501c
Merge #551
551: nrf/gpio: add infallible inherent methods, remove some duplication. r=Dirbaio a=Dirbaio

Add infallible inherent methods, so that users don't have to import a trait, or `.unwrap()`.

This implements Input and Output using FlexPin, to avoid some code duplication.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-21 09:31:23 +00:00
Dario Nieuwenhuis
22bc1e4ae1 nrf/gpio: add infallible inherent methods, remove some duplication.
This implements Input and Output using FlexPin, to avoid some code duplication.
2021-12-20 00:55:18 +01:00
bors[bot]
fcb43caa36
Merge #550
550: Some API documentation fixes in traits r=Dirbaio a=lulf



Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2021-12-19 07:50:33 +00:00
Ulf Lilleengen
e1545066e5 Some API documentation fixes in traits 2021-12-19 08:49:19 +01:00
bors[bot]
ad2f469407
Merge #548
548: Set Uarte log levels to trace r=lulf a=huntc

I noticed lots of logging which really slows things down and is not useful outside of a debugging context, hence set to trace.

Co-authored-by: huntc <huntchr@gmail.com>
2021-12-17 06:39:49 +00:00
huntc
3d8eecff89 Set Uarte log levels to trace
I noticed lots of logging which really slows things down and is not useful outside of a debugging context, hence set to trace.
2021-12-17 17:06:46 +11:00
bors[bot]
23c16903db
Merge #546
546: Update rust-toolchain r=Dirbaio a=lulf



Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2021-12-16 10:39:01 +00:00
Ulf Lilleengen
2bbd1ddb8a Remove unneeded rustfmt::skip 2021-12-16 11:37:53 +01:00
Ulf Lilleengen
985c11fad5 Update rust-toolchain 2021-12-16 11:34:20 +01:00
bors[bot]
5df16c6793
Merge #544
544: Introduces split on the nRF Uarte r=Dirbaio a=huntc

A new `split` method is introduced such that the Uarte tx and rx can be used from separate tasks. An MPSC is used in an example to illustrate how data may be passed between these tasks.

The approach taken within the `Uarte` struct is to split into tx and rx fields on calling `Uarte::new`. These fields are returned given a call to `Uarte::split`, but otherwise, if that call isn't made, then the API remains as it was before.

Here's a snippet from a new example introduced:

```rust
#[embassy::main]
async fn main(spawner: Spawner, p: Peripherals) {
    // ...

    let uart = uarte::Uarte::new(p.UARTE0, irq, p.P0_08, p.P0_06, NoPin, NoPin, config);
    let (mut tx, rx) = uart.split();

    // ...

    // Spawn a task responsible purely for reading

    unwrap!(spawner.spawn(reader(rx, s)));

    // ...

    // Continue reading in this main task and write
    // back out the buffer we receive from the read
    // task.
    loop {
        if let Some(buf) = r.recv().await {
            info!("writing...");
            unwrap!(tx.write(&buf).await);
        }
    }
}

#[embassy::task]
async fn reader(mut rx: UarteRx<'static, UARTE0>, s: Sender<'static, Noop, [u8; 8], 1>) {
    let mut buf = [0; 8];
    loop {
        info!("reading...");
        unwrap!(rx.read(&mut buf).await);
        unwrap!(s.send(buf).await);
    }
}
```


Co-authored-by: huntc <huntchr@gmail.com>
2021-12-16 07:44:40 +00:00
bors[bot]
d5a3064c2c
Merge #540
540: Initial support for STM32F3 r=Dirbaio a=VasanthakumarV

The [companion PR](https://github.com/embassy-rs/stm32-data/pull/109) in `stm32-data` should be merged before this PR.
The examples were tested on an STM32F303VC MCU.

Co-authored-by: VasanthakumarV <vasanth260m12@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-16 07:30:03 +00:00
huntc
0642eec01e Properly initialise refcount 2021-12-16 18:15:28 +11:00
Dario Nieuwenhuis
1b3367e9a2 Update stm32-data. 2021-12-16 08:14:49 +01:00
bors[bot]
2d6111ed43
Merge #543
543: Incrementally merge STM32 SPI versions, Part 3 r=Dirbaio a=GrantM11235

Notable changes:
- `SPE` is now disabled before `TXDMAEN` and `RXDMAEN` are disabled. This is the "mandatory" sequence for v2 and v3 (and maybe v1 as well, but I can't find it in the reference manual).
- v1's `write_dma_u8` now waits for idle and disables `TXDMAEN` after the transfer is complete, just like everything else.

Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2021-12-16 07:07:39 +00:00
huntc
bb03b5cc02 Too much copy/pasta
The tx permitted reads and the rx permitted writes!
2021-12-16 07:16:38 +11:00
huntc
2493699fb3 Ref count the peripheral drop 2021-12-16 07:09:33 +11:00
huntc
1374ad2ab6 Introduces split on the nRF Uarte
A new `split` method is introduced such that the Uarte tx and rx can be used from separate tasks. An MPSC is used to illustrate how data may be passed between these tasks.
2021-12-15 18:31:52 +11:00
Grant Miller
6597e67036 Add finish_dma function 2021-12-14 17:46:25 -06:00
Grant Miller
a13a7a6616 Replace wait_for_idle with spin_until_idle 2021-12-14 17:46:25 -06:00
Grant Miller
e75cb1a564 Regs type alias 2021-12-14 15:39:00 -06:00
Grant Miller
b06658c195 Refactor new 2021-12-14 15:39:00 -06:00
bors[bot]
1a7b9e3279
Merge #542
542: nrf/gpiote: remove PortInput, move impls to Input/FlexPin. r=Dirbaio a=Dirbaio

`PortInput` is just a dumb wrapper around `Input`, it has no reason whatsoever to exist. This PR moves the `wait_for_x` functionality to `Input` directly.

It also adds it to `FlexPin` for completeness and consistency with `Input`.

(The reason `PortInput` exists is a while ago `GPIOTE` was an owned singleton that you had to initialize, so `PortInput::new()` would require it to enforce it's been initialized. This doesn't apply anymore now that GPIOTE is "global")

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-12-14 14:09:59 +00:00
Dario Nieuwenhuis
153b1bbdbf nrf/gpiote: remove PortInput, move impls to Input. 2021-12-14 13:23:40 +01:00
VasanthakumarV
78c5d65ca9 [lint] Add newline in pwr file 2021-12-13 18:16:58 +05:30
VasanthakumarV
2c50ab1ebf [ci] Add STM32F3 examples to CI shell 2021-12-13 18:13:23 +05:30
Dario Nieuwenhuis
3f3b7d066e
Merge pull request #541 from lulf/docs-readme
Some notes in the readme about docs
2021-12-13 13:25:26 +01:00
Ulf Lilleengen
91e0c6df73 Some notes in the readme about docs 2021-12-13 13:23:18 +01:00
VasanthakumarV
a65c2bc2b4 [examples] Add examples for STM32F3 2021-12-13 14:50:13 +05:30
VasanthakumarV
3f33d307ff [feature] Add rcc register support for F3 2021-12-13 14:50:13 +05:30
VasanthakumarV
e2c074d133 [feature] Add pwr register support for F3 2021-12-13 13:49:41 +05:30
VasanthakumarV
7733d11f90 [generate] Add stm32f3 chips to the Cargo manifest 2021-12-13 13:49:41 +05:30
VasanthakumarV
629fab7e21 [manual] Add stm32f3 family to stm32-gen-features 2021-12-13 13:49:41 +05:30
bors[bot]
2a4a133b88
Merge #533
533: Book poc r=Dirbaio a=lulf

This is a Proof of Concept for an embassy book. It's using Antora/Asciidoc.

* Asciidoc because it's a single specification with a slightly richer feature set than markdown. 
* Antora because it allows keeping content in the embassy repo, while book definition in another repo (embassy-book). 

Using antora also allows for easy embedding of embassy doc in other projects, which I think in turn increases probability of upstream contributions.

The sources of content are located in docs/ but could also be in a separate repo. However, keeping it in the embassy repo makes it easier to support one version of the book per embassy version in the future.

At present, the book is automatically built every hour from this branch and published at: https://embassy-rs.github.io/embassy-book/embassy/dev/index.html

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
2021-12-13 00:07:39 +00:00
bors[bot]
052abc918a
Merge #537
537: Documents the nRF BufferedUarte problem r=Dirbaio a=huntc

Please see https://github.com/embassy-rs/embassy/issues/536 for the rationale.

Co-authored-by: huntc <huntchr@gmail.com>
2021-12-12 20:35:43 +00:00